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authorJohn Crispin <john@openwrt.org>2014-04-03 14:27:02 +0000
committerJohn Crispin <john@openwrt.org>2014-04-03 14:27:02 +0000
commita05356f48a232fcb19c8b845bc2e4267086a2d7a (patch)
tree978a05bb3748103746a6826541c7eb7a2eed11aa /target/linux/lantiq/patches-3.10/0205-lantiq-nand-lock.patch
parent15139d468c9bcf80e3a110ea3625626d9895b5fe (diff)
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lantiq: nand fixes
Signed-off-by: John Crispin <blogic@openwrt.org> SVN-Revision: 40372
Diffstat (limited to 'target/linux/lantiq/patches-3.10/0205-lantiq-nand-lock.patch')
-rw-r--r--target/linux/lantiq/patches-3.10/0205-lantiq-nand-lock.patch86
1 files changed, 86 insertions, 0 deletions
diff --git a/target/linux/lantiq/patches-3.10/0205-lantiq-nand-lock.patch b/target/linux/lantiq/patches-3.10/0205-lantiq-nand-lock.patch
new file mode 100644
index 0000000000..f82774d889
--- /dev/null
+++ b/target/linux/lantiq/patches-3.10/0205-lantiq-nand-lock.patch
@@ -0,0 +1,86 @@
+From patchwork Wed Apr 2 19:38:31 2014
+Content-Type: text/plain; charset="utf-8"
+MIME-Version: 1.0
+Content-Transfer-Encoding: 7bit
+Subject: [OpenWrt-Devel,
+ 3/7] lantiq: BT Home Hub 2B support - nand driver locking
+Date: Wed, 02 Apr 2014 18:38:31 -0000
+From: Ben Mulvihill <ben.mulvihill@gmail.com>
+X-Patchwork-Id: 5112
+Message-Id: <1396467511.31327.41.camel@merveille.lan>
+To: openwrt-devel@lists.openwrt.org
+
+As a result of changeset 40310, the xway nand driver
+now acquires ebu_lock in the chip select function, and
+holds it for the entire duration of an operation until
+the chip is deselected. There is surely no longer any
+need therefore also to acquire the lock in each separate
+read or write function. This patch removes that code.
+
+Signed-off-by: Ben Mulvihill <ben.mulvihill@gmail.com>
+
+---
+
+
+--- a/drivers/mtd/nand/xway_nand.c 2014-04-01 20:14:53.072824371 +0200
++++ b/drivers/mtd/nand/xway_nand.c 2014-04-01 21:24:52.798612391 +0200
+@@ -102,7 +102,6 @@ static void xway_cmd_ctrl(struct mtd_inf
+ {
+ struct nand_chip *this = mtd->priv;
+ unsigned long nandaddr = (unsigned long) this->IO_ADDR_W;
+- unsigned long flags;
+
+ if (ctrl & NAND_CTRL_CHANGE) {
+ if (ctrl & NAND_CLE)
+@@ -112,11 +111,9 @@ static void xway_cmd_ctrl(struct mtd_inf
+ }
+
+ if (cmd != NAND_CMD_NONE) {
+- spin_lock_irqsave(&ebu_lock, flags);
+ writeb(cmd, (void __iomem *) (nandaddr | xway_latchcmd));
+ while ((ltq_ebu_r32(EBU_NAND_WAIT) & NAND_WAIT_WR_C) == 0)
+ ;
+- spin_unlock_irqrestore(&ebu_lock, flags);
+ }
+ }
+
+@@ -129,12 +126,9 @@ static unsigned char xway_read_byte(stru
+ {
+ struct nand_chip *this = mtd->priv;
+ unsigned long nandaddr = (unsigned long) this->IO_ADDR_R;
+- unsigned long flags;
+ int ret;
+
+- spin_lock_irqsave(&ebu_lock, flags);
+ ret = ltq_r8((void __iomem *)(nandaddr | NAND_READ_DATA));
+- spin_unlock_irqrestore(&ebu_lock, flags);
+
+ return ret;
+ }
+@@ -143,26 +137,20 @@ static void xway_read_buf(struct mtd_inf
+ {
+ struct nand_chip *this = mtd->priv;
+ unsigned long nandaddr = (unsigned long) this->IO_ADDR_R;
+- unsigned long flags;
+ int i;
+
+- spin_lock_irqsave(&ebu_lock, flags);
+ for (i = 0; i < len; i++)
+ buf[i] = ltq_r8((void __iomem *)(nandaddr | NAND_READ_DATA));
+- spin_unlock_irqrestore(&ebu_lock, flags);
+ }
+
+ static void xway_write_buf(struct mtd_info *mtd, const u_char *buf, int len)
+ {
+ struct nand_chip *this = mtd->priv;
+ unsigned long nandaddr = (unsigned long) this->IO_ADDR_W;
+- unsigned long flags;
+ int i;
+
+- spin_lock_irqsave(&ebu_lock, flags);
+ for (i = 0; i < len; i++)
+ ltq_w8(buf[i], (void __iomem *)nandaddr);
+- spin_unlock_irqrestore(&ebu_lock, flags);
+ }
+
+ static int xway_nand_probe(struct platform_device *pdev)