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| author | Felix Fietkau <nbd@openwrt.org> | 2014-12-13 11:54:57 +0000 |
|---|---|---|
| committer | Felix Fietkau <nbd@openwrt.org> | 2014-12-13 11:54:57 +0000 |
| commit | c7e8b5ebbdfa098436945e1721b34562cd488f6f (patch) | |
| tree | ecf4a556d01dcd70743862e1ce5853e22c80b59b /target/linux/lantiq/patches-3.10/0017-MTD-lantiq-xway-remove-endless-loop.patch | |
| parent | daeec86fba3fee15045429802f06cdd715c688c6 (diff) | |
| download | master-31e0f0ae-c7e8b5ebbdfa098436945e1721b34562cd488f6f.tar.gz master-31e0f0ae-c7e8b5ebbdfa098436945e1721b34562cd488f6f.tar.bz2 master-31e0f0ae-c7e8b5ebbdfa098436945e1721b34562cd488f6f.zip | |
lantiq: remove linux 3.10 support
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
SVN-Revision: 43685
Diffstat (limited to 'target/linux/lantiq/patches-3.10/0017-MTD-lantiq-xway-remove-endless-loop.patch')
| -rw-r--r-- | target/linux/lantiq/patches-3.10/0017-MTD-lantiq-xway-remove-endless-loop.patch | 41 |
1 files changed, 0 insertions, 41 deletions
diff --git a/target/linux/lantiq/patches-3.10/0017-MTD-lantiq-xway-remove-endless-loop.patch b/target/linux/lantiq/patches-3.10/0017-MTD-lantiq-xway-remove-endless-loop.patch deleted file mode 100644 index 9fe21138e5..0000000000 --- a/target/linux/lantiq/patches-3.10/0017-MTD-lantiq-xway-remove-endless-loop.patch +++ /dev/null @@ -1,41 +0,0 @@ -From 43c13af427d6900c7ce0111c53d3a428146b3f50 Mon Sep 17 00:00:00 2001 -From: John Crispin <blogic@openwrt.org> -Date: Sun, 28 Jul 2013 18:02:06 +0200 -Subject: [PATCH 17/34] MTD: lantiq: xway: remove endless loop - -The reset loop logic could run into a endless loop. Lets fix it as requested. - ---> http://lists.infradead.org/pipermail/linux-mtd/2012-September/044240.html - -Signed-off-by: John Crispin <blogic@openwrt.org> ---- - drivers/mtd/nand/xway_nand.c | 10 ++++++++-- - 1 file changed, 8 insertions(+), 2 deletions(-) - ---- a/drivers/mtd/nand/xway_nand.c -+++ b/drivers/mtd/nand/xway_nand.c -@@ -59,16 +59,22 @@ static u32 xway_latchcmd; - static void xway_reset_chip(struct nand_chip *chip) - { - unsigned long nandaddr = (unsigned long) chip->IO_ADDR_W; -+ unsigned long timeout; - unsigned long flags; - - nandaddr &= ~NAND_WRITE_ADDR; - nandaddr |= NAND_WRITE_CMD; - - /* finish with a reset */ -+ timeout = jiffies + msecs_to_jiffies(20); -+ - spin_lock_irqsave(&ebu_lock, flags); - writeb(NAND_WRITE_CMD_RESET, (void __iomem *) nandaddr); -- while ((ltq_ebu_r32(EBU_NAND_WAIT) & NAND_WAIT_WR_C) == 0) -- ; -+ do { -+ if ((ltq_ebu_r32(EBU_NAND_WAIT) & NAND_WAIT_WR_C) == 0) -+ break; -+ cond_resched(); -+ } while (!time_after_eq(jiffies, timeout)); - spin_unlock_irqrestore(&ebu_lock, flags); - } - |