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authorJohn Crispin <john@openwrt.org>2015-02-11 10:09:23 +0000
committerJohn Crispin <john@openwrt.org>2015-02-11 10:09:23 +0000
commit88ddb3746188037afd38d631f7a893587fa8bdf0 (patch)
treedf4684db63441435126c4b6ff1fda4ce615e1ff0 /target/linux/ipq806x/patches/0141-ahci-platform-Bump-max-number-of-clocks-to-5.patch
parentddcbef5766fa18f52e7a7d1928b25edc63e73937 (diff)
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ipq806x: update target to v3.18
Patches in the ipq806x/patches folder were out of tree in v3.14. The newest patch at the time was from June, so we can safely assume that either the patches have been merged, or they have been rejected for a good reason. If patches are seen missing, we'll cherry-pick them on a per-needed basis. This new kernel have been tested on AP148, which seems to works fine. Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org> SVN-Revision: 44386
Diffstat (limited to 'target/linux/ipq806x/patches/0141-ahci-platform-Bump-max-number-of-clocks-to-5.patch')
-rw-r--r--target/linux/ipq806x/patches/0141-ahci-platform-Bump-max-number-of-clocks-to-5.patch23
1 files changed, 0 insertions, 23 deletions
diff --git a/target/linux/ipq806x/patches/0141-ahci-platform-Bump-max-number-of-clocks-to-5.patch b/target/linux/ipq806x/patches/0141-ahci-platform-Bump-max-number-of-clocks-to-5.patch
deleted file mode 100644
index 2f5adcaf41..0000000000
--- a/target/linux/ipq806x/patches/0141-ahci-platform-Bump-max-number-of-clocks-to-5.patch
+++ /dev/null
@@ -1,23 +0,0 @@
-From fd475809eefc0870515d0b04815e2bbae67be906 Mon Sep 17 00:00:00 2001
-From: Kumar Gala <galak@codeaurora.org>
-Date: Fri, 6 Jun 2014 12:09:01 -0500
-Subject: [PATCH 141/182] ahci-platform: Bump max number of clocks to 5
-
-Qualcomm IPQ806x SoCs with SATA controllers need 5 clocks to be enabled.
-
-Signed-off-by: Kumar Gala <galak@codeaurora.org>
----
- drivers/ata/ahci.h | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/ata/ahci.h
-+++ b/drivers/ata/ahci.h
-@@ -53,7 +53,7 @@
-
- enum {
- AHCI_MAX_PORTS = 32,
-- AHCI_MAX_CLKS = 3,
-+ AHCI_MAX_CLKS = 5,
- AHCI_MAX_SG = 168, /* hardware max is 64K */
- AHCI_DMA_BOUNDARY = 0xffffffff,
- AHCI_MAX_CMDS = 32,