ipq806x: Add support for IPQ806x chip family

Patches are generated using the "format-patch" command from the
following location:
*https://www.codeaurora.org/cgit/quic/kernel/galak-msm/log/?h=apq_ipq_base
*rev=0771849495b4128cac2faf7d49c85c729fc48b20
Patches numbered 76/77/102/103 have already been integrated in 3.14.12,
so they're not in this list.

All these patches are either integrated are pending integration into
kernel.org, therefore these patches should go away once the kernel
gets upgraded to 3.16.

Support is currently limited to AP148 board but can be extended to other
platforms in the future.

These changes do not cover ethernet connectivity.

Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>

SVN-Revision: 42334

1 files changed, 115 insertions, 0 deletions

diff --git a/target/linux/ipq806x/patches/0032-pinctrl-msm-Simplify-msm_config_reg-and-callers.patch b/target/linux/ipq806x/patches/0032-pinctrl-msm-Simplify-msm_config_reg-and-callers.patch
new file mode 100644
index 0000000000..d656978236
--- /dev/null
+++ b/target/linux/ipq806x/patches/0032-pinctrl-msm-Simplify-msm_config_reg-and-callers.patch
@@ -0,0 +1,115 @@
+From 2d9ffb1a3f87396c3b792124870ef63fc27c568f Mon Sep 17 00:00:00 2001
+From: Stephen Boyd <sboyd@codeaurora.org>
+Date: Thu, 6 Mar 2014 22:44:46 -0800
+Subject: [PATCH 032/182] pinctrl: msm: Simplify msm_config_reg() and callers
+
+We don't need to check for a negative reg here because reg is
+always the same and is always non-negative. Also, collapse the
+switch statement down for the duplicate cases.
+
+Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
+Acked-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
+Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
+---
+ drivers/pinctrl/pinctrl-msm.c |   29 +++++------------------------
+ 1 file changed, 5 insertions(+), 24 deletions(-)
+
+diff --git a/drivers/pinctrl/pinctrl-msm.c b/drivers/pinctrl/pinctrl-msm.c
+index ab46e3a..91de8bc 100644
+--- a/drivers/pinctrl/pinctrl-msm.c
++++ b/drivers/pinctrl/pinctrl-msm.c
+@@ -200,28 +200,17 @@ static const struct pinmux_ops msm_pinmux_ops = {
+ static int msm_config_reg(struct msm_pinctrl *pctrl,
+ 			  const struct msm_pingroup *g,
+ 			  unsigned param,
+-			  s16 *reg,
+ 			  unsigned *mask,
+ 			  unsigned *bit)
+ {
+ 	switch (param) {
+ 	case PIN_CONFIG_BIAS_DISABLE:
+-		*reg = g->ctl_reg;
+-		*bit = g->pull_bit;
+-		*mask = 3;
+-		break;
+ 	case PIN_CONFIG_BIAS_PULL_DOWN:
+-		*reg = g->ctl_reg;
+-		*bit = g->pull_bit;
+-		*mask = 3;
+-		break;
+ 	case PIN_CONFIG_BIAS_PULL_UP:
+-		*reg = g->ctl_reg;
+ 		*bit = g->pull_bit;
+ 		*mask = 3;
+ 		break;
+ 	case PIN_CONFIG_DRIVE_STRENGTH:
+-		*reg = g->ctl_reg;
+ 		*bit = g->drv_bit;
+ 		*mask = 7;
+ 		break;
+@@ -230,12 +219,6 @@ static int msm_config_reg(struct msm_pinctrl *pctrl,
+ 		return -ENOTSUPP;
+ 	}
+ 
+-	if (*reg < 0) {
+-		dev_err(pctrl->dev, "Config param %04x not supported on group %s\n",
+-			param, g->name);
+-		return -ENOTSUPP;
+-	}
+-
+ 	return 0;
+ }
+ 
+@@ -273,17 +256,16 @@ static int msm_config_group_get(struct pinctrl_dev *pctldev,
+ 	unsigned mask;
+ 	unsigned arg;
+ 	unsigned bit;
+-	s16 reg;
+ 	int ret;
+ 	u32 val;
+ 
+ 	g = &pctrl->soc->groups[group];
+ 
+-	ret = msm_config_reg(pctrl, g, param, &reg, &mask, &bit);
++	ret = msm_config_reg(pctrl, g, param, &mask, &bit);
+ 	if (ret < 0)
+ 		return ret;
+ 
+-	val = readl(pctrl->regs + reg);
++	val = readl(pctrl->regs + g->ctl_reg);
+ 	arg = (val >> bit) & mask;
+ 
+ 	/* Convert register value to pinconf value */
+@@ -323,7 +305,6 @@ static int msm_config_group_set(struct pinctrl_dev *pctldev,
+ 	unsigned mask;
+ 	unsigned arg;
+ 	unsigned bit;
+-	s16 reg;
+ 	int ret;
+ 	u32 val;
+ 	int i;
+@@ -334,7 +315,7 @@ static int msm_config_group_set(struct pinctrl_dev *pctldev,
+ 		param = pinconf_to_config_param(configs[i]);
+ 		arg = pinconf_to_config_argument(configs[i]);
+ 
+-		ret = msm_config_reg(pctrl, g, param, &reg, &mask, &bit);
++		ret = msm_config_reg(pctrl, g, param, &mask, &bit);
+ 		if (ret < 0)
+ 			return ret;
+ 
+@@ -369,10 +350,10 @@ static int msm_config_group_set(struct pinctrl_dev *pctldev,
+ 		}
+ 
+ 		spin_lock_irqsave(&pctrl->lock, flags);
+-		val = readl(pctrl->regs + reg);
++		val = readl(pctrl->regs + g->ctl_reg);
+ 		val &= ~(mask << bit);
+ 		val |= arg << bit;
+-		writel(val, pctrl->regs + reg);
++		writel(val, pctrl->regs + g->ctl_reg);
+ 		spin_unlock_irqrestore(&pctrl->lock, flags);
+ 	}
+ 
+-- 
+1.7.10.4
+