diff options
| author | Jonas Gorski <jogo@openwrt.org> | 2014-07-28 11:12:25 +0000 |
|---|---|---|
| committer | Jonas Gorski <jogo@openwrt.org> | 2014-07-28 11:12:25 +0000 |
| commit | 042fb8eb57bfb7aba295831579a4f48c11d642f0 (patch) | |
| tree | 8b7b11cc23365a4cf41ffea0db5218558e9ed959 /target/linux/brcm63xx/patches-3.14/420-BCM63XX-add-endian-check-for-ath9k.patch | |
| parent | fd619513d1a2514b03cbfd6774260132ef78f3bd (diff) | |
| download | master-31e0f0ae-042fb8eb57bfb7aba295831579a4f48c11d642f0.tar.gz master-31e0f0ae-042fb8eb57bfb7aba295831579a4f48c11d642f0.tar.bz2 master-31e0f0ae-042fb8eb57bfb7aba295831579a4f48c11d642f0.zip | |
brcm63xx: 3.14: fix ath9k_pci_fixup
Since kernel commit 928bea964827 ("PCI: Delay enabling bridges until
they're needed"), pci fixups are run with bridges (e.g. the pcie port)
disabled.
This causses hangs when ath9k_pci_fixup tries to manually enable the
device to apply the register fixups.
Fix this by enabling any parent bridges before trying to access the
device itself.
Fixes boot on DSL-274XB rev F1.
Reported-by: Matteo Croce <matteo@openwrt.org>
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
SVN-Revision: 41856
Diffstat (limited to 'target/linux/brcm63xx/patches-3.14/420-BCM63XX-add-endian-check-for-ath9k.patch')
| -rw-r--r-- | target/linux/brcm63xx/patches-3.14/420-BCM63XX-add-endian-check-for-ath9k.patch | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target/linux/brcm63xx/patches-3.14/420-BCM63XX-add-endian-check-for-ath9k.patch b/target/linux/brcm63xx/patches-3.14/420-BCM63XX-add-endian-check-for-ath9k.patch index 0809d785bd..24b91bbb56 100644 --- a/target/linux/brcm63xx/patches-3.14/420-BCM63XX-add-endian-check-for-ath9k.patch +++ b/target/linux/brcm63xx/patches-3.14/420-BCM63XX-add-endian-check-for-ath9k.patch @@ -21,7 +21,7 @@ /* --- a/arch/mips/bcm63xx/pci-ath9k-fixup.c +++ b/arch/mips/bcm63xx/pci-ath9k-fixup.c -@@ -174,12 +174,14 @@ static void ath9k_pci_fixup(struct pci_d +@@ -181,12 +181,14 @@ static void ath9k_pci_fixup(struct pci_d } DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID, ath9k_pci_fixup); |