summaryrefslogtreecommitdiffstats
path: root/target/linux/brcm63xx/patches-3.10/411-MIPS-BCM63XX-Register-SPI-flash-if-present.patch
diff options
context:
space:
mode:
authorJonas Gorski <jogo@openwrt.org>2014-01-13 12:13:51 +0000
committerJonas Gorski <jogo@openwrt.org>2014-01-13 12:13:51 +0000
commit3bdcf040aa47638a1e398d8a6329f515f1cc015a (patch)
tree6b01a0ff5511d7d11db063ed4dfe6e1628194813 /target/linux/brcm63xx/patches-3.10/411-MIPS-BCM63XX-Register-SPI-flash-if-present.patch
parentab8897045cd4bcc547af02c3660f29cceb40e952 (diff)
downloadmaster-31e0f0ae-3bdcf040aa47638a1e398d8a6329f515f1cc015a.tar.gz
master-31e0f0ae-3bdcf040aa47638a1e398d8a6329f515f1cc015a.tar.bz2
master-31e0f0ae-3bdcf040aa47638a1e398d8a6329f515f1cc015a.zip
brcm63xx: add initial support for BCM63268
Add initial support for the BCM63268 family of SoCs, but keep it disabled for now as most things don't work yet. Signed-off-by: Jonas Gorski <jogo@openwrt.org> SVN-Revision: 39271
Diffstat (limited to 'target/linux/brcm63xx/patches-3.10/411-MIPS-BCM63XX-Register-SPI-flash-if-present.patch')
-rw-r--r--target/linux/brcm63xx/patches-3.10/411-MIPS-BCM63XX-Register-SPI-flash-if-present.patch35
1 files changed, 29 insertions, 6 deletions
diff --git a/target/linux/brcm63xx/patches-3.10/411-MIPS-BCM63XX-Register-SPI-flash-if-present.patch b/target/linux/brcm63xx/patches-3.10/411-MIPS-BCM63XX-Register-SPI-flash-if-present.patch
index cdaae990aa..1c2f1b52f1 100644
--- a/target/linux/brcm63xx/patches-3.10/411-MIPS-BCM63XX-Register-SPI-flash-if-present.patch
+++ b/target/linux/brcm63xx/patches-3.10/411-MIPS-BCM63XX-Register-SPI-flash-if-present.patch
@@ -58,7 +58,18 @@ Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
if (val & STRAPBUS_6328_BOOT_SEL_SERIAL)
return BCM63XX_FLASH_TYPE_SERIAL;
else
-@@ -86,6 +109,9 @@ static int __init bcm63xx_detect_flash_t
+@@ -80,12 +103,20 @@ static int __init bcm63xx_detect_flash_t
+ return BCM63XX_FLASH_TYPE_SERIAL;
+ case BCM6362_CPU_ID:
+ val = bcm_misc_readl(MISC_STRAPBUS_6362_REG);
++ if (val & STRAPBUS_6362_HSSPI_CLK_FAST)
++ bcm63xx_spi_flash_info[0].max_speed_hz = 50000000;
++ else
++ bcm63xx_spi_flash_info[0].max_speed_hz = 20000000;
++
+ if (val & STRAPBUS_6362_BOOT_SEL_SERIAL)
+ return BCM63XX_FLASH_TYPE_SERIAL;
+ else
return BCM63XX_FLASH_TYPE_NAND;
case BCM6368_CPU_ID:
val = bcm_gpio_readl(GPIO_STRAPBUS_REG);
@@ -68,13 +79,25 @@ Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
switch (val & STRAPBUS_6368_BOOT_SEL_MASK) {
case STRAPBUS_6368_BOOT_SEL_NAND:
return BCM63XX_FLASH_TYPE_NAND;
-@@ -117,8 +143,14 @@ int __init bcm63xx_flash_register(void)
+@@ -96,6 +127,11 @@ static int __init bcm63xx_detect_flash_t
+ }
+ case BCM63268_CPU_ID:
+ val = bcm_misc_readl(MISC_STRAPBUS_63268_REG);
++ if (val & STRAPBUS_63268_HSSPI_CLK_FAST)
++ bcm63xx_spi_flash_info[0].max_speed_hz = 50000000;
++ else
++ bcm63xx_spi_flash_info[0].max_speed_hz = 20000000;
++
+ if (val & STRAPBUS_63268_BOOT_SEL_SERIAL)
+ return BCM63XX_FLASH_TYPE_SERIAL;
+ else
+@@ -123,8 +159,14 @@ int __init bcm63xx_flash_register(void)
return platform_device_register(&mtd_dev);
case BCM63XX_FLASH_TYPE_SERIAL:
- pr_warn("unsupported serial flash detected\n");
- return -ENODEV;
-+ if (BCMCPU_IS_6328() || BCMCPU_IS_6362())
++ if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_63268())
+ bcm63xx_spi_flash_info[0].bus_num = 1;
+
+ if (BCMCPU_IS_6358() || BCMCPU_IS_6368())
@@ -87,7 +110,7 @@ Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
return -ENODEV;
--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-@@ -674,6 +674,7 @@
+@@ -746,6 +746,7 @@
#define GPIO_STRAPBUS_REG 0x40
#define STRAPBUS_6358_BOOT_SEL_PARALLEL (1 << 1)
#define STRAPBUS_6358_BOOT_SEL_SERIAL (0 << 1)
@@ -95,8 +118,8 @@ Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
#define STRAPBUS_6368_BOOT_SEL_MASK 0x3
#define STRAPBUS_6368_BOOT_SEL_NAND 0
#define STRAPBUS_6368_BOOT_SEL_SERIAL 1
-@@ -1515,6 +1516,7 @@
- #define STRAPBUS_6362_BOOT_SEL_NAND (0 << 15)
+@@ -1594,6 +1595,7 @@
+ #define STRAPBUS_63268_FCVO_MASK (0xf << STRAPBUS_63268_FCVO_SHIFT)
#define MISC_STRAPBUS_6328_REG 0x240
+#define STRAPBUS_6328_HSSPI_CLK_FAST (1 << 4)