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| author | Florian Fainelli <florian@openwrt.org> | 2009-06-27 15:51:27 +0000 |
|---|---|---|
| committer | Florian Fainelli <florian@openwrt.org> | 2009-06-27 15:51:27 +0000 |
| commit | 13a8ed9ca0f218e12bad38698a71b5b25e43f168 (patch) | |
| tree | 2e4fcf3d7920ac4ac6be88bb72d78f29bf043efa /target/linux/brcm63xx/files/arch | |
| parent | f2435c2208685c2a6cd4448d5add1a0aafe43029 (diff) | |
| download | master-31e0f0ae-13a8ed9ca0f218e12bad38698a71b5b25e43f168.tar.gz master-31e0f0ae-13a8ed9ca0f218e12bad38698a71b5b25e43f168.tar.bz2 master-31e0f0ae-13a8ed9ca0f218e12bad38698a71b5b25e43f168.zip | |
more missing register definitions for bcm6338
SVN-Revision: 16579
Diffstat (limited to 'target/linux/brcm63xx/files/arch')
| -rw-r--r-- | target/linux/brcm63xx/files/arch/mips/bcm63xx/cpu.c | 14 |
1 files changed, 12 insertions, 2 deletions
diff --git a/target/linux/brcm63xx/files/arch/mips/bcm63xx/cpu.c b/target/linux/brcm63xx/files/arch/mips/bcm63xx/cpu.c index 3e27671a8c..2b1a9b46da 100644 --- a/target/linux/brcm63xx/files/arch/mips/bcm63xx/cpu.c +++ b/target/linux/brcm63xx/files/arch/mips/bcm63xx/cpu.c @@ -38,12 +38,22 @@ static const unsigned long bcm96338_regs_base[] = { [RSET_PERF] = BCM_6338_PERF_BASE, [RSET_TIMER] = BCM_6338_TIMER_BASE, [RSET_WDT] = BCM_6338_WDT_BASE, - [RSET_UDC0] = BCM_6338_UDC0_BASE, [RSET_UART0] = BCM_6338_UART0_BASE, [RSET_GPIO] = BCM_6338_GPIO_BASE, - [RSET_SDRAM] = BCM_6338_SDRAM_BASE, [RSET_SPI] = BCM_6338_SPI_BASE, + [RSET_OHCI0] = BCM_6338_OHCI0_BASE, + [RSET_OHCI_PRIV] = BCM_6338_OHCI_PRIV_BASE, + [RSET_USBH_PRIV] = BCM_6338_USBH_PRIV_BASE, + [RSET_UDC0] = BCM_6338_UDC0_BASE, + [RSET_MPI] = BCM_6338_MPI_BASE, + [RSET_PCMCIA] = BCM_6338_PCMCIA_BASE, + [RSET_SDRAM] = BCM_6338_SDRAM_BASE, + [RSET_DSL] = BCM_6338_DSL_BASE, + [RSET_ENET0] = BCM_6338_ENET0_BASE, + [RSET_ENET1] = BCM_6338_ENET1_BASE, + [RSET_ENETDMA] = BCM_6338_ENETDMA_BASE, [RSET_MEMC] = BCM_6338_MEMC_BASE, + [RSET_DDR] = BCM_6338_DDR_BASE, }; static const int bcm96338_irqs[] = { |