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author | Florian Fainelli <florian@openwrt.org> | 2009-03-17 11:28:54 +0000 |
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committer | Florian Fainelli <florian@openwrt.org> | 2009-03-17 11:28:54 +0000 |
commit | 32c29f1aafd66721153ef54a32d311d0c0a749b8 (patch) | |
tree | 978c545e5707615f3837b714e65603e8296dc15c /target/linux/brcm63xx/files/arch/mips/bcm63xx/cpu.c | |
parent | fb5b85c7c88fb710fdf9e5f0253127fc7e0443d3 (diff) | |
download | master-31e0f0ae-32c29f1aafd66721153ef54a32d311d0c0a749b8.tar.gz master-31e0f0ae-32c29f1aafd66721153ef54a32d311d0c0a749b8.tar.bz2 master-31e0f0ae-32c29f1aafd66721153ef54a32d311d0c0a749b8.zip |
fix SPI register switch and prepare for UDC, thanks to Henk Vergonet (#4783)
SVN-Revision: 14914
Diffstat (limited to 'target/linux/brcm63xx/files/arch/mips/bcm63xx/cpu.c')
-rw-r--r-- | target/linux/brcm63xx/files/arch/mips/bcm63xx/cpu.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/target/linux/brcm63xx/files/arch/mips/bcm63xx/cpu.c b/target/linux/brcm63xx/files/arch/mips/bcm63xx/cpu.c index 108ed5f712..f9b6eeba46 100644 --- a/target/linux/brcm63xx/files/arch/mips/bcm63xx/cpu.c +++ b/target/linux/brcm63xx/files/arch/mips/bcm63xx/cpu.c @@ -37,6 +37,7 @@ static const unsigned long bcm96338_regs_base[] = { [RSET_PERF] = BCM_6338_PERF_BASE, [RSET_TIMER] = BCM_6338_TIMER_BASE, [RSET_WDT] = BCM_6338_WDT_BASE, + [RSET_UDC0] = BCM_6338_UDC0_BASE, [RSET_UART0] = BCM_6338_UART0_BASE, [RSET_GPIO] = BCM_6338_GPIO_BASE, [RSET_SPI] = BCM_6338_SPI_BASE, @@ -48,6 +49,7 @@ static const int bcm96338_irqs[] = { [IRQ_SPI] = BCM_6338_SPI_IRQ, [IRQ_UART0] = BCM_6338_UART0_IRQ, [IRQ_DSL] = BCM_6338_DSL_IRQ, + [IRQ_UDC0] = BCM_6338_UDC0_IRQ, [IRQ_ENET0] = BCM_6338_ENET0_IRQ, [IRQ_ENET_PHY] = BCM_6338_ENET_PHY_IRQ, [IRQ_ENET0_RXDMA] = BCM_6338_ENET0_RXDMA_IRQ, @@ -83,6 +85,7 @@ static const unsigned long bcm96348_regs_base[] = { [RSET_OHCI0] = BCM_6348_OHCI0_BASE, [RSET_OHCI_PRIV] = BCM_6348_OHCI_PRIV_BASE, [RSET_USBH_PRIV] = BCM_6348_USBH_PRIV_BASE, + [RSET_UDC0] = BCM_6348_UDC0_BASE, [RSET_MPI] = BCM_6348_MPI_BASE, [RSET_PCMCIA] = BCM_6348_PCMCIA_BASE, [RSET_SDRAM] = BCM_6348_SDRAM_BASE, @@ -99,6 +102,7 @@ static const int bcm96348_irqs[] = { [IRQ_SPI] = BCM_6348_SPI_IRQ, [IRQ_UART0] = BCM_6348_UART0_IRQ, [IRQ_DSL] = BCM_6348_DSL_IRQ, + [IRQ_UDC0] = BCM_6348_UDC0_IRQ, [IRQ_ENET0] = BCM_6348_ENET0_IRQ, [IRQ_ENET1] = BCM_6348_ENET1_IRQ, [IRQ_ENET_PHY] = BCM_6348_ENET_PHY_IRQ, |