summaryrefslogtreecommitdiffstats
path: root/target/linux/ar71xx/patches-4.4/505-MIPS-ath79-add-ath79_gpio_function_select.patch
diff options
context:
space:
mode:
authorFelix Fietkau <nbd@openwrt.org>2016-01-30 13:19:53 +0000
committerFelix Fietkau <nbd@openwrt.org>2016-01-30 13:19:53 +0000
commit2530640f07cd2b3b14fe9ec03fa63a586452cc5f (patch)
treeda4d0e63a6771cbd044d3ba8d8dc97bd0615920f /target/linux/ar71xx/patches-4.4/505-MIPS-ath79-add-ath79_gpio_function_select.patch
parente5b5cce442f6fdaccf86064657518a5d0404f78e (diff)
downloadmaster-31e0f0ae-2530640f07cd2b3b14fe9ec03fa63a586452cc5f.tar.gz
master-31e0f0ae-2530640f07cd2b3b14fe9ec03fa63a586452cc5f.tar.bz2
master-31e0f0ae-2530640f07cd2b3b14fe9ec03fa63a586452cc5f.zip
ar71xx: add support for linux 4.4
Signed-off-by: Felix Fietkau <nbd@openwrt.org> SVN-Revision: 48563
Diffstat (limited to 'target/linux/ar71xx/patches-4.4/505-MIPS-ath79-add-ath79_gpio_function_select.patch')
-rw-r--r--target/linux/ar71xx/patches-4.4/505-MIPS-ath79-add-ath79_gpio_function_select.patch39
1 files changed, 39 insertions, 0 deletions
diff --git a/target/linux/ar71xx/patches-4.4/505-MIPS-ath79-add-ath79_gpio_function_select.patch b/target/linux/ar71xx/patches-4.4/505-MIPS-ath79-add-ath79_gpio_function_select.patch
new file mode 100644
index 0000000000..3adb088d52
--- /dev/null
+++ b/target/linux/ar71xx/patches-4.4/505-MIPS-ath79-add-ath79_gpio_function_select.patch
@@ -0,0 +1,39 @@
+--- a/arch/mips/ath79/common.h
++++ b/arch/mips/ath79/common.h
+@@ -28,6 +28,7 @@ void ath79_ddr_wb_flush(unsigned int reg
+ void ath79_gpio_function_enable(u32 mask);
+ void ath79_gpio_function_disable(u32 mask);
+ void ath79_gpio_function_setup(u32 set, u32 clear);
++void ath79_gpio_output_select(unsigned gpio, u8 val);
+ void ath79_gpio_init(void);
+
+ #endif /* __ATH79_COMMON_H */
+--- a/arch/mips/ath79/gpio.c
++++ b/arch/mips/ath79/gpio.c
+@@ -57,3 +57,26 @@ void ath79_gpio_function_disable(u32 mas
+ {
+ ath79_gpio_function_setup(0, mask);
+ }
++
++void __init ath79_gpio_output_select(unsigned gpio, u8 val)
++{
++ void __iomem *base = ath79_gpio_base;
++ unsigned int reg;
++ u32 t, s;
++
++ BUG_ON(!soc_is_ar934x());
++
++ if (gpio >= AR934X_GPIO_COUNT)
++ return;
++
++ reg = AR934X_GPIO_REG_OUT_FUNC0 + 4 * (gpio / 4);
++ s = 8 * (gpio % 4);
++
++ t = __raw_readl(base + reg);
++ t &= ~(0xff << s);
++ t |= val << s;
++ __raw_writel(t, base + reg);
++
++ /* flush write */
++ (void) __raw_readl(base + reg);
++}