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| author | Gabor Juhos <juhosg@openwrt.org> | 2007-12-27 14:58:48 +0000 |
|---|---|---|
| committer | Gabor Juhos <juhosg@openwrt.org> | 2007-12-27 14:58:48 +0000 |
| commit | c12834487007034df5df115b18fa0ce45248f043 (patch) | |
| tree | fc78c05f0b9cc4eb2dba118c1a1db6184dc6ee60 /target/linux/adm5120/files/include/asm-mips/mach-adm5120 | |
| parent | cfcbc078dcb349a0555fce491194c07d2261bd86 (diff) | |
| download | master-31e0f0ae-c12834487007034df5df115b18fa0ce45248f043.tar.gz master-31e0f0ae-c12834487007034df5df115b18fa0ce45248f043.tar.bz2 master-31e0f0ae-c12834487007034df5df115b18fa0ce45248f043.zip | |
change switch register access macros
SVN-Revision: 9962
Diffstat (limited to 'target/linux/adm5120/files/include/asm-mips/mach-adm5120')
| -rw-r--r-- | target/linux/adm5120/files/include/asm-mips/mach-adm5120/adm5120_nand.h | 4 | ||||
| -rw-r--r-- | target/linux/adm5120/files/include/asm-mips/mach-adm5120/adm5120_switch.h | 4 |
2 files changed, 4 insertions, 4 deletions
diff --git a/target/linux/adm5120/files/include/asm-mips/mach-adm5120/adm5120_nand.h b/target/linux/adm5120/files/include/asm-mips/mach-adm5120/adm5120_nand.h index 8d86fc6e78..a321db5d4a 100644 --- a/target/linux/adm5120/files/include/asm-mips/mach-adm5120/adm5120_nand.h +++ b/target/linux/adm5120/files/include/asm-mips/mach-adm5120/adm5120_nand.h @@ -65,8 +65,8 @@ static inline void adm5120_nand_enable(void) { - SW_WRITE_REG(BW_CNTL1, BW_CNTL1_NAND_ENABLE); - SW_WRITE_REG(BOOT_DONE, 1); + SW_WRITE_REG(SWITCH_REG_BW_CNTL1, BW_CNTL1_NAND_ENABLE); + SW_WRITE_REG(SWITCH_REG_BOOT_DONE, 1); } static inline void adm5120_nand_set_wpn(unsigned int set) diff --git a/target/linux/adm5120/files/include/asm-mips/mach-adm5120/adm5120_switch.h b/target/linux/adm5120/files/include/asm-mips/mach-adm5120/adm5120_switch.h index f96c7d50c7..9ed5233cb5 100644 --- a/target/linux/adm5120/files/include/asm-mips/mach-adm5120/adm5120_switch.h +++ b/target/linux/adm5120/files/include/asm-mips/mach-adm5120/adm5120_switch.h @@ -32,9 +32,9 @@ #define BITMASK(len) ((1 << (len))-1) #define SW_READ_REG(r) __raw_readl( \ - (void __iomem *)KSEG1ADDR(ADM5120_SWITCH_BASE) + SWITCH_REG_ ## r) + (void __iomem *)KSEG1ADDR(ADM5120_SWITCH_BASE) + r) #define SW_WRITE_REG(r, v) __raw_writel((v), \ - (void __iomem *)KSEG1ADDR(ADM5120_SWITCH_BASE) + SWITCH_REG_ ## r) + (void __iomem *)KSEG1ADDR(ADM5120_SWITCH_BASE) + r) /* Switch register offsets */ #define SWITCH_REG_CODE 0x0000 |