ath9k: remove code for setting up gpio based baseband rfkill - it was never used, nor configured properly

SVN-Revision: 24628

1 files changed, 103 insertions, 0 deletions

diff --git a/package/mac80211/patches/550-ath9k_disable_hw_rfkill.patch b/package/mac80211/patches/550-ath9k_disable_hw_rfkill.patch
new file mode 100644
index 0000000000..83cd9a1ce4
--- /dev/null
+++ b/package/mac80211/patches/550-ath9k_disable_hw_rfkill.patch
@@ -0,0 +1,103 @@
+--- a/drivers/net/wireless/ath/ath9k/ar5008_phy.c
++++ b/drivers/net/wireless/ath/ath9k/ar5008_phy.c
+@@ -961,18 +961,6 @@ static void ar5008_hw_rfbus_done(struct 
+ 	REG_WRITE(ah, AR_PHY_RFBUS_REQ, 0);
+ }
+ 
+-static void ar5008_hw_enable_rfkill(struct ath_hw *ah)
+-{
+-	REG_SET_BIT(ah, AR_GPIO_INPUT_EN_VAL,
+-		    AR_GPIO_INPUT_EN_VAL_RFSILENT_BB);
+-
+-	REG_CLR_BIT(ah, AR_GPIO_INPUT_MUX2,
+-		    AR_GPIO_INPUT_MUX2_RFSILENT);
+-
+-	ath9k_hw_cfg_gpio_input(ah, ah->rfkill_gpio);
+-	REG_SET_BIT(ah, AR_PHY_TEST, RFSILENT_BB);
+-}
+-
+ static void ar5008_restore_chainmask(struct ath_hw *ah)
+ {
+ 	int rx_chainmask = ah->rxchainmask;
+@@ -1629,7 +1617,6 @@ void ar5008_hw_attach_phy_ops(struct ath
+ 	priv_ops->set_delta_slope = ar5008_hw_set_delta_slope;
+ 	priv_ops->rfbus_req = ar5008_hw_rfbus_req;
+ 	priv_ops->rfbus_done = ar5008_hw_rfbus_done;
+-	priv_ops->enable_rfkill = ar5008_hw_enable_rfkill;
+ 	priv_ops->restore_chainmask = ar5008_restore_chainmask;
+ 	priv_ops->set_diversity = ar5008_set_diversity;
+ 	priv_ops->do_getnf = ar5008_hw_do_getnf;
+--- a/drivers/net/wireless/ath/ath9k/ar9003_phy.c
++++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.c
+@@ -748,28 +748,6 @@ static void ar9003_hw_rfbus_done(struct 
+ 	REG_WRITE(ah, AR_PHY_RFBUS_REQ, 0);
+ }
+ 
+-/*
+- * Set the interrupt and GPIO values so the ISR can disable RF
+- * on a switch signal.  Assumes GPIO port and interrupt polarity
+- * are set prior to call.
+- */
+-static void ar9003_hw_enable_rfkill(struct ath_hw *ah)
+-{
+-	/* Connect rfsilent_bb_l to baseband */
+-	REG_SET_BIT(ah, AR_GPIO_INPUT_EN_VAL,
+-		    AR_GPIO_INPUT_EN_VAL_RFSILENT_BB);
+-	/* Set input mux for rfsilent_bb_l to GPIO #0 */
+-	REG_CLR_BIT(ah, AR_GPIO_INPUT_MUX2,
+-		    AR_GPIO_INPUT_MUX2_RFSILENT);
+-
+-	/*
+-	 * Configure the desired GPIO port for input and
+-	 * enable baseband rf silence.
+-	 */
+-	ath9k_hw_cfg_gpio_input(ah, ah->rfkill_gpio);
+-	REG_SET_BIT(ah, AR_PHY_TEST, RFSILENT_BB);
+-}
+-
+ static void ar9003_hw_set_diversity(struct ath_hw *ah, bool value)
+ {
+ 	u32 v = REG_READ(ah, AR_PHY_CCK_DETECT);
+@@ -1206,7 +1184,6 @@ void ar9003_hw_attach_phy_ops(struct ath
+ 	priv_ops->set_delta_slope = ar9003_hw_set_delta_slope;
+ 	priv_ops->rfbus_req = ar9003_hw_rfbus_req;
+ 	priv_ops->rfbus_done = ar9003_hw_rfbus_done;
+-	priv_ops->enable_rfkill = ar9003_hw_enable_rfkill;
+ 	priv_ops->set_diversity = ar9003_hw_set_diversity;
+ 	priv_ops->ani_control = ar9003_hw_ani_control;
+ 	priv_ops->do_getnf = ar9003_hw_do_getnf;
+--- a/drivers/net/wireless/ath/ath9k/hw-ops.h
++++ b/drivers/net/wireless/ath/ath9k/hw-ops.h
+@@ -223,11 +223,6 @@ static inline void ath9k_hw_rfbus_done(s
+ 	return ath9k_hw_private_ops(ah)->rfbus_done(ah);
+ }
+ 
+-static inline void ath9k_enable_rfkill(struct ath_hw *ah)
+-{
+-	return ath9k_hw_private_ops(ah)->enable_rfkill(ah);
+-}
+-
+ static inline void ath9k_hw_restore_chainmask(struct ath_hw *ah)
+ {
+ 	if (!ath9k_hw_private_ops(ah)->restore_chainmask)
+--- a/drivers/net/wireless/ath/ath9k/hw.c
++++ b/drivers/net/wireless/ath/ath9k/hw.c
+@@ -1406,7 +1406,7 @@ int ath9k_hw_reset(struct ath_hw *ah, st
+ 	ath9k_hw_init_qos(ah);
+ 
+ 	if (ah->caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
+-		ath9k_enable_rfkill(ah);
++		ath9k_hw_cfg_gpio_input(ah, ah->rfkill_gpio);
+ 
+ 	ath9k_hw_init_global_settings(ah);
+ 
+--- a/drivers/net/wireless/ath/ath9k/hw.h
++++ b/drivers/net/wireless/ath/ath9k/hw.h
+@@ -576,7 +576,6 @@ struct ath_hw_private_ops {
+ 	void (*set_delta_slope)(struct ath_hw *ah, struct ath9k_channel *chan);
+ 	bool (*rfbus_req)(struct ath_hw *ah);
+ 	void (*rfbus_done)(struct ath_hw *ah);
+-	void (*enable_rfkill)(struct ath_hw *ah);
+ 	void (*restore_chainmask)(struct ath_hw *ah);
+ 	void (*set_diversity)(struct ath_hw *ah, bool value);
+ 	u32 (*compute_pll_control)(struct ath_hw *ah,