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author | Felix Fietkau <nbd@openwrt.org> | 2010-11-21 16:52:00 +0000 |
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committer | Felix Fietkau <nbd@openwrt.org> | 2010-11-21 16:52:00 +0000 |
commit | 8b874be8e27ccd04a904c6d61c27b2311906c733 (patch) | |
tree | fa2c3fb941176dbbce6a2c9b10f0506c7fb3befe /package/mac80211/patches | |
parent | bd35e85116b288c05ef5f76935b27eb95d99d47d (diff) | |
download | master-31e0f0ae-8b874be8e27ccd04a904c6d61c27b2311906c733.tar.gz master-31e0f0ae-8b874be8e27ccd04a904c6d61c27b2311906c733.tar.bz2 master-31e0f0ae-8b874be8e27ccd04a904c6d61c27b2311906c733.zip |
ath9k: fix some more endian issues
SVN-Revision: 24062
Diffstat (limited to 'package/mac80211/patches')
-rw-r--r-- | package/mac80211/patches/520-ath9k_endian_fixes.patch | 58 |
1 files changed, 58 insertions, 0 deletions
diff --git a/package/mac80211/patches/520-ath9k_endian_fixes.patch b/package/mac80211/patches/520-ath9k_endian_fixes.patch new file mode 100644 index 0000000000..836cf8fee8 --- /dev/null +++ b/package/mac80211/patches/520-ath9k_endian_fixes.patch @@ -0,0 +1,58 @@ +--- a/drivers/net/wireless/ath/ath9k/eeprom.h ++++ b/drivers/net/wireless/ath/ath9k/eeprom.h +@@ -236,6 +236,15 @@ + #define CTL_EDGE_TPOWER(_ctl) ((_ctl) & 0x3f) + #define CTL_EDGE_FLAGS(_ctl) (((_ctl) >> 6) & 0x03) + ++#define LNA_CTL_BUF_MODE BIT(0) ++#define LNA_CTL_ISEL_LO BIT(1) ++#define LNA_CTL_ISEL_HI BIT(2) ++#define LNA_CTL_BUF_IN BIT(3) ++#define LNA_CTL_FEM_BAND BIT(4) ++#define LNA_CTL_LOCAL_BIAS BIT(5) ++#define LNA_CTL_FORCE_XPA BIT(6) ++#define LNA_CTL_USE_ANT1 BIT(7) ++ + enum eeprom_param { + EEP_NFTHRESH_5, + EEP_NFTHRESH_2, +@@ -381,10 +390,7 @@ struct modal_eep_header { + u8 xatten2Margin[AR5416_MAX_CHAINS]; + u8 ob_ch1; + u8 db_ch1; +- u8 useAnt1:1, +- force_xpaon:1, +- local_bias:1, +- femBandSelectUsed:1, xlnabufin:1, xlnaisel:2, xlnabufmode:1; ++ u8 lna_ctl; + u8 miscBits; + u16 xpaBiasLvlFreq[3]; + u8 futureModal[6]; +--- a/drivers/net/wireless/ath/ath9k/eeprom_def.c ++++ b/drivers/net/wireless/ath/ath9k/eeprom_def.c +@@ -451,9 +451,10 @@ static void ath9k_hw_def_set_board_value + ath9k_hw_analog_shift_rmw(ah, AR_AN_TOP2, + AR_AN_TOP2_LOCALBIAS, + AR_AN_TOP2_LOCALBIAS_S, +- pModal->local_bias); ++ !!(pModal->lna_ctl & ++ LNA_CTL_LOCAL_BIAS)); + REG_RMW_FIELD(ah, AR_PHY_XPA_CFG, AR_PHY_FORCE_XPA_CFG, +- pModal->force_xpaon); ++ !!(pModal->lna_ctl & LNA_CTL_FORCE_XPA)); + } + + REG_RMW_FIELD(ah, AR_PHY_SETTLING, AR_PHY_SETTLING_SWITCH, +@@ -1432,9 +1433,9 @@ static u8 ath9k_hw_def_get_num_ant_confi + + num_ant_config = 1; + +- if (pBase->version >= 0x0E0D) +- if (pModal->useAnt1) +- num_ant_config += 1; ++ if (pBase->version >= 0x0E0D && ++ (pModal->lna_ctl & LNA_CTL_USE_ANT1)) ++ num_ant_config += 1; + + return num_ant_config; + } |