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| author | Gabor Juhos <juhosg@openwrt.org> | 2012-12-17 22:28:09 +0000 |
|---|---|---|
| committer | Gabor Juhos <juhosg@openwrt.org> | 2012-12-17 22:28:09 +0000 |
| commit | fc0da6852e9b0586d6cd1ea79378824639b56e01 (patch) | |
| tree | 8a36b55916665137eb580e0265282fb4f820e707 | |
| parent | bf34eeaea4ad8079fdc188dd0b8ff834401a9b31 (diff) | |
| download | master-31e0f0ae-fc0da6852e9b0586d6cd1ea79378824639b56e01.tar.gz master-31e0f0ae-fc0da6852e9b0586d6cd1ea79378824639b56e01.tar.bz2 master-31e0f0ae-fc0da6852e9b0586d6cd1ea79378824639b56e01.zip | |
ar71xx: nuke 3.3 support
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
SVN-Revision: 34743
149 files changed, 0 insertions, 14362 deletions
diff --git a/target/linux/ar71xx/config-3.3 b/target/linux/ar71xx/config-3.3 deleted file mode 100644 index d1dd0b801f..0000000000 --- a/target/linux/ar71xx/config-3.3 +++ /dev/null @@ -1,234 +0,0 @@ -CONFIG_AG71XX=y -CONFIG_AG71XX_AR8216_SUPPORT=y -# CONFIG_AG71XX_DEBUG is not set -# CONFIG_AG71XX_DEBUG_FS is not set -CONFIG_AR8216_PHY=y -CONFIG_ARCH_BINFMT_ELF_RANDOMIZE_PIE=y -CONFIG_ARCH_DISCARD_MEMBLOCK=y -CONFIG_ARCH_HIBERNATION_POSSIBLE=y -CONFIG_ARCH_REQUIRE_GPIOLIB=y -CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_ATH79=y -CONFIG_ATH79_DEV_AP9X_PCI=y -CONFIG_ATH79_DEV_DSA=y -CONFIG_ATH79_DEV_ETH=y -CONFIG_ATH79_DEV_GPIO_BUTTONS=y -CONFIG_ATH79_DEV_LEDS_GPIO=y -CONFIG_ATH79_DEV_M25P80=y -CONFIG_ATH79_DEV_NFC=y -CONFIG_ATH79_DEV_SPI=y -CONFIG_ATH79_DEV_USB=y -CONFIG_ATH79_DEV_WMAC=y -CONFIG_ATH79_MACH_ALFA_AP96=y -CONFIG_ATH79_MACH_ALFA_NX=y -CONFIG_ATH79_MACH_ALL0258N=y -CONFIG_ATH79_MACH_ALL0315N=y -CONFIG_ATH79_MACH_AP113=y -CONFIG_ATH79_MACH_AP121=y -CONFIG_ATH79_MACH_AP136=y -CONFIG_ATH79_MACH_AP81=y -CONFIG_ATH79_MACH_AP83=y -CONFIG_ATH79_MACH_AP96=y -CONFIG_ATH79_MACH_AW_NR580=y -CONFIG_ATH79_MACH_CAP4200AG=y -CONFIG_ATH79_MACH_DB120=y -CONFIG_ATH79_MACH_DIR_600_A1=y -CONFIG_ATH79_MACH_DIR_615_C1=y -CONFIG_ATH79_MACH_DIR_825_B1=y -CONFIG_ATH79_MACH_EAP7660D=y -CONFIG_ATH79_MACH_EW_DORIN=y -CONFIG_ATH79_MACH_HORNET_UB=y -CONFIG_ATH79_MACH_JA76PF=y -CONFIG_ATH79_MACH_JWAP003=y -CONFIG_ATH79_MACH_MR600=y -CONFIG_ATH79_MACH_MZK_W04NU=y -CONFIG_ATH79_MACH_MZK_W300NH=y -CONFIG_ATH79_MACH_NBG460N=y -CONFIG_ATH79_MACH_OM2P=y -CONFIG_ATH79_MACH_PB42=y -CONFIG_ATH79_MACH_PB44=y -CONFIG_ATH79_MACH_PB92=y -CONFIG_ATH79_MACH_RB2011=y -CONFIG_ATH79_MACH_RB4XX=y -CONFIG_ATH79_MACH_RB750=y -CONFIG_ATH79_MACH_RW2458N=y -CONFIG_ATH79_MACH_TEW_632BRP=y -CONFIG_ATH79_MACH_TEW_673GRU=y -CONFIG_ATH79_MACH_TEW_712BR=y -CONFIG_ATH79_MACH_TL_MR11U=y -CONFIG_ATH79_MACH_TL_MR3020=y -CONFIG_ATH79_MACH_TL_MR3X20=y -CONFIG_ATH79_MACH_TL_WA901ND=y -CONFIG_ATH79_MACH_TL_WA901ND_V2=y -CONFIG_ATH79_MACH_TL_WDR4300=y -CONFIG_ATH79_MACH_TL_WR1041N_V2=y -CONFIG_ATH79_MACH_TL_WR1043ND=y -CONFIG_ATH79_MACH_TL_WR2543N=y -CONFIG_ATH79_MACH_TL_WR703N=y -CONFIG_ATH79_MACH_TL_WR741ND=y -CONFIG_ATH79_MACH_TL_WR741ND_V4=y -CONFIG_ATH79_MACH_TL_WR841N_V1=y -CONFIG_ATH79_MACH_TL_WR841N_V8=y -CONFIG_ATH79_MACH_TL_WR941ND=y -CONFIG_ATH79_MACH_UBNT=y -CONFIG_ATH79_MACH_UBNT_XM=y -CONFIG_ATH79_MACH_WHR_HP_G300N=y -CONFIG_ATH79_MACH_WLAE_AG300N=y -CONFIG_ATH79_MACH_WNDR3700=y -CONFIG_ATH79_MACH_WNDR4300=y -CONFIG_ATH79_MACH_WNR2000=y -CONFIG_ATH79_MACH_WP543=y -CONFIG_ATH79_MACH_WPE72=y -CONFIG_ATH79_MACH_WRT160NL=y -CONFIG_ATH79_MACH_WRT400N=y -CONFIG_ATH79_MACH_WZR_HP_AG300H=y -CONFIG_ATH79_MACH_WZR_HP_G300NH=y -CONFIG_ATH79_MACH_WZR_HP_G300NH2=y -CONFIG_ATH79_MACH_WZR_HP_G450H=y -CONFIG_ATH79_MACH_ZCN_1523H=y -CONFIG_ATH79_NVRAM=y -CONFIG_ATH79_PCI_ATH9K_FIXUP=y -CONFIG_ATH79_ROUTERBOOT=y -# CONFIG_ATH79_WDT is not set -CONFIG_CC_OPTIMIZE_FOR_SIZE=y -CONFIG_CEVT_R4K=y -CONFIG_CEVT_R4K_LIB=y -CONFIG_CMDLINE="rootfstype=squashfs,yaffs,jffs2 noinitrd" -CONFIG_CMDLINE_BOOL=y -# CONFIG_CMDLINE_OVERRIDE is not set -CONFIG_CPU_BIG_ENDIAN=y -CONFIG_CPU_HAS_PREFETCH=y -CONFIG_CPU_HAS_SYNC=y -CONFIG_CPU_MIPS32=y -CONFIG_CPU_MIPS32_R2=y -CONFIG_CPU_MIPSR2=y -CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y -CONFIG_CPU_SUPPORTS_HIGHMEM=y -CONFIG_CSRC_R4K=y -CONFIG_CSRC_R4K_LIB=y -CONFIG_DECOMPRESS_LZMA=y -CONFIG_DMA_NONCOHERENT=y -CONFIG_EARLY_PRINTK=y -CONFIG_ETHERNET_PACKET_MANGLE=y -CONFIG_GENERIC_ATOMIC64=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_GENERIC_CLOCKEVENTS_BUILD=y -CONFIG_GENERIC_CMOS_UPDATE=y -CONFIG_GENERIC_GPIO=y -CONFIG_GENERIC_IRQ_SHOW=y -CONFIG_GENERIC_PCI_IOMAP=y -CONFIG_GPIOLIB=y -CONFIG_GPIO_NXP_74HC153=y -CONFIG_GPIO_PCF857X=y -CONFIG_GPIO_SYSFS=y -CONFIG_HARDWARE_WATCHPOINTS=y -CONFIG_HAS_DMA=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT=y -CONFIG_HAVE_ARCH_JUMP_LABEL=y -CONFIG_HAVE_ARCH_KGDB=y -CONFIG_HAVE_C_RECORDMCOUNT=y -CONFIG_HAVE_DMA_API_DEBUG=y -CONFIG_HAVE_DMA_ATTRS=y -CONFIG_HAVE_DYNAMIC_FTRACE=y -CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y -CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y -CONFIG_HAVE_FUNCTION_TRACER=y -CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y -CONFIG_HAVE_GENERIC_DMA_COHERENT=y -CONFIG_HAVE_GENERIC_HARDIRQS=y -CONFIG_HAVE_IDE=y -CONFIG_HAVE_IRQ_WORK=y -CONFIG_HAVE_MEMBLOCK=y -CONFIG_HAVE_MEMBLOCK_NODE_MAP=y -CONFIG_HAVE_OPROFILE=y -CONFIG_HAVE_PERF_EVENTS=y -CONFIG_HW_HAS_PCI=y -CONFIG_I2C=y -CONFIG_I2C_ALGOBIT=y -CONFIG_I2C_BOARDINFO=y -CONFIG_I2C_GPIO=y -CONFIG_IMAGE_CMDLINE_HACK=y -CONFIG_INITRAMFS_ROOT_GID=0 -CONFIG_INITRAMFS_ROOT_UID=0 -CONFIG_INITRAMFS_SOURCE="../../root" -CONFIG_IP17XX_PHY=y -CONFIG_IRQ_CPU=y -CONFIG_IRQ_FORCED_THREADING=y -# CONFIG_LEDS_RB750 is not set -# CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set -# CONFIG_LEDS_TRIGGER_NETDEV is not set -# CONFIG_LEDS_TRIGGER_TIMER is not set -# CONFIG_LEDS_WNDR3700_USB is not set -# CONFIG_M25PXX_USE_FAST_READ is not set -CONFIG_MARVELL_PHY=y -CONFIG_MDIO_BOARDINFO=y -CONFIG_MICREL_PHY=y -CONFIG_MIPS=y -CONFIG_MIPS_L1_CACHE_SHIFT=5 -CONFIG_MIPS_MACHINE=y -CONFIG_MIPS_MT_DISABLED=y -# CONFIG_MTD_CFI_INTELEXT is not set -CONFIG_MTD_CMDLINE_PARTS=y -CONFIG_MTD_JEDECPROBE=y -CONFIG_MTD_M25P80=y -CONFIG_MTD_MYLOADER_PARTS=y -CONFIG_MTD_PHYSMAP=y -CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-2 -CONFIG_MTD_REDBOOT_PARTS=y -CONFIG_MTD_TPLINK_PARTS=y -CONFIG_MTD_WRT160NL_PARTS=y -CONFIG_MYLOADER=y -CONFIG_NEED_DMA_MAP_STATE=y -CONFIG_NEED_PER_CPU_KM=y -CONFIG_NET_DSA=y -CONFIG_NET_DSA_MV88E6060=y -CONFIG_NET_DSA_MV88E6063=y -CONFIG_NET_DSA_TAG_TRAILER=y -CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y -CONFIG_PAGEFLAGS_EXTENDED=y -CONFIG_PCI=y -CONFIG_PCI_AR724X=y -CONFIG_PCI_DISABLE_COMMON_QUIRKS=y -CONFIG_PCI_DOMAINS=y -CONFIG_PERF_USE_VMALLOC=y -CONFIG_PHYLIB=y -# CONFIG_PREEMPT_RCU is not set -CONFIG_RLE_DECOMPRESS=y -CONFIG_RTL8306_PHY=y -CONFIG_RTL8366RB_PHY=y -CONFIG_RTL8366S_PHY=y -CONFIG_RTL8366_SMI=y -CONFIG_RTL8367_PHY=y -# CONFIG_SCSI_DMA is not set -CONFIG_SERIAL_8250_NR_UARTS=1 -CONFIG_SERIAL_8250_RUNTIME_UARTS=1 -CONFIG_SERIAL_AR933X=y -CONFIG_SERIAL_AR933X_CONSOLE=y -CONFIG_SERIAL_AR933X_NR_UARTS=2 -# CONFIG_SLAB is not set -CONFIG_SLUB=y -CONFIG_SOC_AR71XX=y -CONFIG_SOC_AR724X=y -CONFIG_SOC_AR913X=y -CONFIG_SOC_AR933X=y -CONFIG_SOC_AR934X=y -CONFIG_SOC_QCA955X=y -CONFIG_SPI=y -CONFIG_SPI_AP83=y -CONFIG_SPI_ATH79=y -CONFIG_SPI_BITBANG=y -CONFIG_SPI_MASTER=y -# CONFIG_SPI_RB4XX is not set -# CONFIG_SPI_RB4XX_CPLD is not set -# CONFIG_SPI_VSC7385 is not set -CONFIG_SWCONFIG=y -CONFIG_SWCONFIG_LEDS=y -CONFIG_SYS_HAS_CPU_MIPS32_R2=y -CONFIG_SYS_HAS_EARLY_PRINTK=y -CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y -CONFIG_SYS_SUPPORTS_ARBIT_HZ=y -CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y -CONFIG_USB_ARCH_HAS_XHCI=y -CONFIG_USB_SUPPORT=y -CONFIG_ZONE_DMA_FLAG=0 diff --git a/target/linux/ar71xx/patches-3.3/002-USB-use-generic-platform-driver-on-ath79.patch b/target/linux/ar71xx/patches-3.3/002-USB-use-generic-platform-driver-on-ath79.patch deleted file mode 100644 index d3a3b7106a..0000000000 --- a/target/linux/ar71xx/patches-3.3/002-USB-use-generic-platform-driver-on-ath79.patch +++ /dev/null @@ -1,544 +0,0 @@ -From dbcbcdd001c5943adbb18db3b8f0dafc405559eb Mon Sep 17 00:00:00 2001 -From: Hauke Mehrtens <hauke@hauke-m.de> -Date: Tue, 13 Mar 2012 01:04:53 +0100 -Subject: [PATCH 03/47] USB: use generic platform driver on ath79 - -The ath79 usb driver doesn't do anything special and is now converted -to the generic ehci and ohci driver. -This was tested on a TP-Link TL-WR1043ND (AR9132) - -Acked-by: Gabor Juhos <juhosg@openwrt.org> -CC: Imre Kaloz <kaloz@openwrt.org> -CC: linux-mips@linux-mips.org -CC: Ralf Baechle <ralf@linux-mips.org> -Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> -Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> ---- - arch/mips/ath79/dev-usb.c | 31 +++++- - drivers/usb/host/Kconfig | 12 ++- - drivers/usb/host/ehci-ath79.c | 208 ----------------------------------------- - drivers/usb/host/ehci-hcd.c | 5 - - drivers/usb/host/ohci-ath79.c | 151 ----------------------------- - drivers/usb/host/ohci-hcd.c | 5 - - 6 files changed, 35 insertions(+), 377 deletions(-) - delete mode 100644 drivers/usb/host/ehci-ath79.c - delete mode 100644 drivers/usb/host/ohci-ath79.c - ---- a/arch/mips/ath79/dev-usb.c -+++ b/arch/mips/ath79/dev-usb.c -@@ -17,6 +17,8 @@ - #include <linux/irq.h> - #include <linux/dma-mapping.h> - #include <linux/platform_device.h> -+#include <linux/usb/ehci_pdriver.h> -+#include <linux/usb/ohci_pdriver.h> - - #include <asm/mach-ath79/ath79.h> - #include <asm/mach-ath79/ar71xx_regs.h> -@@ -36,14 +38,19 @@ static struct resource ath79_ohci_resour - }; - - static u64 ath79_ohci_dmamask = DMA_BIT_MASK(32); -+ -+static struct usb_ohci_pdata ath79_ohci_pdata = { -+}; -+ - static struct platform_device ath79_ohci_device = { -- .name = "ath79-ohci", -+ .name = "ohci-platform", - .id = -1, - .resource = ath79_ohci_resources, - .num_resources = ARRAY_SIZE(ath79_ohci_resources), - .dev = { - .dma_mask = &ath79_ohci_dmamask, - .coherent_dma_mask = DMA_BIT_MASK(32), -+ .platform_data = &ath79_ohci_pdata, - }, - }; - -@@ -60,8 +67,20 @@ static struct resource ath79_ehci_resour - }; - - static u64 ath79_ehci_dmamask = DMA_BIT_MASK(32); -+ -+static struct usb_ehci_pdata ath79_ehci_pdata_v1 = { -+ .has_synopsys_hc_bug = 1, -+ .port_power_off = 1, -+}; -+ -+static struct usb_ehci_pdata ath79_ehci_pdata_v2 = { -+ .caps_offset = 0x100, -+ .has_tt = 1, -+ .port_power_off = 1, -+}; -+ - static struct platform_device ath79_ehci_device = { -- .name = "ath79-ehci", -+ .name = "ehci-platform", - .id = -1, - .resource = ath79_ehci_resources, - .num_resources = ARRAY_SIZE(ath79_ehci_resources), -@@ -101,7 +120,7 @@ static void __init ath79_usb_setup(void) - - ath79_ehci_resources[0].start = AR71XX_EHCI_BASE; - ath79_ehci_resources[0].end = AR71XX_EHCI_BASE + AR71XX_EHCI_SIZE - 1; -- ath79_ehci_device.name = "ar71xx-ehci"; -+ ath79_ehci_device.dev.platform_data = &ath79_ehci_pdata_v1; - platform_device_register(&ath79_ehci_device); - } - -@@ -142,7 +161,7 @@ static void __init ar724x_usb_setup(void - - ath79_ehci_resources[0].start = AR724X_EHCI_BASE; - ath79_ehci_resources[0].end = AR724X_EHCI_BASE + AR724X_EHCI_SIZE - 1; -- ath79_ehci_device.name = "ar724x-ehci"; -+ ath79_ehci_device.dev.platform_data = &ath79_ehci_pdata_v2; - platform_device_register(&ath79_ehci_device); - } - -@@ -159,7 +178,7 @@ static void __init ar913x_usb_setup(void - - ath79_ehci_resources[0].start = AR913X_EHCI_BASE; - ath79_ehci_resources[0].end = AR913X_EHCI_BASE + AR913X_EHCI_SIZE - 1; -- ath79_ehci_device.name = "ar913x-ehci"; -+ ath79_ehci_device.dev.platform_data = &ath79_ehci_pdata_v2; - platform_device_register(&ath79_ehci_device); - } - -@@ -176,7 +195,7 @@ static void __init ar933x_usb_setup(void - - ath79_ehci_resources[0].start = AR933X_EHCI_BASE; - ath79_ehci_resources[0].end = AR933X_EHCI_BASE + AR933X_EHCI_SIZE - 1; -- ath79_ehci_device.name = "ar933x-ehci"; -+ ath79_ehci_device.dev.platform_data = &ath79_ehci_pdata_v2; - platform_device_register(&ath79_ehci_device); - } - ---- a/drivers/usb/host/Kconfig -+++ b/drivers/usb/host/Kconfig -@@ -218,11 +218,15 @@ config USB_CNS3XXX_EHCI - support. - - config USB_EHCI_ATH79 -- bool "EHCI support for AR7XXX/AR9XXX SoCs" -+ bool "EHCI support for AR7XXX/AR9XXX SoCs (DEPRECATED)" - depends on USB_EHCI_HCD && (SOC_AR71XX || SOC_AR724X || SOC_AR913X || SOC_AR933X) - select USB_EHCI_ROOT_HUB_TT -+ select USB_EHCI_HCD_PLATFORM - default y - ---help--- -+ This option is deprecated now and the driver was removed, use -+ USB_EHCI_HCD_PLATFORM instead. -+ - Enables support for the built-in EHCI controller present - on the Atheros AR7XXX/AR9XXX SoCs. - -@@ -312,10 +316,14 @@ config USB_OHCI_HCD_OMAP3 - OMAP3 and later chips. - - config USB_OHCI_ATH79 -- bool "USB OHCI support for the Atheros AR71XX/AR7240 SoCs" -+ bool "USB OHCI support for the Atheros AR71XX/AR7240 SoCs (DEPRECATED)" - depends on USB_OHCI_HCD && (SOC_AR71XX || SOC_AR724X) -+ select USB_OHCI_HCD_PLATFORM - default y - help -+ This option is deprecated now and the driver was removed, use -+ USB_OHCI_HCD_PLATFORM instead. -+ - Enables support for the built-in OHCI controller present on the - Atheros AR71XX/AR7240 SoCs. - ---- a/drivers/usb/host/ehci-ath79.c -+++ /dev/null -@@ -1,208 +0,0 @@ --/* -- * Bus Glue for Atheros AR7XXX/AR9XXX built-in EHCI controller. -- * -- * Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org> -- * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> -- * -- * Parts of this file are based on Atheros' 2.6.15 BSP -- * Copyright (C) 2007 Atheros Communications, Inc. -- * -- * This program is free software; you can redistribute it and/or modify it -- * under the terms of the GNU General Public License version 2 as published -- * by the Free Software Foundation. -- */ -- --#include <linux/platform_device.h> -- --enum { -- EHCI_ATH79_IP_V1 = 0, -- EHCI_ATH79_IP_V2, --}; -- --static const struct platform_device_id ehci_ath79_id_table[] = { -- { -- .name = "ar71xx-ehci", -- .driver_data = EHCI_ATH79_IP_V1, -- }, -- { -- .name = "ar724x-ehci", -- .driver_data = EHCI_ATH79_IP_V2, -- }, -- { -- .name = "ar913x-ehci", -- .driver_data = EHCI_ATH79_IP_V2, -- }, -- { -- .name = "ar933x-ehci", -- .driver_data = EHCI_ATH79_IP_V2, -- }, -- { -- /* terminating entry */ -- }, --}; -- --MODULE_DEVICE_TABLE(platform, ehci_ath79_id_table); -- --static int ehci_ath79_init(struct usb_hcd *hcd) --{ -- struct ehci_hcd *ehci = hcd_to_ehci(hcd); -- struct platform_device *pdev = to_platform_device(hcd->self.controller); -- const struct platform_device_id *id; -- int ret; -- -- id = platform_get_device_id(pdev); -- if (!id) { -- dev_err(hcd->self.controller, "missing device id\n"); -- return -EINVAL; -- } -- -- switch (id->driver_data) { -- case EHCI_ATH79_IP_V1: -- ehci->has_synopsys_hc_bug = 1; -- -- ehci->caps = hcd->regs; -- ehci->regs = hcd->regs + -- HC_LENGTH(ehci, -- ehci_readl(ehci, &ehci->caps->hc_capbase)); -- break; -- -- case EHCI_ATH79_IP_V2: -- hcd->has_tt = 1; -- -- ehci->caps = hcd->regs + 0x100; -- ehci->regs = hcd->regs + 0x100 + -- HC_LENGTH(ehci, -- ehci_readl(ehci, &ehci->caps->hc_capbase)); -- break; -- -- default: -- BUG(); -- } -- -- dbg_hcs_params(ehci, "reset"); -- dbg_hcc_params(ehci, "reset"); -- ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params); -- ehci->sbrn = 0x20; -- -- ehci_reset(ehci); -- -- ret = ehci_init(hcd); -- if (ret) -- return ret; -- -- ehci_port_power(ehci, 0); -- -- return 0; --} -- --static const struct hc_driver ehci_ath79_hc_driver = { -- .description = hcd_name, -- .product_desc = "Atheros built-in EHCI controller", -- .hcd_priv_size = sizeof(struct ehci_hcd), -- .irq = ehci_irq, -- .flags = HCD_MEMORY | HCD_USB2, -- -- .reset = ehci_ath79_init, -- .start = ehci_run, -- .stop = ehci_stop, -- .shutdown = ehci_shutdown, -- -- .urb_enqueue = ehci_urb_enqueue, -- .urb_dequeue = ehci_urb_dequeue, -- .endpoint_disable = ehci_endpoint_disable, -- .endpoint_reset = ehci_endpoint_reset, -- -- .get_frame_number = ehci_get_frame, -- -- .hub_status_data = ehci_hub_status_data, -- .hub_control = ehci_hub_control, -- -- .relinquish_port = ehci_relinquish_port, -- .port_handed_over = ehci_port_handed_over, -- -- .clear_tt_buffer_complete = ehci_clear_tt_buffer_complete, --}; -- --static int ehci_ath79_probe(struct platform_device *pdev) --{ -- struct usb_hcd *hcd; -- struct resource *res; -- int irq; -- int ret; -- -- if (usb_disabled()) -- return -ENODEV; -- -- res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); -- if (!res) { -- dev_dbg(&pdev->dev, "no IRQ specified\n"); -- return -ENODEV; -- } -- irq = res->start; -- -- res = platform_get_resource(pdev, IORESOURCE_MEM, 0); -- if (!res) { -- dev_dbg(&pdev->dev, "no base address specified\n"); -- return -ENODEV; -- } -- -- hcd = usb_create_hcd(&ehci_ath79_hc_driver, &pdev->dev, -- dev_name(&pdev->dev)); -- if (!hcd) -- return -ENOMEM; -- -- hcd->rsrc_start = res->start; -- hcd->rsrc_len = resource_size(res); -- -- if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) { -- dev_dbg(&pdev->dev, "controller already in use\n"); -- ret = -EBUSY; -- goto err_put_hcd; -- } -- -- hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len); -- if (!hcd->regs) { -- dev_dbg(&pdev->dev, "error mapping memory\n"); -- ret = -EFAULT; -- goto err_release_region; -- } -- -- ret = usb_add_hcd(hcd, irq, IRQF_SHARED); -- if (ret) -- goto err_iounmap; -- -- return 0; -- --err_iounmap: -- iounmap(hcd->regs); -- --err_release_region: -- release_mem_region(hcd->rsrc_start, hcd->rsrc_len); --err_put_hcd: -- usb_put_hcd(hcd); -- return ret; --} -- --static int ehci_ath79_remove(struct platform_device *pdev) --{ -- struct usb_hcd *hcd = platform_get_drvdata(pdev); -- -- usb_remove_hcd(hcd); -- iounmap(hcd->regs); -- release_mem_region(hcd->rsrc_start, hcd->rsrc_len); -- usb_put_hcd(hcd); -- -- return 0; --} -- --static struct platform_driver ehci_ath79_driver = { -- .probe = ehci_ath79_probe, -- .remove = ehci_ath79_remove, -- .id_table = ehci_ath79_id_table, -- .driver = { -- .owner = THIS_MODULE, -- .name = "ath79-ehci", -- } --}; -- --MODULE_ALIAS(PLATFORM_MODULE_PREFIX "ath79-ehci"); ---- a/drivers/usb/host/ehci-hcd.c -+++ b/drivers/usb/host/ehci-hcd.c -@@ -1356,11 +1356,6 @@ MODULE_LICENSE ("GPL"); - #define PLATFORM_DRIVER s5p_ehci_driver - #endif - --#ifdef CONFIG_USB_EHCI_ATH79 --#include "ehci-ath79.c" --#define PLATFORM_DRIVER ehci_ath79_driver --#endif -- - #ifdef CONFIG_SPARC_LEON - #include "ehci-grlib.c" - #define PLATFORM_DRIVER ehci_grlib_driver ---- a/drivers/usb/host/ohci-ath79.c -+++ /dev/null -@@ -1,151 +0,0 @@ --/* -- * OHCI HCD (Host Controller Driver) for USB. -- * -- * Bus Glue for Atheros AR71XX/AR724X built-in OHCI controller. -- * -- * Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org> -- * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> -- * -- * Parts of this file are based on Atheros' 2.6.15 BSP -- * Copyright (C) 2007 Atheros Communications, Inc. -- * -- * This program is free software; you can redistribute it and/or modify it -- * under the terms of the GNU General Public License version 2 as published -- * by the Free Software Foundation. -- */ -- --#include <linux/platform_device.h> -- --static int __devinit ohci_ath79_start(struct usb_hcd *hcd) --{ -- struct ohci_hcd *ohci = hcd_to_ohci(hcd); -- int ret; -- -- ret = ohci_init(ohci); -- if (ret < 0) -- return ret; -- -- ret = ohci_run(ohci); -- if (ret < 0) -- goto err; -- -- return 0; -- --err: -- ohci_stop(hcd); -- return ret; --} -- --static const struct hc_driver ohci_ath79_hc_driver = { -- .description = hcd_name, -- .product_desc = "Atheros built-in OHCI controller", -- .hcd_priv_size = sizeof(struct ohci_hcd), -- -- .irq = ohci_irq, -- .flags = HCD_USB11 | HCD_MEMORY, -- -- .start = ohci_ath79_start, -- .stop = ohci_stop, -- .shutdown = ohci_shutdown, -- -- .urb_enqueue = ohci_urb_enqueue, -- .urb_dequeue = ohci_urb_dequeue, -- .endpoint_disable = ohci_endpoint_disable, -- -- /* -- * scheduling support -- */ -- .get_frame_number = ohci_get_frame, -- -- /* -- * root hub support -- */ -- .hub_status_data = ohci_hub_status_data, -- .hub_control = ohci_hub_control, -- .start_port_reset = ohci_start_port_reset, --}; -- --static int ohci_ath79_probe(struct platform_device *pdev) --{ -- struct usb_hcd *hcd; -- struct resource *res; -- int irq; -- int ret; -- -- if (usb_disabled()) -- return -ENODEV; -- -- res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); -- if (!res) { -- dev_dbg(&pdev->dev, "no IRQ specified\n"); -- return -ENODEV; -- } -- irq = res->start; -- -- hcd = usb_create_hcd(&ohci_ath79_hc_driver, &pdev->dev, -- dev_name(&pdev->dev)); -- if (!hcd) -- return -ENOMEM; -- -- res = platform_get_resource(pdev, IORESOURCE_MEM, 0); -- if (!res) { -- dev_dbg(&pdev->dev, "no base address specified\n"); -- ret = -ENODEV; -- goto err_put_hcd; -- } -- hcd->rsrc_start = res->start; -- hcd->rsrc_len = resource_size(res); -- -- if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) { -- dev_dbg(&pdev->dev, "controller already in use\n"); -- ret = -EBUSY; -- goto err_put_hcd; -- } -- -- hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len); -- if (!hcd->regs) { -- dev_dbg(&pdev->dev, "error mapping memory\n"); -- ret = -EFAULT; -- goto err_release_region; -- } -- -- ohci_hcd_init(hcd_to_ohci(hcd)); -- -- ret = usb_add_hcd(hcd, irq, 0); -- if (ret) -- goto err_stop_hcd; -- -- return 0; -- --err_stop_hcd: -- iounmap(hcd->regs); --err_release_region: -- release_mem_region(hcd->rsrc_start, hcd->rsrc_len); --err_put_hcd: -- usb_put_hcd(hcd); -- return ret; --} -- --static int ohci_ath79_remove(struct platform_device *pdev) --{ -- struct usb_hcd *hcd = platform_get_drvdata(pdev); -- -- usb_remove_hcd(hcd); -- iounmap(hcd->regs); -- release_mem_region(hcd->rsrc_start, hcd->rsrc_len); -- usb_put_hcd(hcd); -- -- return 0; --} -- --static struct platform_driver ohci_hcd_ath79_driver = { -- .probe = ohci_ath79_probe, -- .remove = ohci_ath79_remove, -- .shutdown = usb_hcd_platform_shutdown, -- .driver = { -- .name = "ath79-ohci", -- .owner = THIS_MODULE, -- }, --}; -- --MODULE_ALIAS(PLATFORM_MODULE_PREFIX "ath79-ohci"); ---- a/drivers/usb/host/ohci-hcd.c -+++ b/drivers/usb/host/ohci-hcd.c -@@ -1111,11 +1111,6 @@ MODULE_LICENSE ("GPL"); - #define PLATFORM_DRIVER ohci_hcd_cns3xxx_driver - #endif - --#ifdef CONFIG_USB_OHCI_ATH79 --#include "ohci-ath79.c" --#define PLATFORM_DRIVER ohci_hcd_ath79_driver --#endif -- - #ifdef CONFIG_CPU_XLR - #include "ohci-xls.c" - #define PLATFORM_DRIVER ohci_xls_driver diff --git a/target/linux/ar71xx/patches-3.3/100-MIPS-ath79-separate-common-PCI-code.patch b/target/linux/ar71xx/patches-3.3/100-MIPS-ath79-separate-common-PCI-code.patch deleted file mode 100644 index 6062c894fb..0000000000 --- a/target/linux/ar71xx/patches-3.3/100-MIPS-ath79-separate-common-PCI-code.patch +++ /dev/null @@ -1,150 +0,0 @@ -From 9d9c0d49315520754660c8df3f42d93ecf7dba7a Mon Sep 17 00:00:00 2001 -From: Gabor Juhos <juhosg@openwrt.org> -Date: Wed, 14 Mar 2012 10:29:21 +0100 -Subject: [PATCH 05/47] MIPS: ath79: separate common PCI code -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -The 'pcibios_map_irq' and 'pcibios_plat_dev_init' -are common functions and only instance one of them -can be present in a single kernel. - -Currently these functions can be built only if the -CONFIG_SOC_AR724X option is selected. However the -ath79 platform contain support for the AR71XX SoCs,. -The AR71XX SoCs have a differnet PCI controller, -and those will require a different code. - -Move the common PCI code into a separeate file in -order to be able to use that with other SoCs as -well. - -Signed-off-by: Gabor Juhos <juhosg@openwrt.org> -Acked-by: René Bolldorf <xsecute@googlemail.com> -Cc: linux-mips@linux-mips.org -Patchwork: https://patchwork.linux-mips.org/patch/3485/ -Signed-off-by: Ralf Baechle <ralf@linux-mips.org> ---- - arch/mips/ath79/Makefile | 1 + - arch/mips/ath79/pci.c | 46 +++++++++++++++++++++++++++++++++++++++++++ - arch/mips/pci/pci-ath724x.c | 34 ------------------------------- - 3 files changed, 47 insertions(+), 34 deletions(-) - create mode 100644 arch/mips/ath79/pci.c - ---- a/arch/mips/ath79/Makefile -+++ b/arch/mips/ath79/Makefile -@@ -11,6 +11,7 @@ - obj-y := prom.o setup.o irq.o common.o clock.o gpio.o - - obj-$(CONFIG_EARLY_PRINTK) += early_printk.o -+obj-$(CONFIG_PCI) += pci.o - - # - # Devices ---- /dev/null -+++ b/arch/mips/ath79/pci.c -@@ -0,0 +1,46 @@ -+/* -+ * Atheros AR71XX/AR724X specific PCI setup code -+ * -+ * Copyright (C) 2011 René Bolldorf <xsecute@googlemail.com> -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include <linux/pci.h> -+#include <asm/mach-ath79/pci-ath724x.h> -+ -+static struct ath724x_pci_data *pci_data; -+static int pci_data_size; -+ -+void ath724x_pci_add_data(struct ath724x_pci_data *data, int size) -+{ -+ pci_data = data; -+ pci_data_size = size; -+} -+ -+int __init pcibios_map_irq(const struct pci_dev *dev, uint8_t slot, uint8_t pin) -+{ -+ unsigned int devfn = dev->devfn; -+ int irq = -1; -+ -+ if (devfn > pci_data_size - 1) -+ return irq; -+ -+ irq = pci_data[devfn].irq; -+ -+ return irq; -+} -+ -+int pcibios_plat_dev_init(struct pci_dev *dev) -+{ -+ unsigned int devfn = dev->devfn; -+ -+ if (devfn > pci_data_size - 1) -+ return PCIBIOS_DEVICE_NOT_FOUND; -+ -+ dev->dev.platform_data = pci_data[devfn].pdata; -+ -+ return PCIBIOS_SUCCESSFUL; -+} ---- a/arch/mips/pci/pci-ath724x.c -+++ b/arch/mips/pci/pci-ath724x.c -@@ -9,7 +9,6 @@ - */ - - #include <linux/pci.h> --#include <asm/mach-ath79/pci-ath724x.h> - - #define reg_read(_phys) (*(unsigned int *) KSEG1ADDR(_phys)) - #define reg_write(_phys, _val) ((*(unsigned int *) KSEG1ADDR(_phys)) = (_val)) -@@ -19,8 +18,6 @@ - #define ATH724X_PCI_MEM_SIZE 0x08000000 - - static DEFINE_SPINLOCK(ath724x_pci_lock); --static struct ath724x_pci_data *pci_data; --static int pci_data_size; - - static int ath724x_pci_read(struct pci_bus *bus, unsigned int devfn, int where, - int size, uint32_t *value) -@@ -133,37 +130,6 @@ static struct pci_controller ath724x_pci - .mem_resource = &ath724x_mem_resource, - }; - --void ath724x_pci_add_data(struct ath724x_pci_data *data, int size) --{ -- pci_data = data; -- pci_data_size = size; --} -- --int __init pcibios_map_irq(const struct pci_dev *dev, uint8_t slot, uint8_t pin) --{ -- unsigned int devfn = dev->devfn; -- int irq = -1; -- -- if (devfn > pci_data_size - 1) -- return irq; -- -- irq = pci_data[devfn].irq; -- -- return irq; --} -- --int pcibios_plat_dev_init(struct pci_dev *dev) --{ -- unsigned int devfn = dev->devfn; -- -- if (devfn > pci_data_size - 1) -- return PCIBIOS_DEVICE_NOT_FOUND; -- -- dev->dev.platform_data = pci_data[devfn].pdata; -- -- return PCIBIOS_SUCCESSFUL; --} -- - static int __init ath724x_pcibios_init(void) - { - register_pci_controller(&ath724x_pci_controller); diff --git a/target/linux/ar71xx/patches-3.3/101-MIPS-ath79-rename-pci-ath724x.h.patch b/target/linux/ar71xx/patches-3.3/101-MIPS-ath79-rename-pci-ath724x.h.patch deleted file mode 100644 index f28f20cb23..0000000000 --- a/target/linux/ar71xx/patches-3.3/101-MIPS-ath79-rename-pci-ath724x.h.patch +++ /dev/null @@ -1,102 +0,0 @@ -From 293dcf4142717d8059540bd69d1517c442617569 Mon Sep 17 00:00:00 2001 -From: Gabor Juhos <juhosg@openwrt.org> -Date: Wed, 14 Mar 2012 10:29:22 +0100 -Subject: [PATCH 06/47] MIPS: ath79: rename pci-ath724x.h -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -The declared function in this header file is used by the -ath79 platform code only. Move the header to the platform -directory. - -Signed-off-by: Gabor Juhos <juhosg@openwrt.org> -Acked-by: René Bolldorf <xsecute@googlemail.com> -Cc: linux-mips@linux-mips.org -Patchwork: https://patchwork.linux-mips.org/patch/3486/ -Signed-off-by: Ralf Baechle <ralf@linux-mips.org> ---- - arch/mips/ath79/mach-ubnt-xm.c | 2 +- - arch/mips/ath79/pci.c | 2 +- - arch/mips/ath79/pci.h | 21 +++++++++++++++++++++ - arch/mips/include/asm/mach-ath79/pci-ath724x.h | 21 --------------------- - 4 files changed, 23 insertions(+), 23 deletions(-) - create mode 100644 arch/mips/ath79/pci.h - delete mode 100644 arch/mips/include/asm/mach-ath79/pci-ath724x.h - ---- a/arch/mips/ath79/mach-ubnt-xm.c -+++ b/arch/mips/ath79/mach-ubnt-xm.c -@@ -15,13 +15,13 @@ - - #ifdef CONFIG_PCI - #include <linux/ath9k_platform.h> --#include <asm/mach-ath79/pci-ath724x.h> - #endif /* CONFIG_PCI */ - - #include "machtypes.h" - #include "dev-gpio-buttons.h" - #include "dev-leds-gpio.h" - #include "dev-spi.h" -+#include "pci.h" - - #define UBNT_XM_GPIO_LED_L1 0 - #define UBNT_XM_GPIO_LED_L2 1 ---- a/arch/mips/ath79/pci.c -+++ b/arch/mips/ath79/pci.c -@@ -9,7 +9,7 @@ - */ - - #include <linux/pci.h> --#include <asm/mach-ath79/pci-ath724x.h> -+#include "pci.h" - - static struct ath724x_pci_data *pci_data; - static int pci_data_size; ---- /dev/null -+++ b/arch/mips/ath79/pci.h -@@ -0,0 +1,21 @@ -+/* -+ * Atheros 724x PCI support -+ * -+ * Copyright (C) 2011 René Bolldorf <xsecute@googlemail.com> -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#ifndef __ASM_MACH_ATH79_PCI_ATH724X_H -+#define __ASM_MACH_ATH79_PCI_ATH724X_H -+ -+struct ath724x_pci_data { -+ int irq; -+ void *pdata; -+}; -+ -+void ath724x_pci_add_data(struct ath724x_pci_data *data, int size); -+ -+#endif /* __ASM_MACH_ATH79_PCI_ATH724X_H */ ---- a/arch/mips/include/asm/mach-ath79/pci-ath724x.h -+++ /dev/null -@@ -1,21 +0,0 @@ --/* -- * Atheros 724x PCI support -- * -- * Copyright (C) 2011 René Bolldorf <xsecute@googlemail.com> -- * -- * This program is free software; you can redistribute it and/or modify it -- * under the terms of the GNU General Public License version 2 as published -- * by the Free Software Foundation. -- */ -- --#ifndef __ASM_MACH_ATH79_PCI_ATH724X_H --#define __ASM_MACH_ATH79_PCI_ATH724X_H -- --struct ath724x_pci_data { -- int irq; -- void *pdata; --}; -- --void ath724x_pci_add_data(struct ath724x_pci_data *data, int size); -- --#endif /* __ASM_MACH_ATH79_PCI_ATH724X_H */ diff --git a/target/linux/ar71xx/patches-3.3/102-MIPS-ath79-make-ath724x_pcibios_init-visible-for-ext.patch b/target/linux/ar71xx/patches-3.3/102-MIPS-ath79-make-ath724x_pcibios_init-visible-for-ext.patch deleted file mode 100644 index 9696a75228..0000000000 --- a/target/linux/ar71xx/patches-3.3/102-MIPS-ath79-make-ath724x_pcibios_init-visible-for-ext.patch +++ /dev/null @@ -1,61 +0,0 @@ -From a9e38566ebe755219db10fa155fa8f0f4efc20d9 Mon Sep 17 00:00:00 2001 -From: Gabor Juhos <juhosg@openwrt.org> -Date: Wed, 14 Mar 2012 10:29:23 +0100 -Subject: [PATCH 07/47] MIPS: ath79: make ath724x_pcibios_init visible for external code -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Signed-off-by: René Bolldorf <xsecute@googlemail.com> -Signed-off-by: Gabor Juhos <juhosg@openwrt.org> -Cc: linux-mips@linux-mips.org -Patchwork: https://patchwork.linux-mips.org/patch/3487/ -Signed-off-by: Ralf Baechle <ralf@linux-mips.org> ---- - arch/mips/include/asm/mach-ath79/pci.h | 20 ++++++++++++++++++++ - arch/mips/pci/pci-ath724x.c | 3 ++- - 2 files changed, 22 insertions(+), 1 deletions(-) - create mode 100644 arch/mips/include/asm/mach-ath79/pci.h - ---- /dev/null -+++ b/arch/mips/include/asm/mach-ath79/pci.h -@@ -0,0 +1,20 @@ -+/* -+ * Atheros 724x PCI support -+ * -+ * Copyright (C) 2011 René Bolldorf <xsecute@googlemail.com> -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#ifndef __ASM_MACH_ATH79_PCI_H -+#define __ASM_MACH_ATH79_PCI_H -+ -+#if defined(CONFIG_PCI) && defined(CONFIG_SOC_AR724X) -+int ath724x_pcibios_init(void); -+#else -+static inline int ath724x_pcibios_init(void) { return 0; } -+#endif -+ -+#endif /* __ASM_MACH_ATH79_PCI_H */ ---- a/arch/mips/pci/pci-ath724x.c -+++ b/arch/mips/pci/pci-ath724x.c -@@ -9,6 +9,7 @@ - */ - - #include <linux/pci.h> -+#include <asm/mach-ath79/pci.h> - - #define reg_read(_phys) (*(unsigned int *) KSEG1ADDR(_phys)) - #define reg_write(_phys, _val) ((*(unsigned int *) KSEG1ADDR(_phys)) = (_val)) -@@ -130,7 +131,7 @@ static struct pci_controller ath724x_pci - .mem_resource = &ath724x_mem_resource, - }; - --static int __init ath724x_pcibios_init(void) -+int __init ath724x_pcibios_init(void) - { - register_pci_controller(&ath724x_pci_controller); - diff --git a/target/linux/ar71xx/patches-3.3/103-MIPS-ath79-add-a-common-PCI-registration-function.patch b/target/linux/ar71xx/patches-3.3/103-MIPS-ath79-add-a-common-PCI-registration-function.patch deleted file mode 100644 index 34587b63a1..0000000000 --- a/target/linux/ar71xx/patches-3.3/103-MIPS-ath79-add-a-common-PCI-registration-function.patch +++ /dev/null @@ -1,78 +0,0 @@ -From e3edaac2e967f07ae3b726e64e1c290233361bc7 Mon Sep 17 00:00:00 2001 -From: Gabor Juhos <juhosg@openwrt.org> -Date: Wed, 14 Mar 2012 10:29:24 +0100 -Subject: [PATCH 08/47] MIPS: ath79: add a common PCI registration function - -The current code unconditionally registers the AR724X -specific PCI controller, even if the kernel is running -on a different SoC. - -Add a common function for PCI controller registration, -and only register the AR724X PCI controller if the kernel -is running on an AR724X SoC. - -Signed-off-by: Gabor Juhos <juhosg@openwrt.org> -Cc: linux-mips@linux-mips.org -Patchwork: https://patchwork.linux-mips.org/patch/3488/ -Signed-off-by: Ralf Baechle <ralf@linux-mips.org> ---- - arch/mips/ath79/mach-ubnt-xm.c | 1 + - arch/mips/ath79/pci.c | 10 ++++++++++ - arch/mips/ath79/pci.h | 6 ++++++ - arch/mips/pci/pci-ath724x.c | 2 -- - 4 files changed, 17 insertions(+), 2 deletions(-) - ---- a/arch/mips/ath79/mach-ubnt-xm.c -+++ b/arch/mips/ath79/mach-ubnt-xm.c -@@ -111,6 +111,7 @@ static void __init ubnt_xm_init(void) - ath724x_pci_add_data(ubnt_xm_pci_data, ARRAY_SIZE(ubnt_xm_pci_data)); - #endif /* CONFIG_PCI */ - -+ ath79_register_pci(); - } - - MIPS_MACHINE(ATH79_MACH_UBNT_XM, ---- a/arch/mips/ath79/pci.c -+++ b/arch/mips/ath79/pci.c -@@ -9,6 +9,8 @@ - */ - - #include <linux/pci.h> -+#include <asm/mach-ath79/ath79.h> -+#include <asm/mach-ath79/pci.h> - #include "pci.h" - - static struct ath724x_pci_data *pci_data; -@@ -44,3 +46,11 @@ int pcibios_plat_dev_init(struct pci_dev - - return PCIBIOS_SUCCESSFUL; - } -+ -+int __init ath79_register_pci(void) -+{ -+ if (soc_is_ar724x()) -+ return ath724x_pcibios_init(); -+ -+ return -ENODEV; -+} ---- a/arch/mips/ath79/pci.h -+++ b/arch/mips/ath79/pci.h -@@ -18,4 +18,10 @@ struct ath724x_pci_data { - - void ath724x_pci_add_data(struct ath724x_pci_data *data, int size); - -+#ifdef CONFIG_PCI -+int ath79_register_pci(void); -+#else -+static inline int ath79_register_pci(void) { return 0; } -+#endif -+ - #endif /* __ASM_MACH_ATH79_PCI_ATH724X_H */ ---- a/arch/mips/pci/pci-ath724x.c -+++ b/arch/mips/pci/pci-ath724x.c -@@ -137,5 +137,3 @@ int __init ath724x_pcibios_init(void) - - return PCIBIOS_SUCCESSFUL; - } -- --arch_initcall(ath724x_pcibios_init); diff --git a/target/linux/ar71xx/patches-3.3/104-MIPS-ath79-rename-pci-ath724x.c-to-make-it-reflect-t.patch b/target/linux/ar71xx/patches-3.3/104-MIPS-ath79-rename-pci-ath724x.c-to-make-it-reflect-t.patch deleted file mode 100644 index e7189289cc..0000000000 --- a/target/linux/ar71xx/patches-3.3/104-MIPS-ath79-rename-pci-ath724x.c-to-make-it-reflect-t.patch +++ /dev/null @@ -1,316 +0,0 @@ -From 36dfdaa097ee1b12139187dc89cfa23fbb92b53b Mon Sep 17 00:00:00 2001 -From: Gabor Juhos <juhosg@openwrt.org> -Date: Wed, 14 Mar 2012 10:29:25 +0100 -Subject: [PATCH 09/47] MIPS: ath79: rename pci-ath724x.c to make it reflect the real SoC name -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Signed-off-by: Gabor Juhos <juhosg@openwrt.org> -Acked-by: René Bolldorf <xsecute@googlemail.com> -Cc: linux-mips@linux-mips.org -Patchwork: https://patchwork.linux-mips.org/patch/3489/ -Signed-off-by: Ralf Baechle <ralf@linux-mips.org> ---- - arch/mips/pci/Makefile | 2 +- - arch/mips/pci/pci-ar724x.c | 139 +++++++++++++++++++++++++++++++++++++++++++ - arch/mips/pci/pci-ath724x.c | 139 ------------------------------------------- - 3 files changed, 140 insertions(+), 140 deletions(-) - create mode 100644 arch/mips/pci/pci-ar724x.c - delete mode 100644 arch/mips/pci/pci-ath724x.c - ---- a/arch/mips/pci/Makefile -+++ b/arch/mips/pci/Makefile -@@ -19,7 +19,7 @@ obj-$(CONFIG_BCM47XX) += pci-bcm47xx.o - obj-$(CONFIG_BCM63XX) += pci-bcm63xx.o fixup-bcm63xx.o \ - ops-bcm63xx.o - obj-$(CONFIG_MIPS_ALCHEMY) += pci-alchemy.o --obj-$(CONFIG_SOC_AR724X) += pci-ath724x.o -+obj-$(CONFIG_SOC_AR724X) += pci-ar724x.o - - # - # These are still pretty much in the old state, watch, go blind. ---- /dev/null -+++ b/arch/mips/pci/pci-ar724x.c -@@ -0,0 +1,139 @@ -+/* -+ * Atheros 724x PCI support -+ * -+ * Copyright (C) 2011 René Bolldorf <xsecute@googlemail.com> -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include <linux/pci.h> -+#include <asm/mach-ath79/pci.h> -+ -+#define reg_read(_phys) (*(unsigned int *) KSEG1ADDR(_phys)) -+#define reg_write(_phys, _val) ((*(unsigned int *) KSEG1ADDR(_phys)) = (_val)) -+ -+#define ATH724X_PCI_DEV_BASE 0x14000000 -+#define ATH724X_PCI_MEM_BASE 0x10000000 -+#define ATH724X_PCI_MEM_SIZE 0x08000000 -+ -+static DEFINE_SPINLOCK(ath724x_pci_lock); -+ -+static int ath724x_pci_read(struct pci_bus *bus, unsigned int devfn, int where, -+ int size, uint32_t *value) -+{ -+ unsigned long flags, addr, tval, mask; -+ -+ if (devfn) -+ return PCIBIOS_DEVICE_NOT_FOUND; -+ -+ if (where & (size - 1)) -+ return PCIBIOS_BAD_REGISTER_NUMBER; -+ -+ spin_lock_irqsave(&ath724x_pci_lock, flags); -+ -+ switch (size) { -+ case 1: -+ addr = where & ~3; -+ mask = 0xff000000 >> ((where % 4) * 8); -+ tval = reg_read(ATH724X_PCI_DEV_BASE + addr); -+ tval = tval & ~mask; -+ *value = (tval >> ((4 - (where % 4))*8)); -+ break; -+ case 2: -+ addr = where & ~3; -+ mask = 0xffff0000 >> ((where % 4)*8); -+ tval = reg_read(ATH724X_PCI_DEV_BASE + addr); -+ tval = tval & ~mask; -+ *value = (tval >> ((4 - (where % 4))*8)); -+ break; -+ case 4: -+ *value = reg_read(ATH724X_PCI_DEV_BASE + where); -+ break; -+ default: -+ spin_unlock_irqrestore(&ath724x_pci_lock, flags); -+ -+ return PCIBIOS_BAD_REGISTER_NUMBER; -+ } -+ -+ spin_unlock_irqrestore(&ath724x_pci_lock, flags); -+ -+ return PCIBIOS_SUCCESSFUL; -+} -+ -+static int ath724x_pci_write(struct pci_bus *bus, unsigned int devfn, int where, -+ int size, uint32_t value) -+{ -+ unsigned long flags, tval, addr, mask; -+ -+ if (devfn) -+ return PCIBIOS_DEVICE_NOT_FOUND; -+ -+ if (where & (size - 1)) -+ return PCIBIOS_BAD_REGISTER_NUMBER; -+ -+ spin_lock_irqsave(&ath724x_pci_lock, flags); -+ -+ switch (size) { -+ case 1: -+ addr = (ATH724X_PCI_DEV_BASE + where) & ~3; -+ mask = 0xff000000 >> ((where % 4)*8); -+ tval = reg_read(addr); -+ tval = tval & ~mask; -+ tval |= (value << ((4 - (where % 4))*8)) & mask; -+ reg_write(addr, tval); -+ break; -+ case 2: -+ addr = (ATH724X_PCI_DEV_BASE + where) & ~3; -+ mask = 0xffff0000 >> ((where % 4)*8); -+ tval = reg_read(addr); -+ tval = tval & ~mask; -+ tval |= (value << ((4 - (where % 4))*8)) & mask; -+ reg_write(addr, tval); -+ break; -+ case 4: -+ reg_write((ATH724X_PCI_DEV_BASE + where), value); -+ break; -+ default: -+ spin_unlock_irqrestore(&ath724x_pci_lock, flags); -+ -+ return PCIBIOS_BAD_REGISTER_NUMBER; -+ } -+ -+ spin_unlock_irqrestore(&ath724x_pci_lock, flags); -+ -+ return PCIBIOS_SUCCESSFUL; -+} -+ -+static struct pci_ops ath724x_pci_ops = { -+ .read = ath724x_pci_read, -+ .write = ath724x_pci_write, -+}; -+ -+static struct resource ath724x_io_resource = { -+ .name = "PCI IO space", -+ .start = 0, -+ .end = 0, -+ .flags = IORESOURCE_IO, -+}; -+ -+static struct resource ath724x_mem_resource = { -+ .name = "PCI memory space", -+ .start = ATH724X_PCI_MEM_BASE, -+ .end = ATH724X_PCI_MEM_BASE + ATH724X_PCI_MEM_SIZE - 1, -+ .flags = IORESOURCE_MEM, -+}; -+ -+static struct pci_controller ath724x_pci_controller = { -+ .pci_ops = &ath724x_pci_ops, -+ .io_resource = &ath724x_io_resource, -+ .mem_resource = &ath724x_mem_resource, -+}; -+ -+int __init ath724x_pcibios_init(void) -+{ -+ register_pci_controller(&ath724x_pci_controller); -+ -+ return PCIBIOS_SUCCESSFUL; -+} ---- a/arch/mips/pci/pci-ath724x.c -+++ /dev/null -@@ -1,139 +0,0 @@ --/* -- * Atheros 724x PCI support -- * -- * Copyright (C) 2011 René Bolldorf <xsecute@googlemail.com> -- * -- * This program is free software; you can redistribute it and/or modify it -- * under the terms of the GNU General Public License version 2 as published -- * by the Free Software Foundation. -- */ -- --#include <linux/pci.h> --#include <asm/mach-ath79/pci.h> -- --#define reg_read(_phys) (*(unsigned int *) KSEG1ADDR(_phys)) --#define reg_write(_phys, _val) ((*(unsigned int *) KSEG1ADDR(_phys)) = (_val)) -- --#define ATH724X_PCI_DEV_BASE 0x14000000 --#define ATH724X_PCI_MEM_BASE 0x10000000 --#define ATH724X_PCI_MEM_SIZE 0x08000000 -- --static DEFINE_SPINLOCK(ath724x_pci_lock); -- --static int ath724x_pci_read(struct pci_bus *bus, unsigned int devfn, int where, -- int size, uint32_t *value) --{ -- unsigned long flags, addr, tval, mask; -- -- if (devfn) -- return PCIBIOS_DEVICE_NOT_FOUND; -- -- if (where & (size - 1)) -- return PCIBIOS_BAD_REGISTER_NUMBER; -- -- spin_lock_irqsave(&ath724x_pci_lock, flags); -- -- switch (size) { -- case 1: -- addr = where & ~3; -- mask = 0xff000000 >> ((where % 4) * 8); -- tval = reg_read(ATH724X_PCI_DEV_BASE + addr); -- tval = tval & ~mask; -- *value = (tval >> ((4 - (where % 4))*8)); -- break; -- case 2: -- addr = where & ~3; -- mask = 0xffff0000 >> ((where % 4)*8); -- tval = reg_read(ATH724X_PCI_DEV_BASE + addr); -- tval = tval & ~mask; -- *value = (tval >> ((4 - (where % 4))*8)); -- break; -- case 4: -- *value = reg_read(ATH724X_PCI_DEV_BASE + where); -- break; -- default: -- spin_unlock_irqrestore(&ath724x_pci_lock, flags); -- -- return PCIBIOS_BAD_REGISTER_NUMBER; -- } -- -- spin_unlock_irqrestore(&ath724x_pci_lock, flags); -- -- return PCIBIOS_SUCCESSFUL; --} -- --static int ath724x_pci_write(struct pci_bus *bus, unsigned int devfn, int where, -- int size, uint32_t value) --{ -- unsigned long flags, tval, addr, mask; -- -- if (devfn) -- return PCIBIOS_DEVICE_NOT_FOUND; -- -- if (where & (size - 1)) -- return PCIBIOS_BAD_REGISTER_NUMBER; -- -- spin_lock_irqsave(&ath724x_pci_lock, flags); -- -- switch (size) { -- case 1: -- addr = (ATH724X_PCI_DEV_BASE + where) & ~3; -- mask = 0xff000000 >> ((where % 4)*8); -- tval = reg_read(addr); -- tval = tval & ~mask; -- tval |= (value << ((4 - (where % 4))*8)) & mask; -- reg_write(addr, tval); -- break; -- case 2: -- addr = (ATH724X_PCI_DEV_BASE + where) & ~3; -- mask = 0xffff0000 >> ((where % 4)*8); -- tval = reg_read(addr); -- tval = tval & ~mask; -- tval |= (value << ((4 - (where % 4))*8)) & mask; -- reg_write(addr, tval); -- break; -- case 4: -- reg_write((ATH724X_PCI_DEV_BASE + where), value); -- break; -- default: -- spin_unlock_irqrestore(&ath724x_pci_lock, flags); -- -- return PCIBIOS_BAD_REGISTER_NUMBER; -- } -- -- spin_unlock_irqrestore(&ath724x_pci_lock, flags); -- -- return PCIBIOS_SUCCESSFUL; --} -- --static struct pci_ops ath724x_pci_ops = { -- .read = ath724x_pci_read, -- .write = ath724x_pci_write, --}; -- --static struct resource ath724x_io_resource = { -- .name = "PCI IO space", -- .start = 0, -- .end = 0, -- .flags = IORESOURCE_IO, --}; -- --static struct resource ath724x_mem_resource = { -- .name = "PCI memory space", -- .start = ATH724X_PCI_MEM_BASE, -- .end = ATH724X_PCI_MEM_BASE + ATH724X_PCI_MEM_SIZE - 1, -- .flags = IORESOURCE_MEM, --}; -- --static struct pci_controller ath724x_pci_controller = { -- .pci_ops = &ath724x_pci_ops, -- .io_resource = &ath724x_io_resource, -- .mem_resource = &ath724x_mem_resource, --}; -- --int __init ath724x_pcibios_init(void) --{ -- register_pci_controller(&ath724x_pci_controller); -- -- return PCIBIOS_SUCCESSFUL; --} diff --git a/target/linux/ar71xx/patches-3.3/105-MIPS-ath79-replace-ath724x-to-ar724x.patch b/target/linux/ar71xx/patches-3.3/105-MIPS-ath79-replace-ath724x-to-ar724x.patch deleted file mode 100644 index 0a224ed54d..0000000000 --- a/target/linux/ar71xx/patches-3.3/105-MIPS-ath79-replace-ath724x-to-ar724x.patch +++ /dev/null @@ -1,264 +0,0 @@ -From 9f0c37b1d071355d4c027958f370823c8f891480 Mon Sep 17 00:00:00 2001 -From: Gabor Juhos <juhosg@openwrt.org> -Date: Wed, 14 Mar 2012 10:29:26 +0100 -Subject: [PATCH 10/47] MIPS: ath79: replace ath724x to ar724x -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Replace the 'ath724x' to 'ar724x' in function, variable and -structure names to reflect the name of the real SoC. - -Signed-off-by: Gabor Juhos <juhosg@openwrt.org> -Acked-by: René Bolldorf <xsecute@googlemail.com> -Cc: linux-mips@linux-mips.org -Patchwork: https://patchwork.linux-mips.org/patch/3490/ -Signed-off-by: Ralf Baechle <ralf@linux-mips.org> ---- - arch/mips/ath79/mach-ubnt-xm.c | 4 +- - arch/mips/ath79/pci.c | 6 ++-- - arch/mips/ath79/pci.h | 10 +++--- - arch/mips/include/asm/mach-ath79/pci.h | 4 +- - arch/mips/pci/pci-ar724x.c | 62 ++++++++++++++++---------------- - 5 files changed, 43 insertions(+), 43 deletions(-) - ---- a/arch/mips/ath79/mach-ubnt-xm.c -+++ b/arch/mips/ath79/mach-ubnt-xm.c -@@ -84,7 +84,7 @@ static struct ath79_spi_platform_data ub - #ifdef CONFIG_PCI - static struct ath9k_platform_data ubnt_xm_eeprom_data; - --static struct ath724x_pci_data ubnt_xm_pci_data[] = { -+static struct ar724x_pci_data ubnt_xm_pci_data[] = { - { - .irq = UBNT_XM_PCI_IRQ, - .pdata = &ubnt_xm_eeprom_data, -@@ -108,7 +108,7 @@ static void __init ubnt_xm_init(void) - memcpy(ubnt_xm_eeprom_data.eeprom_data, UBNT_XM_EEPROM_ADDR, - sizeof(ubnt_xm_eeprom_data.eeprom_data)); - -- ath724x_pci_add_data(ubnt_xm_pci_data, ARRAY_SIZE(ubnt_xm_pci_data)); -+ ar724x_pci_add_data(ubnt_xm_pci_data, ARRAY_SIZE(ubnt_xm_pci_data)); - #endif /* CONFIG_PCI */ - - ath79_register_pci(); ---- a/arch/mips/ath79/pci.c -+++ b/arch/mips/ath79/pci.c -@@ -13,10 +13,10 @@ - #include <asm/mach-ath79/pci.h> - #include "pci.h" - --static struct ath724x_pci_data *pci_data; -+static struct ar724x_pci_data *pci_data; - static int pci_data_size; - --void ath724x_pci_add_data(struct ath724x_pci_data *data, int size) -+void ar724x_pci_add_data(struct ar724x_pci_data *data, int size) - { - pci_data = data; - pci_data_size = size; -@@ -50,7 +50,7 @@ int pcibios_plat_dev_init(struct pci_dev - int __init ath79_register_pci(void) - { - if (soc_is_ar724x()) -- return ath724x_pcibios_init(); -+ return ar724x_pcibios_init(); - - return -ENODEV; - } ---- a/arch/mips/ath79/pci.h -+++ b/arch/mips/ath79/pci.h -@@ -8,15 +8,15 @@ - * by the Free Software Foundation. - */ - --#ifndef __ASM_MACH_ATH79_PCI_ATH724X_H --#define __ASM_MACH_ATH79_PCI_ATH724X_H -+#ifndef _ATH79_PCI_H -+#define _ATH79_PCI_H - --struct ath724x_pci_data { -+struct ar724x_pci_data { - int irq; - void *pdata; - }; - --void ath724x_pci_add_data(struct ath724x_pci_data *data, int size); -+void ar724x_pci_add_data(struct ar724x_pci_data *data, int size); - - #ifdef CONFIG_PCI - int ath79_register_pci(void); -@@ -24,4 +24,4 @@ int ath79_register_pci(void); - static inline int ath79_register_pci(void) { return 0; } - #endif - --#endif /* __ASM_MACH_ATH79_PCI_ATH724X_H */ -+#endif /* _ATH79_PCI_H */ ---- a/arch/mips/include/asm/mach-ath79/pci.h -+++ b/arch/mips/include/asm/mach-ath79/pci.h -@@ -12,9 +12,9 @@ - #define __ASM_MACH_ATH79_PCI_H - - #if defined(CONFIG_PCI) && defined(CONFIG_SOC_AR724X) --int ath724x_pcibios_init(void); -+int ar724x_pcibios_init(void); - #else --static inline int ath724x_pcibios_init(void) { return 0; } -+static inline int ar724x_pcibios_init(void) { return 0; } - #endif - - #endif /* __ASM_MACH_ATH79_PCI_H */ ---- a/arch/mips/pci/pci-ar724x.c -+++ b/arch/mips/pci/pci-ar724x.c -@@ -14,13 +14,13 @@ - #define reg_read(_phys) (*(unsigned int *) KSEG1ADDR(_phys)) - #define reg_write(_phys, _val) ((*(unsigned int *) KSEG1ADDR(_phys)) = (_val)) - --#define ATH724X_PCI_DEV_BASE 0x14000000 --#define ATH724X_PCI_MEM_BASE 0x10000000 --#define ATH724X_PCI_MEM_SIZE 0x08000000 -+#define AR724X_PCI_DEV_BASE 0x14000000 -+#define AR724X_PCI_MEM_BASE 0x10000000 -+#define AR724X_PCI_MEM_SIZE 0x08000000 - --static DEFINE_SPINLOCK(ath724x_pci_lock); -+static DEFINE_SPINLOCK(ar724x_pci_lock); - --static int ath724x_pci_read(struct pci_bus *bus, unsigned int devfn, int where, -+static int ar724x_pci_read(struct pci_bus *bus, unsigned int devfn, int where, - int size, uint32_t *value) - { - unsigned long flags, addr, tval, mask; -@@ -31,38 +31,38 @@ static int ath724x_pci_read(struct pci_b - if (where & (size - 1)) - return PCIBIOS_BAD_REGISTER_NUMBER; - -- spin_lock_irqsave(&ath724x_pci_lock, flags); -+ spin_lock_irqsave(&ar724x_pci_lock, flags); - - switch (size) { - case 1: - addr = where & ~3; - mask = 0xff000000 >> ((where % 4) * 8); -- tval = reg_read(ATH724X_PCI_DEV_BASE + addr); -+ tval = reg_read(AR724X_PCI_DEV_BASE + addr); - tval = tval & ~mask; - *value = (tval >> ((4 - (where % 4))*8)); - break; - case 2: - addr = where & ~3; - mask = 0xffff0000 >> ((where % 4)*8); -- tval = reg_read(ATH724X_PCI_DEV_BASE + addr); -+ tval = reg_read(AR724X_PCI_DEV_BASE + addr); - tval = tval & ~mask; - *value = (tval >> ((4 - (where % 4))*8)); - break; - case 4: -- *value = reg_read(ATH724X_PCI_DEV_BASE + where); -+ *value = reg_read(AR724X_PCI_DEV_BASE + where); - break; - default: -- spin_unlock_irqrestore(&ath724x_pci_lock, flags); -+ spin_unlock_irqrestore(&ar724x_pci_lock, flags); - - return PCIBIOS_BAD_REGISTER_NUMBER; - } - -- spin_unlock_irqrestore(&ath724x_pci_lock, flags); -+ spin_unlock_irqrestore(&ar724x_pci_lock, flags); - - return PCIBIOS_SUCCESSFUL; - } - --static int ath724x_pci_write(struct pci_bus *bus, unsigned int devfn, int where, -+static int ar724x_pci_write(struct pci_bus *bus, unsigned int devfn, int where, - int size, uint32_t value) - { - unsigned long flags, tval, addr, mask; -@@ -73,11 +73,11 @@ static int ath724x_pci_write(struct pci_ - if (where & (size - 1)) - return PCIBIOS_BAD_REGISTER_NUMBER; - -- spin_lock_irqsave(&ath724x_pci_lock, flags); -+ spin_lock_irqsave(&ar724x_pci_lock, flags); - - switch (size) { - case 1: -- addr = (ATH724X_PCI_DEV_BASE + where) & ~3; -+ addr = (AR724X_PCI_DEV_BASE + where) & ~3; - mask = 0xff000000 >> ((where % 4)*8); - tval = reg_read(addr); - tval = tval & ~mask; -@@ -85,7 +85,7 @@ static int ath724x_pci_write(struct pci_ - reg_write(addr, tval); - break; - case 2: -- addr = (ATH724X_PCI_DEV_BASE + where) & ~3; -+ addr = (AR724X_PCI_DEV_BASE + where) & ~3; - mask = 0xffff0000 >> ((where % 4)*8); - tval = reg_read(addr); - tval = tval & ~mask; -@@ -93,47 +93,47 @@ static int ath724x_pci_write(struct pci_ - reg_write(addr, tval); - break; - case 4: -- reg_write((ATH724X_PCI_DEV_BASE + where), value); -+ reg_write((AR724X_PCI_DEV_BASE + where), value); - break; - default: -- spin_unlock_irqrestore(&ath724x_pci_lock, flags); -+ spin_unlock_irqrestore(&ar724x_pci_lock, flags); - - return PCIBIOS_BAD_REGISTER_NUMBER; - } - -- spin_unlock_irqrestore(&ath724x_pci_lock, flags); -+ spin_unlock_irqrestore(&ar724x_pci_lock, flags); - - return PCIBIOS_SUCCESSFUL; - } - --static struct pci_ops ath724x_pci_ops = { -- .read = ath724x_pci_read, -- .write = ath724x_pci_write, -+static struct pci_ops ar724x_pci_ops = { -+ .read = ar724x_pci_read, -+ .write = ar724x_pci_write, - }; - --static struct resource ath724x_io_resource = { -+static struct resource ar724x_io_resource = { - .name = "PCI IO space", - .start = 0, - .end = 0, - .flags = IORESOURCE_IO, - }; - --static struct resource ath724x_mem_resource = { -+static struct resource ar724x_mem_resource = { - .name = "PCI memory space", -- .start = ATH724X_PCI_MEM_BASE, -- .end = ATH724X_PCI_MEM_BASE + ATH724X_PCI_MEM_SIZE - 1, -+ .start = AR724X_PCI_MEM_BASE, -+ .end = AR724X_PCI_MEM_BASE + AR724X_PCI_MEM_SIZE - 1, - .flags = IORESOURCE_MEM, - }; - --static struct pci_controller ath724x_pci_controller = { -- .pci_ops = &ath724x_pci_ops, -- .io_resource = &ath724x_io_resource, -- .mem_resource = &ath724x_mem_resource, -+static struct pci_controller ar724x_pci_controller = { -+ .pci_ops = &ar724x_pci_ops, -+ .io_resource = &ar724x_io_resource, -+ .mem_resource = &ar724x_mem_resource, - }; - --int __init ath724x_pcibios_init(void) -+int __init ar724x_pcibios_init(void) - { -- register_pci_controller(&ath724x_pci_controller); -+ register_pci_controller(&ar724x_pci_controller); - - return PCIBIOS_SUCCESSFUL; - } diff --git a/target/linux/ar71xx/patches-3.3/106-MIPS-ath79-use-io-accessor-macros-in-pci-ar724x.c.patch b/target/linux/ar71xx/patches-3.3/106-MIPS-ath79-use-io-accessor-macros-in-pci-ar724x.c.patch deleted file mode 100644 index 108ac10e43..0000000000 --- a/target/linux/ar71xx/patches-3.3/106-MIPS-ath79-use-io-accessor-macros-in-pci-ar724x.c.patch +++ /dev/null @@ -1,131 +0,0 @@ -From 0f5728e7e6fa7f0969ec79bd623261d3d830e5e7 Mon Sep 17 00:00:00 2001 -From: Gabor Juhos <juhosg@openwrt.org> -Date: Wed, 14 Mar 2012 10:29:27 +0100 -Subject: [PATCH 11/47] MIPS: ath79: use io-accessor macros in pci-ar724x.c -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Signed-off-by: Gabor Juhos <juhosg@openwrt.org> -Acked-by: René Bolldorf <xsecute@googlemail.com> -Cc: linux-mips@linux-mips.org -Patchwork: https://patchwork.linux-mips.org/patch/3491/ -Signed-off-by: Ralf Baechle <ralf@linux-mips.org> ---- - arch/mips/pci/pci-ar724x.c | 38 ++++++++++++++++++++++++-------------- - 1 files changed, 24 insertions(+), 14 deletions(-) - ---- a/arch/mips/pci/pci-ar724x.c -+++ b/arch/mips/pci/pci-ar724x.c -@@ -11,19 +11,19 @@ - #include <linux/pci.h> - #include <asm/mach-ath79/pci.h> - --#define reg_read(_phys) (*(unsigned int *) KSEG1ADDR(_phys)) --#define reg_write(_phys, _val) ((*(unsigned int *) KSEG1ADDR(_phys)) = (_val)) -- --#define AR724X_PCI_DEV_BASE 0x14000000 -+#define AR724X_PCI_CFG_BASE 0x14000000 -+#define AR724X_PCI_CFG_SIZE 0x1000 - #define AR724X_PCI_MEM_BASE 0x10000000 - #define AR724X_PCI_MEM_SIZE 0x08000000 - - static DEFINE_SPINLOCK(ar724x_pci_lock); -+static void __iomem *ar724x_pci_devcfg_base; - - static int ar724x_pci_read(struct pci_bus *bus, unsigned int devfn, int where, - int size, uint32_t *value) - { - unsigned long flags, addr, tval, mask; -+ void __iomem *base; - - if (devfn) - return PCIBIOS_DEVICE_NOT_FOUND; -@@ -31,25 +31,27 @@ static int ar724x_pci_read(struct pci_bu - if (where & (size - 1)) - return PCIBIOS_BAD_REGISTER_NUMBER; - -+ base = ar724x_pci_devcfg_base; -+ - spin_lock_irqsave(&ar724x_pci_lock, flags); - - switch (size) { - case 1: - addr = where & ~3; - mask = 0xff000000 >> ((where % 4) * 8); -- tval = reg_read(AR724X_PCI_DEV_BASE + addr); -+ tval = __raw_readl(base + addr); - tval = tval & ~mask; - *value = (tval >> ((4 - (where % 4))*8)); - break; - case 2: - addr = where & ~3; - mask = 0xffff0000 >> ((where % 4)*8); -- tval = reg_read(AR724X_PCI_DEV_BASE + addr); -+ tval = __raw_readl(base + addr); - tval = tval & ~mask; - *value = (tval >> ((4 - (where % 4))*8)); - break; - case 4: -- *value = reg_read(AR724X_PCI_DEV_BASE + where); -+ *value = __raw_readl(base + where); - break; - default: - spin_unlock_irqrestore(&ar724x_pci_lock, flags); -@@ -66,6 +68,7 @@ static int ar724x_pci_write(struct pci_b - int size, uint32_t value) - { - unsigned long flags, tval, addr, mask; -+ void __iomem *base; - - if (devfn) - return PCIBIOS_DEVICE_NOT_FOUND; -@@ -73,27 +76,29 @@ static int ar724x_pci_write(struct pci_b - if (where & (size - 1)) - return PCIBIOS_BAD_REGISTER_NUMBER; - -+ base = ar724x_pci_devcfg_base; -+ - spin_lock_irqsave(&ar724x_pci_lock, flags); - - switch (size) { - case 1: -- addr = (AR724X_PCI_DEV_BASE + where) & ~3; -+ addr = where & ~3; - mask = 0xff000000 >> ((where % 4)*8); -- tval = reg_read(addr); -+ tval = __raw_readl(base + addr); - tval = tval & ~mask; - tval |= (value << ((4 - (where % 4))*8)) & mask; -- reg_write(addr, tval); -+ __raw_writel(tval, base + addr); - break; - case 2: -- addr = (AR724X_PCI_DEV_BASE + where) & ~3; -+ addr = where & ~3; - mask = 0xffff0000 >> ((where % 4)*8); -- tval = reg_read(addr); -+ tval = __raw_readl(base + addr); - tval = tval & ~mask; - tval |= (value << ((4 - (where % 4))*8)) & mask; -- reg_write(addr, tval); -+ __raw_writel(tval, base + addr); - break; - case 4: -- reg_write((AR724X_PCI_DEV_BASE + where), value); -+ __raw_writel(value, (base + where)); - break; - default: - spin_unlock_irqrestore(&ar724x_pci_lock, flags); -@@ -133,6 +138,11 @@ static struct pci_controller ar724x_pci_ - - int __init ar724x_pcibios_init(void) - { -+ ar724x_pci_devcfg_base = ioremap(AR724X_PCI_CFG_BASE, -+ AR724X_PCI_CFG_SIZE); -+ if (ar724x_pci_devcfg_base == NULL) -+ return -ENOMEM; -+ - register_pci_controller(&ar724x_pci_controller); - - return PCIBIOS_SUCCESSFUL; diff --git a/target/linux/ar71xx/patches-3.3/107-MIPS-ath79-remove-superfluous-alignment-checks-from-.patch b/target/linux/ar71xx/patches-3.3/107-MIPS-ath79-remove-superfluous-alignment-checks-from-.patch deleted file mode 100644 index 9ce1c396e6..0000000000 --- a/target/linux/ar71xx/patches-3.3/107-MIPS-ath79-remove-superfluous-alignment-checks-from-.patch +++ /dev/null @@ -1,38 +0,0 @@ -From e9889bee75d03338daf7ed422661ae28f3aa7063 Mon Sep 17 00:00:00 2001 -From: Gabor Juhos <juhosg@openwrt.org> -Date: Wed, 14 Mar 2012 10:36:03 +0100 -Subject: [PATCH 12/47] MIPS: ath79: remove superfluous alignment checks from pci-ar724x.c - -The alignment of the 'where' parameters are checked -in the core PCI code already. - -Signed-off-by: Gabor Juhos <juhosg@openwrt.org> -Cc: linux-mips@linux-mips.org -Patchwork: https://patchwork.linux-mips.org/patch/3492/ -Signed-off-by: Ralf Baechle <ralf@linux-mips.org> ---- - arch/mips/pci/pci-ar724x.c | 6 ------ - 1 files changed, 0 insertions(+), 6 deletions(-) - ---- a/arch/mips/pci/pci-ar724x.c -+++ b/arch/mips/pci/pci-ar724x.c -@@ -28,9 +28,6 @@ static int ar724x_pci_read(struct pci_bu - if (devfn) - return PCIBIOS_DEVICE_NOT_FOUND; - -- if (where & (size - 1)) -- return PCIBIOS_BAD_REGISTER_NUMBER; -- - base = ar724x_pci_devcfg_base; - - spin_lock_irqsave(&ar724x_pci_lock, flags); -@@ -73,9 +70,6 @@ static int ar724x_pci_write(struct pci_b - if (devfn) - return PCIBIOS_DEVICE_NOT_FOUND; - -- if (where & (size - 1)) -- return PCIBIOS_BAD_REGISTER_NUMBER; -- - base = ar724x_pci_devcfg_base; - - spin_lock_irqsave(&ar724x_pci_lock, flags); diff --git a/target/linux/ar71xx/patches-3.3/108-MIPS-ath79-fix-broken-ar724x_pci_-read-write-functio.patch b/target/linux/ar71xx/patches-3.3/108-MIPS-ath79-fix-broken-ar724x_pci_-read-write-functio.patch deleted file mode 100644 index 97db6de9a8..0000000000 --- a/target/linux/ar71xx/patches-3.3/108-MIPS-ath79-fix-broken-ar724x_pci_-read-write-functio.patch +++ /dev/null @@ -1,134 +0,0 @@ -From 39f3275077a5b143616fcb3e7a6457a5c42739ee Mon Sep 17 00:00:00 2001 -From: Gabor Juhos <juhosg@openwrt.org> -Date: Wed, 14 Mar 2012 10:36:04 +0100 -Subject: [PATCH 13/47] MIPS: ath79: fix broken ar724x_pci_{read,write} functions - -The current ar724x_pci_{read,write} functions are -broken. Due to that, pci_read_config_byte returns -with bogus values, and pci_write_config_{byte,word} -unconditionally clears the accessed PCI configuration -registers instead of changing the value of them. - -The patch fixes the broken functions, thus the PCI -configuration space can be accessed correctly. - -Signed-off-by: Gabor Juhos <juhosg@openwrt.org> -Cc: linux-mips@linux-mips.org -Patchwork: https://patchwork.linux-mips.org/patch/3493/ -Signed-off-by: Ralf Baechle <ralf@linux-mips.org> ---- - arch/mips/pci/pci-ar724x.c | 52 ++++++++++++++++++++++---------------------- - 1 files changed, 26 insertions(+), 26 deletions(-) - ---- a/arch/mips/pci/pci-ar724x.c -+++ b/arch/mips/pci/pci-ar724x.c -@@ -22,8 +22,9 @@ static void __iomem *ar724x_pci_devcfg_b - static int ar724x_pci_read(struct pci_bus *bus, unsigned int devfn, int where, - int size, uint32_t *value) - { -- unsigned long flags, addr, tval, mask; -+ unsigned long flags; - void __iomem *base; -+ u32 data; - - if (devfn) - return PCIBIOS_DEVICE_NOT_FOUND; -@@ -31,24 +32,22 @@ static int ar724x_pci_read(struct pci_bu - base = ar724x_pci_devcfg_base; - - spin_lock_irqsave(&ar724x_pci_lock, flags); -+ data = __raw_readl(base + (where & ~3)); - - switch (size) { - case 1: -- addr = where & ~3; -- mask = 0xff000000 >> ((where % 4) * 8); -- tval = __raw_readl(base + addr); -- tval = tval & ~mask; -- *value = (tval >> ((4 - (where % 4))*8)); -+ if (where & 1) -+ data >>= 8; -+ if (where & 2) -+ data >>= 16; -+ data &= 0xff; - break; - case 2: -- addr = where & ~3; -- mask = 0xffff0000 >> ((where % 4)*8); -- tval = __raw_readl(base + addr); -- tval = tval & ~mask; -- *value = (tval >> ((4 - (where % 4))*8)); -+ if (where & 2) -+ data >>= 16; -+ data &= 0xffff; - break; - case 4: -- *value = __raw_readl(base + where); - break; - default: - spin_unlock_irqrestore(&ar724x_pci_lock, flags); -@@ -57,6 +56,7 @@ static int ar724x_pci_read(struct pci_bu - } - - spin_unlock_irqrestore(&ar724x_pci_lock, flags); -+ *value = data; - - return PCIBIOS_SUCCESSFUL; - } -@@ -64,8 +64,10 @@ static int ar724x_pci_read(struct pci_bu - static int ar724x_pci_write(struct pci_bus *bus, unsigned int devfn, int where, - int size, uint32_t value) - { -- unsigned long flags, tval, addr, mask; -+ unsigned long flags; - void __iomem *base; -+ u32 data; -+ int s; - - if (devfn) - return PCIBIOS_DEVICE_NOT_FOUND; -@@ -73,26 +75,21 @@ static int ar724x_pci_write(struct pci_b - base = ar724x_pci_devcfg_base; - - spin_lock_irqsave(&ar724x_pci_lock, flags); -+ data = __raw_readl(base + (where & ~3)); - - switch (size) { - case 1: -- addr = where & ~3; -- mask = 0xff000000 >> ((where % 4)*8); -- tval = __raw_readl(base + addr); -- tval = tval & ~mask; -- tval |= (value << ((4 - (where % 4))*8)) & mask; -- __raw_writel(tval, base + addr); -+ s = ((where & 3) * 8); -+ data &= ~(0xff << s); -+ data |= ((value & 0xff) << s); - break; - case 2: -- addr = where & ~3; -- mask = 0xffff0000 >> ((where % 4)*8); -- tval = __raw_readl(base + addr); -- tval = tval & ~mask; -- tval |= (value << ((4 - (where % 4))*8)) & mask; -- __raw_writel(tval, base + addr); -+ s = ((where & 2) * 8); -+ data &= ~(0xffff << s); -+ data |= ((value & 0xffff) << s); - break; - case 4: -- __raw_writel(value, (base + where)); -+ data = value; - break; - default: - spin_unlock_irqrestore(&ar724x_pci_lock, flags); -@@ -100,6 +97,9 @@ static int ar724x_pci_write(struct pci_b - return PCIBIOS_BAD_REGISTER_NUMBER; - } - -+ __raw_writel(data, base + (where & ~3)); -+ /* flush write */ -+ __raw_readl(base + (where & ~3)); - spin_unlock_irqrestore(&ar724x_pci_lock, flags); - - return PCIBIOS_SUCCESSFUL; diff --git a/target/linux/ar71xx/patches-3.3/109-MIPS-ath79-add-a-workaround-for-a-PCI-controller-bug.patch b/target/linux/ar71xx/patches-3.3/109-MIPS-ath79-add-a-workaround-for-a-PCI-controller-bug.patch deleted file mode 100644 index 8ed823b59a..0000000000 --- a/target/linux/ar71xx/patches-3.3/109-MIPS-ath79-add-a-workaround-for-a-PCI-controller-bug.patch +++ /dev/null @@ -1,134 +0,0 @@ -From 14eaf9b1cda516b4182e56f61c21fa2eaa9ade6b Mon Sep 17 00:00:00 2001 -From: Gabor Juhos <juhosg@openwrt.org> -Date: Wed, 14 Mar 2012 10:36:05 +0100 -Subject: [PATCH 14/47] MIPS: ath79: add a workaround for a PCI controller bug in AR7240 SoCs - -The PCI controller of the AR724X SoCs has a hardware -bag. If the BAR0 register of the PCI device is set to -the proper base address, the memory address space of -the device is not accessible. - -When the device driver tries to access the memory -address space of the PCI device, it leads to data -bus error, similiar to this: - -Data bus error, epc == 801f69a0, ra == 801f698c -Oops[#1]: -Cpu 0 -$ 0 : 00000000 00000061 deadbeef 000000ff -$ 4 : 00000000 000000ff 00000014 00000000 -$ 8 : ff000000 fffffffc 00000000 00000000 -$12 : 000001f5 00000006 00000000 6e637920 -$16 : 81ca4000 81ca0260 81ca4000 804d70f0 -$20 : fffffff4 0000002b 803ad4c4 00000000 -$24 : 00000003 00000000 -$28 : 81c20000 81c21c60 00000000 801f698c -Hi : 00000000 -Lo : 00000000 -epc : 801f69a0 ath9k_hw_init+0xd0/0xa70 - Not tainted -ra : 801f698c ath9k_hw_init+0xbc/0xa70 -Status: 1000c103 KERNEL EXL IE -Cause : 1080001c -PrId : 00019374 (MIPS 24Kc) -Modules linked in: -Process swapper (pid: 1, threadinfo=81c20000, task=81c18000, tls=00000000) -Stack : 00000000 00000000 00000000 00000000 81c21c78 81ca0260 00000000 804d70f0 - 81ca0260 81c21cc0 81ca0e80 81ca0260 81ca4000 804d70f0 fffffff4 0000002b - 803ad4c4 00000000 00000000 801e3ae8 81c9d080 81ca0e80 b0000000 800b9b9c - 00000008 81c9d000 8031aeb0 802d38a0 00000000 81c14c00 81c14c60 00000000 - 81ca0e80 81ca0260 b0000000 801f08a4 81c9c820 81c21d48 81c9c820 80144320 - ... -Call Trace: -[<801f69a0>] ath9k_hw_init+0xd0/0xa70 -[<801e3ae8>] ath9k_init_device+0x174/0x680 -[<801f08a4>] ath_pci_probe+0x27c/0x380 -[<8019e490>] pci_device_probe+0x74/0x9c -[<801bfadc>] driver_probe_device+0x9c/0x1b4 -[<801bfcb0>] __driver_attach+0xbc/0xc4 -[<801bea0c>] bus_for_each_dev+0x5c/0x98 -[<801bf394>] bus_add_driver+0x1d0/0x2a4 -[<801c0364>] driver_register+0x8c/0x16c -[<8019e72c>] __pci_register_driver+0x4c/0xe4 -[<803d3d40>] ath9k_init+0x3c/0x88 -[<80060930>] do_one_initcall+0x3c/0x1cc -[<803c297c>] kernel_init+0xa4/0x138 -[<80063c04>] kernel_thread_helper+0x10/0x18 - -Signed-off-by: Gabor Juhos <juhosg@openwrt.org> -Cc: linux-mips@linux-mips.org -Patchwork: https://patchwork.linux-mips.org/patch/3494/ -Signed-off-by: Ralf Baechle <ralf@linux-mips.org> ---- - arch/mips/pci/pci-ar724x.c | 36 +++++++++++++++++++++++++++++++++++- - 1 files changed, 35 insertions(+), 1 deletions(-) - ---- a/arch/mips/pci/pci-ar724x.c -+++ b/arch/mips/pci/pci-ar724x.c -@@ -9,6 +9,7 @@ - */ - - #include <linux/pci.h> -+#include <asm/mach-ath79/ath79.h> - #include <asm/mach-ath79/pci.h> - - #define AR724X_PCI_CFG_BASE 0x14000000 -@@ -16,9 +17,14 @@ - #define AR724X_PCI_MEM_BASE 0x10000000 - #define AR724X_PCI_MEM_SIZE 0x08000000 - -+#define AR7240_BAR0_WAR_VALUE 0xffff -+ - static DEFINE_SPINLOCK(ar724x_pci_lock); - static void __iomem *ar724x_pci_devcfg_base; - -+static u32 ar724x_pci_bar0_value; -+static bool ar724x_pci_bar0_is_cached; -+ - static int ar724x_pci_read(struct pci_bus *bus, unsigned int devfn, int where, - int size, uint32_t *value) - { -@@ -56,7 +62,14 @@ static int ar724x_pci_read(struct pci_bu - } - - spin_unlock_irqrestore(&ar724x_pci_lock, flags); -- *value = data; -+ -+ if (where == PCI_BASE_ADDRESS_0 && size == 4 && -+ ar724x_pci_bar0_is_cached) { -+ /* use the cached value */ -+ *value = ar724x_pci_bar0_value; -+ } else { -+ *value = data; -+ } - - return PCIBIOS_SUCCESSFUL; - } -@@ -72,6 +85,27 @@ static int ar724x_pci_write(struct pci_b - if (devfn) - return PCIBIOS_DEVICE_NOT_FOUND; - -+ if (soc_is_ar7240() && where == PCI_BASE_ADDRESS_0 && size == 4) { -+ if (value != 0xffffffff) { -+ /* -+ * WAR for a hw issue. If the BAR0 register of the -+ * device is set to the proper base address, the -+ * memory space of the device is not accessible. -+ * -+ * Cache the intended value so it can be read back, -+ * and write a SoC specific constant value to the -+ * BAR0 register in order to make the device memory -+ * accessible. -+ */ -+ ar724x_pci_bar0_is_cached = true; -+ ar724x_pci_bar0_value = value; -+ -+ value = AR7240_BAR0_WAR_VALUE; -+ } else { -+ ar724x_pci_bar0_is_cached = false; -+ } -+ } -+ - base = ar724x_pci_devcfg_base; - - spin_lock_irqsave(&ar724x_pci_lock, flags); diff --git a/target/linux/ar71xx/patches-3.3/110-MIPS-ath79-fix-a-wrong-IRQ-number.patch b/target/linux/ar71xx/patches-3.3/110-MIPS-ath79-fix-a-wrong-IRQ-number.patch deleted file mode 100644 index 8702e65fc0..0000000000 --- a/target/linux/ar71xx/patches-3.3/110-MIPS-ath79-fix-a-wrong-IRQ-number.patch +++ /dev/null @@ -1,73 +0,0 @@ -From d710990df726cceffb62488e597ecfc4a9e13aa5 Mon Sep 17 00:00:00 2001 -From: Gabor Juhos <juhosg@openwrt.org> -Date: Wed, 14 Mar 2012 10:36:06 +0100 -Subject: [PATCH 15/47] MIPS: ath79: fix a wrong IRQ number - -The Ubiquiti XM board setup code uses an invalid -IRQ number, because it if above of NR_IRQS. This -leads to failed 'request_irq' calls: - - ath9k 0000:00:00.0: request_irq failed - ath9k: probe of 0000:00:00.0 failed with error -22 - -Preserve some IRQ numbers for the built-in IRQ -controller of PCI host controllers in the -AR71XX/AR724X SoCs, and use the correct IRQ -number in the board setup code. - -Signed-off-by: Gabor Juhos <juhosg@openwrt.org> -Cc: linux-mips@linux-mips.org -Patchwork: https://patchwork.linux-mips.org/patch/3495/ -Signed-off-by: Ralf Baechle <ralf@linux-mips.org> ---- - arch/mips/ath79/mach-ubnt-xm.c | 5 +++-- - arch/mips/include/asm/mach-ath79/irq.h | 6 +++++- - 2 files changed, 8 insertions(+), 3 deletions(-) - ---- a/arch/mips/ath79/mach-ubnt-xm.c -+++ b/arch/mips/ath79/mach-ubnt-xm.c -@@ -17,6 +17,8 @@ - #include <linux/ath9k_platform.h> - #endif /* CONFIG_PCI */ - -+#include <asm/mach-ath79/irq.h> -+ - #include "machtypes.h" - #include "dev-gpio-buttons.h" - #include "dev-leds-gpio.h" -@@ -33,7 +35,6 @@ - #define UBNT_XM_KEYS_POLL_INTERVAL 20 - #define UBNT_XM_KEYS_DEBOUNCE_INTERVAL (3 * UBNT_XM_KEYS_POLL_INTERVAL) - --#define UBNT_XM_PCI_IRQ 48 - #define UBNT_XM_EEPROM_ADDR (u8 *) KSEG1ADDR(0x1fff1000) - - static struct gpio_led ubnt_xm_leds_gpio[] __initdata = { -@@ -86,7 +87,7 @@ static struct ath9k_platform_data ubnt_x - - static struct ar724x_pci_data ubnt_xm_pci_data[] = { - { -- .irq = UBNT_XM_PCI_IRQ, -+ .irq = ATH79_PCI_IRQ(0), - .pdata = &ubnt_xm_eeprom_data, - }, - }; ---- a/arch/mips/include/asm/mach-ath79/irq.h -+++ b/arch/mips/include/asm/mach-ath79/irq.h -@@ -10,11 +10,15 @@ - #define __ASM_MACH_ATH79_IRQ_H - - #define MIPS_CPU_IRQ_BASE 0 --#define NR_IRQS 40 -+#define NR_IRQS 46 - - #define ATH79_MISC_IRQ_BASE 8 - #define ATH79_MISC_IRQ_COUNT 32 - -+#define ATH79_PCI_IRQ_BASE (ATH79_MISC_IRQ_BASE + ATH79_MISC_IRQ_COUNT) -+#define ATH79_PCI_IRQ_COUNT 6 -+#define ATH79_PCI_IRQ(_x) (ATH79_PCI_IRQ_BASE + (_x)) -+ - #define ATH79_CPU_IRQ_IP2 (MIPS_CPU_IRQ_BASE + 2) - #define ATH79_CPU_IRQ_USB (MIPS_CPU_IRQ_BASE + 3) - #define ATH79_CPU_IRQ_GE0 (MIPS_CPU_IRQ_BASE + 4) diff --git a/target/linux/ar71xx/patches-3.3/111-MIPS-ath79-add-PCI-IRQ-handling-code-for-AR724X-SoCs.patch b/target/linux/ar71xx/patches-3.3/111-MIPS-ath79-add-PCI-IRQ-handling-code-for-AR724X-SoCs.patch deleted file mode 100644 index 0c15a54967..0000000000 --- a/target/linux/ar71xx/patches-3.3/111-MIPS-ath79-add-PCI-IRQ-handling-code-for-AR724X-SoCs.patch +++ /dev/null @@ -1,213 +0,0 @@ -From 1fd24b552708544ca6233ff7ba60342e9f7e5582 Mon Sep 17 00:00:00 2001 -From: Gabor Juhos <juhosg@openwrt.org> -Date: Wed, 14 Mar 2012 10:36:07 +0100 -Subject: [PATCH 16/47] MIPS: ath79: add PCI IRQ handling code for AR724X SoCs - -The PCI Host Controller of the AR724x SoC has a -built-in IRQ controller. The current code does -not supports that, so the IRQ lines wired to this -controller are not usable. This leads to failed -'request_irq' calls: - - ath9k 0000:00:00.0: request_irq failed - ath9k: probe of 0000:00:00.0 failed with error -89 - -This patch adds support for the IRQ controller -in order to make PCI IRQs work. - -Signed-off-by: Gabor Juhos <juhosg@openwrt.org> -Cc: linux-mips@linux-mips.org -Patchwork: https://patchwork.linux-mips.org/patch/3496/ -Signed-off-by: Ralf Baechle <ralf@linux-mips.org> ---- - arch/mips/ath79/pci.c | 3 +- - arch/mips/include/asm/mach-ath79/pci.h | 4 +- - arch/mips/pci/pci-ar724x.c | 118 +++++++++++++++++++++++++++++++- - 3 files changed, 120 insertions(+), 5 deletions(-) - ---- a/arch/mips/ath79/pci.c -+++ b/arch/mips/ath79/pci.c -@@ -10,6 +10,7 @@ - - #include <linux/pci.h> - #include <asm/mach-ath79/ath79.h> -+#include <asm/mach-ath79/irq.h> - #include <asm/mach-ath79/pci.h> - #include "pci.h" - -@@ -50,7 +51,7 @@ int pcibios_plat_dev_init(struct pci_dev - int __init ath79_register_pci(void) - { - if (soc_is_ar724x()) -- return ar724x_pcibios_init(); -+ return ar724x_pcibios_init(ATH79_CPU_IRQ_IP2); - - return -ENODEV; - } ---- a/arch/mips/include/asm/mach-ath79/pci.h -+++ b/arch/mips/include/asm/mach-ath79/pci.h -@@ -12,9 +12,9 @@ - #define __ASM_MACH_ATH79_PCI_H - - #if defined(CONFIG_PCI) && defined(CONFIG_SOC_AR724X) --int ar724x_pcibios_init(void); -+int ar724x_pcibios_init(int irq); - #else --static inline int ar724x_pcibios_init(void) { return 0; } -+static inline int ar724x_pcibios_init(int irq) { return 0; } - #endif - - #endif /* __ASM_MACH_ATH79_PCI_H */ ---- a/arch/mips/pci/pci-ar724x.c -+++ b/arch/mips/pci/pci-ar724x.c -@@ -8,19 +8,32 @@ - * by the Free Software Foundation. - */ - -+#include <linux/irq.h> - #include <linux/pci.h> - #include <asm/mach-ath79/ath79.h> -+#include <asm/mach-ath79/ar71xx_regs.h> - #include <asm/mach-ath79/pci.h> - - #define AR724X_PCI_CFG_BASE 0x14000000 - #define AR724X_PCI_CFG_SIZE 0x1000 -+#define AR724X_PCI_CTRL_BASE (AR71XX_APB_BASE + 0x000f0000) -+#define AR724X_PCI_CTRL_SIZE 0x100 -+ - #define AR724X_PCI_MEM_BASE 0x10000000 - #define AR724X_PCI_MEM_SIZE 0x08000000 - -+#define AR724X_PCI_REG_INT_STATUS 0x4c -+#define AR724X_PCI_REG_INT_MASK 0x50 -+ -+#define AR724X_PCI_INT_DEV0 BIT(14) -+ -+#define AR724X_PCI_IRQ_COUNT 1 -+ - #define AR7240_BAR0_WAR_VALUE 0xffff - - static DEFINE_SPINLOCK(ar724x_pci_lock); - static void __iomem *ar724x_pci_devcfg_base; -+static void __iomem *ar724x_pci_ctrl_base; - - static u32 ar724x_pci_bar0_value; - static bool ar724x_pci_bar0_is_cached; -@@ -164,14 +177,115 @@ static struct pci_controller ar724x_pci_ - .mem_resource = &ar724x_mem_resource, - }; - --int __init ar724x_pcibios_init(void) -+static void ar724x_pci_irq_handler(unsigned int irq, struct irq_desc *desc) -+{ -+ void __iomem *base; -+ u32 pending; -+ -+ base = ar724x_pci_ctrl_base; -+ -+ pending = __raw_readl(base + AR724X_PCI_REG_INT_STATUS) & -+ __raw_readl(base + AR724X_PCI_REG_INT_MASK); -+ -+ if (pending & AR724X_PCI_INT_DEV0) -+ generic_handle_irq(ATH79_PCI_IRQ(0)); -+ -+ else -+ spurious_interrupt(); -+} -+ -+static void ar724x_pci_irq_unmask(struct irq_data *d) -+{ -+ void __iomem *base; -+ u32 t; -+ -+ base = ar724x_pci_ctrl_base; -+ -+ switch (d->irq) { -+ case ATH79_PCI_IRQ(0): -+ t = __raw_readl(base + AR724X_PCI_REG_INT_MASK); -+ __raw_writel(t | AR724X_PCI_INT_DEV0, -+ base + AR724X_PCI_REG_INT_MASK); -+ /* flush write */ -+ __raw_readl(base + AR724X_PCI_REG_INT_MASK); -+ } -+} -+ -+static void ar724x_pci_irq_mask(struct irq_data *d) -+{ -+ void __iomem *base; -+ u32 t; -+ -+ base = ar724x_pci_ctrl_base; -+ -+ switch (d->irq) { -+ case ATH79_PCI_IRQ(0): -+ t = __raw_readl(base + AR724X_PCI_REG_INT_MASK); -+ __raw_writel(t & ~AR724X_PCI_INT_DEV0, -+ base + AR724X_PCI_REG_INT_MASK); -+ -+ /* flush write */ -+ __raw_readl(base + AR724X_PCI_REG_INT_MASK); -+ -+ t = __raw_readl(base + AR724X_PCI_REG_INT_STATUS); -+ __raw_writel(t | AR724X_PCI_INT_DEV0, -+ base + AR724X_PCI_REG_INT_STATUS); -+ -+ /* flush write */ -+ __raw_readl(base + AR724X_PCI_REG_INT_STATUS); -+ } -+} -+ -+static struct irq_chip ar724x_pci_irq_chip = { -+ .name = "AR724X PCI ", -+ .irq_mask = ar724x_pci_irq_mask, -+ .irq_unmask = ar724x_pci_irq_unmask, -+ .irq_mask_ack = ar724x_pci_irq_mask, -+}; -+ -+static void __init ar724x_pci_irq_init(int irq) -+{ -+ void __iomem *base; -+ int i; -+ -+ base = ar724x_pci_ctrl_base; -+ -+ __raw_writel(0, base + AR724X_PCI_REG_INT_MASK); -+ __raw_writel(0, base + AR724X_PCI_REG_INT_STATUS); -+ -+ BUILD_BUG_ON(ATH79_PCI_IRQ_COUNT < AR724X_PCI_IRQ_COUNT); -+ -+ for (i = ATH79_PCI_IRQ_BASE; -+ i < ATH79_PCI_IRQ_BASE + AR724X_PCI_IRQ_COUNT; i++) -+ irq_set_chip_and_handler(i, &ar724x_pci_irq_chip, -+ handle_level_irq); -+ -+ irq_set_chained_handler(irq, ar724x_pci_irq_handler); -+} -+ -+int __init ar724x_pcibios_init(int irq) - { -+ int ret; -+ -+ ret = -ENOMEM; -+ - ar724x_pci_devcfg_base = ioremap(AR724X_PCI_CFG_BASE, - AR724X_PCI_CFG_SIZE); - if (ar724x_pci_devcfg_base == NULL) -- return -ENOMEM; -+ goto err; - -+ ar724x_pci_ctrl_base = ioremap(AR724X_PCI_CTRL_BASE, -+ AR724X_PCI_CTRL_SIZE); -+ if (ar724x_pci_ctrl_base == NULL) -+ goto err_unmap_devcfg; -+ -+ ar724x_pci_irq_init(irq); - register_pci_controller(&ar724x_pci_controller); - - return PCIBIOS_SUCCESSFUL; -+ -+err_unmap_devcfg: -+ iounmap(ar724x_pci_devcfg_base); -+err: -+ return ret; - } diff --git a/target/linux/ar71xx/patches-3.3/112-MIPS-ath79-get-rid-of-some-ifdefs-in-mach-ubnt-xm.c.patch b/target/linux/ar71xx/patches-3.3/112-MIPS-ath79-get-rid-of-some-ifdefs-in-mach-ubnt-xm.c.patch deleted file mode 100644 index 4ef080541d..0000000000 --- a/target/linux/ar71xx/patches-3.3/112-MIPS-ath79-get-rid-of-some-ifdefs-in-mach-ubnt-xm.c.patch +++ /dev/null @@ -1,64 +0,0 @@ -From b2ab491ed634a4c0b7af5f11940e0ca42b1a87c8 Mon Sep 17 00:00:00 2001 -From: Gabor Juhos <juhosg@openwrt.org> -Date: Wed, 14 Mar 2012 10:36:08 +0100 -Subject: [PATCH 17/47] MIPS: ath79: get rid of some ifdefs in mach-ubnt-xm.c - -Remove a superfluous ifdef around an include. Also -reorganize the board setup code a bit, so another -ifdef can be removed. - -Signed-off-by: Gabor Juhos <juhosg@openwrt.org> -Cc: linux-mips@linux-mips.org -Patchwork: https://patchwork.linux-mips.org/patch/3497/ -Signed-off-by: Ralf Baechle <ralf@linux-mips.org> ---- - arch/mips/ath79/mach-ubnt-xm.c | 23 ++++++++++++----------- - 1 files changed, 12 insertions(+), 11 deletions(-) - ---- a/arch/mips/ath79/mach-ubnt-xm.c -+++ b/arch/mips/ath79/mach-ubnt-xm.c -@@ -12,10 +12,7 @@ - - #include <linux/init.h> - #include <linux/pci.h> -- --#ifdef CONFIG_PCI - #include <linux/ath9k_platform.h> --#endif /* CONFIG_PCI */ - - #include <asm/mach-ath79/irq.h> - -@@ -91,6 +88,17 @@ static struct ar724x_pci_data ubnt_xm_pc - .pdata = &ubnt_xm_eeprom_data, - }, - }; -+ -+static void __init ubnt_xm_pci_init(void) -+{ -+ memcpy(ubnt_xm_eeprom_data.eeprom_data, UBNT_XM_EEPROM_ADDR, -+ sizeof(ubnt_xm_eeprom_data.eeprom_data)); -+ -+ ar724x_pci_add_data(ubnt_xm_pci_data, ARRAY_SIZE(ubnt_xm_pci_data)); -+ ath79_register_pci(); -+} -+#else -+static inline void ubnt_xm_pci_init(void) {} - #endif /* CONFIG_PCI */ - - static void __init ubnt_xm_init(void) -@@ -105,14 +113,7 @@ static void __init ubnt_xm_init(void) - ath79_register_spi(&ubnt_xm_spi_data, ubnt_xm_spi_info, - ARRAY_SIZE(ubnt_xm_spi_info)); - --#ifdef CONFIG_PCI -- memcpy(ubnt_xm_eeprom_data.eeprom_data, UBNT_XM_EEPROM_ADDR, -- sizeof(ubnt_xm_eeprom_data.eeprom_data)); -- -- ar724x_pci_add_data(ubnt_xm_pci_data, ARRAY_SIZE(ubnt_xm_pci_data)); --#endif /* CONFIG_PCI */ -- -- ath79_register_pci(); -+ ubnt_xm_pci_init(); - } - - MIPS_MACHINE(ATH79_MACH_UBNT_XM, diff --git a/target/linux/ar71xx/patches-3.3/113-MIPS-ath79-allow-to-use-board-specific-pci_plat_dev_.patch b/target/linux/ar71xx/patches-3.3/113-MIPS-ath79-allow-to-use-board-specific-pci_plat_dev_.patch deleted file mode 100644 index 38765b0a9e..0000000000 --- a/target/linux/ar71xx/patches-3.3/113-MIPS-ath79-allow-to-use-board-specific-pci_plat_dev_.patch +++ /dev/null @@ -1,141 +0,0 @@ -From 2b62c9d685d9bb048a006b695683b2a812c0a847 Mon Sep 17 00:00:00 2001 -From: Gabor Juhos <juhosg@openwrt.org> -Date: Wed, 14 Mar 2012 10:36:09 +0100 -Subject: [PATCH 18/47] MIPS: ath79: allow to use board specific pci_plat_dev_init functions - -Th current implementation causes NULL pointer dereference -if 'pci_data' is not set: - -pci 0000:00:00.0: BAR 0: assigned [mem 0x10000000-0x1000ffff 64bit] -pci 0000:00:00.0: BAR 0: set to [mem 0x10000000-0x1000ffff 64bit] (PCI -address [0x10000000-0x1000ffff]) -CPU 0 Unable to handle kernel paging request at virtual address 00000000, epc == 802daca0, ra == 802e78a4 -Oops[#1]: -Cpu 0 -$ 0 : 00000000 80420000 00000000 00000000 -$ 4 : 00000000 00000000 00000001 00000001 -$ 8 : 00000001 0000032c 81c54700 00000001 -$12 : 0000032d 0000000f 00000000 ffffffff -$16 : 81c14c00 00000001 802dac74 80195f98 -$20 : 802ea050 00000000 00000000 00000000 -$24 : 00000003 800617f0 -$28 : 81c20000 81c21e70 00000000 802e78a4 -Hi : 00000000 -Lo : 4190ab00 -epc : 802daca0 0x802daca0 - Not tainted -ra : 802e78a4 0x802e78a4 -Status: 1000c003 KERNEL EXL IE -Cause : 00800008 -BadVA : 00000000 -PrId : 00019374 (MIPS 24Kc) -Modules linked in: -Process swapper (pid: 1, threadinfo=81c20000, task=81c18000, tls=00000000) -Stack : 00000000 8027d5d8 802e8ae0 00000000 01000000 802e8b5c 81c50600 00000000 - 802ff290 00000000 80420000 802ea0bc 00000000 00000000 80420000 802ff290 - 80420000 80060930 33390000 00000000 00002308 80140a80 00000028 802d0000 - 00000000 800ba024 802ff004 802ff0c8 802ff290 00000000 00000000 00000000 - 00000000 802d897c 01234567 7f827068 00000000 0045f798 00460000 00000000 - -This can be avoided by calling the 'ar724x_pci_add_data' -function from the board specific setup code. However it -makes no sense to use that function for every board, -especially when the board does not needs to set the -platform_data field of any PCI device. - -The patch allows the board setup code to specify a board -specific function if that is required. - -Signed-off-by: Gabor Juhos <juhosg@openwrt.org> -Cc: linux-mips@linux-mips.org -Patchwork: https://patchwork.linux-mips.org/patch/3499/ -Signed-off-by: Ralf Baechle <ralf@linux-mips.org> ---- - arch/mips/ath79/mach-ubnt-xm.c | 13 ++++++++++++- - arch/mips/ath79/pci.c | 14 ++++++++------ - arch/mips/ath79/pci.h | 4 +++- - 3 files changed, 23 insertions(+), 8 deletions(-) - ---- a/arch/mips/ath79/mach-ubnt-xm.c -+++ b/arch/mips/ath79/mach-ubnt-xm.c -@@ -85,16 +85,27 @@ static struct ath9k_platform_data ubnt_x - static struct ar724x_pci_data ubnt_xm_pci_data[] = { - { - .irq = ATH79_PCI_IRQ(0), -- .pdata = &ubnt_xm_eeprom_data, - }, - }; - -+static int ubnt_xm_pci_plat_dev_init(struct pci_dev *dev) -+{ -+ switch (PCI_SLOT(dev->devfn)) { -+ case 0: -+ dev->dev.platform_data = &ubnt_xm_eeprom_data; -+ break; -+ } -+ -+ return 0; -+} -+ - static void __init ubnt_xm_pci_init(void) - { - memcpy(ubnt_xm_eeprom_data.eeprom_data, UBNT_XM_EEPROM_ADDR, - sizeof(ubnt_xm_eeprom_data.eeprom_data)); - - ar724x_pci_add_data(ubnt_xm_pci_data, ARRAY_SIZE(ubnt_xm_pci_data)); -+ ath79_pci_set_plat_dev_init(ubnt_xm_pci_plat_dev_init); - ath79_register_pci(); - } - #else ---- a/arch/mips/ath79/pci.c -+++ b/arch/mips/ath79/pci.c -@@ -14,6 +14,7 @@ - #include <asm/mach-ath79/pci.h> - #include "pci.h" - -+static int (*ath79_pci_plat_dev_init)(struct pci_dev *dev); - static struct ar724x_pci_data *pci_data; - static int pci_data_size; - -@@ -38,14 +39,15 @@ int __init pcibios_map_irq(const struct - - int pcibios_plat_dev_init(struct pci_dev *dev) - { -- unsigned int devfn = dev->devfn; -- -- if (devfn > pci_data_size - 1) -- return PCIBIOS_DEVICE_NOT_FOUND; -+ if (ath79_pci_plat_dev_init) -+ return ath79_pci_plat_dev_init(dev); - -- dev->dev.platform_data = pci_data[devfn].pdata; -+ return 0; -+} - -- return PCIBIOS_SUCCESSFUL; -+void __init ath79_pci_set_plat_dev_init(int (*func)(struct pci_dev *dev)) -+{ -+ ath79_pci_plat_dev_init = func; - } - - int __init ath79_register_pci(void) ---- a/arch/mips/ath79/pci.h -+++ b/arch/mips/ath79/pci.h -@@ -13,14 +13,16 @@ - - struct ar724x_pci_data { - int irq; -- void *pdata; - }; - - void ar724x_pci_add_data(struct ar724x_pci_data *data, int size); - - #ifdef CONFIG_PCI -+void ath79_pci_set_plat_dev_init(int (*func)(struct pci_dev *dev)); - int ath79_register_pci(void); - #else -+static inline void -+ath79_pci_set_plat_dev_init(int (*func)(struct pci_dev *)) {} - static inline int ath79_register_pci(void) { return 0; } - #endif - diff --git a/target/linux/ar71xx/patches-3.3/114-MIPS-ath79-add-support-for-the-PCI-host-controller-o.patch b/target/linux/ar71xx/patches-3.3/114-MIPS-ath79-add-support-for-the-PCI-host-controller-o.patch deleted file mode 100644 index 4021af2ca6..0000000000 --- a/target/linux/ar71xx/patches-3.3/114-MIPS-ath79-add-support-for-the-PCI-host-controller-o.patch +++ /dev/null @@ -1,436 +0,0 @@ -From 4201b6aeb059b481571c241a2fc96fd3f41032e9 Mon Sep 17 00:00:00 2001 -From: Gabor Juhos <juhosg@openwrt.org> -Date: Wed, 14 Mar 2012 10:36:10 +0100 -Subject: [PATCH 19/47] MIPS: ath79: add support for the PCI host controller of the AR71XX SoCs - -The Atheros AR71XX SoCs have a built-in PCI Host Controller. -This patch adds a driver for that, and modifies the relevant -files in order to allow to register the PCI controller from -board specific setup. - -Signed-off-by: Gabor Juhos <juhosg@openwrt.org> -Signed-off-by: Imre Kaloz <kaloz@openwrt.org> -Cc: linux-mips@linux-mips.org -Patchwork: https://patchwork.linux-mips.org/patch/3498/ -Signed-off-by: Ralf Baechle <ralf@linux-mips.org> ---- - arch/mips/ath79/Kconfig | 1 + - arch/mips/include/asm/mach-ath79/pci.h | 6 + - arch/mips/pci/Makefile | 1 + - arch/mips/pci/pci-ar71xx.c | 375 ++++++++++++++++++++++++++++++++ - 4 files changed, 383 insertions(+), 0 deletions(-) - create mode 100644 arch/mips/pci/pci-ar71xx.c - ---- a/arch/mips/ath79/Kconfig -+++ b/arch/mips/ath79/Kconfig -@@ -52,6 +52,7 @@ endmenu - config SOC_AR71XX - select USB_ARCH_HAS_EHCI - select USB_ARCH_HAS_OHCI -+ select HW_HAS_PCI - def_bool n - - config SOC_AR724X ---- a/arch/mips/include/asm/mach-ath79/pci.h -+++ b/arch/mips/include/asm/mach-ath79/pci.h -@@ -11,6 +11,12 @@ - #ifndef __ASM_MACH_ATH79_PCI_H - #define __ASM_MACH_ATH79_PCI_H - -+#if defined(CONFIG_PCI) && defined(CONFIG_SOC_AR71XX) -+int ar71xx_pcibios_init(void); -+#else -+static inline int ar71xx_pcibios_init(void) { return 0; } -+#endif -+ - #if defined(CONFIG_PCI) && defined(CONFIG_SOC_AR724X) - int ar724x_pcibios_init(int irq); - #else ---- a/arch/mips/pci/Makefile -+++ b/arch/mips/pci/Makefile -@@ -19,6 +19,7 @@ obj-$(CONFIG_BCM47XX) += pci-bcm47xx.o - obj-$(CONFIG_BCM63XX) += pci-bcm63xx.o fixup-bcm63xx.o \ - ops-bcm63xx.o - obj-$(CONFIG_MIPS_ALCHEMY) += pci-alchemy.o -+obj-$(CONFIG_SOC_AR71XX) += pci-ar71xx.o - obj-$(CONFIG_SOC_AR724X) += pci-ar724x.o - - # ---- /dev/null -+++ b/arch/mips/pci/pci-ar71xx.c -@@ -0,0 +1,375 @@ -+/* -+ * Atheros AR71xx PCI host controller driver -+ * -+ * Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org> -+ * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> -+ * -+ * Parts of this file are based on Atheros' 2.6.15 BSP -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include <linux/resource.h> -+#include <linux/types.h> -+#include <linux/delay.h> -+#include <linux/bitops.h> -+#include <linux/pci.h> -+#include <linux/pci_regs.h> -+#include <linux/interrupt.h> -+ -+#include <asm/mach-ath79/ar71xx_regs.h> -+#include <asm/mach-ath79/ath79.h> -+#include <asm/mach-ath79/pci.h> -+ -+#define AR71XX_PCI_MEM_BASE 0x10000000 -+#define AR71XX_PCI_MEM_SIZE 0x08000000 -+ -+#define AR71XX_PCI_WIN0_OFFS 0x10000000 -+#define AR71XX_PCI_WIN1_OFFS 0x11000000 -+#define AR71XX_PCI_WIN2_OFFS 0x12000000 -+#define AR71XX_PCI_WIN3_OFFS 0x13000000 -+#define AR71XX_PCI_WIN4_OFFS 0x14000000 -+#define AR71XX_PCI_WIN5_OFFS 0x15000000 -+#define AR71XX_PCI_WIN6_OFFS 0x16000000 -+#define AR71XX_PCI_WIN7_OFFS 0x07000000 -+ -+#define AR71XX_PCI_CFG_BASE \ -+ (AR71XX_PCI_MEM_BASE + AR71XX_PCI_WIN7_OFFS + 0x10000) -+#define AR71XX_PCI_CFG_SIZE 0x100 -+ -+#define AR71XX_PCI_REG_CRP_AD_CBE 0x00 -+#define AR71XX_PCI_REG_CRP_WRDATA 0x04 -+#define AR71XX_PCI_REG_CRP_RDDATA 0x08 -+#define AR71XX_PCI_REG_CFG_AD 0x0c -+#define AR71XX_PCI_REG_CFG_CBE 0x10 -+#define AR71XX_PCI_REG_CFG_WRDATA 0x14 -+#define AR71XX_PCI_REG_CFG_RDDATA 0x18 -+#define AR71XX_PCI_REG_PCI_ERR 0x1c -+#define AR71XX_PCI_REG_PCI_ERR_ADDR 0x20 -+#define AR71XX_PCI_REG_AHB_ERR 0x24 -+#define AR71XX_PCI_REG_AHB_ERR_ADDR 0x28 -+ -+#define AR71XX_PCI_CRP_CMD_WRITE 0x00010000 -+#define AR71XX_PCI_CRP_CMD_READ 0x00000000 -+#define AR71XX_PCI_CFG_CMD_READ 0x0000000a -+#define AR71XX_PCI_CFG_CMD_WRITE 0x0000000b -+ -+#define AR71XX_PCI_INT_CORE BIT(4) -+#define AR71XX_PCI_INT_DEV2 BIT(2) -+#define AR71XX_PCI_INT_DEV1 BIT(1) -+#define AR71XX_PCI_INT_DEV0 BIT(0) -+ -+#define AR71XX_PCI_IRQ_COUNT 5 -+ -+static DEFINE_SPINLOCK(ar71xx_pci_lock); -+static void __iomem *ar71xx_pcicfg_base; -+ -+/* Byte lane enable bits */ -+static const u8 ar71xx_pci_ble_table[4][4] = { -+ {0x0, 0xf, 0xf, 0xf}, -+ {0xe, 0xd, 0xb, 0x7}, -+ {0xc, 0xf, 0x3, 0xf}, -+ {0xf, 0xf, 0xf, 0xf}, -+}; -+ -+static const u32 ar71xx_pci_read_mask[8] = { -+ 0, 0xff, 0xffff, 0, 0xffffffff, 0, 0, 0 -+}; -+ -+static inline u32 ar71xx_pci_get_ble(int where, int size, int local) -+{ -+ u32 t; -+ -+ t = ar71xx_pci_ble_table[size & 3][where & 3]; -+ BUG_ON(t == 0xf); -+ t <<= (local) ? 20 : 4; -+ -+ return t; -+} -+ -+static inline u32 ar71xx_pci_bus_addr(struct pci_bus *bus, unsigned int devfn, -+ int where) -+{ -+ u32 ret; -+ -+ if (!bus->number) { -+ /* type 0 */ -+ ret = (1 << PCI_SLOT(devfn)) | (PCI_FUNC(devfn) << 8) | -+ (where & ~3); -+ } else { -+ /* type 1 */ -+ ret = (bus->number << 16) | (PCI_SLOT(devfn) << 11) | -+ (PCI_FUNC(devfn) << 8) | (where & ~3) | 1; -+ } -+ -+ return ret; -+} -+ -+static int ar71xx_pci_check_error(int quiet) -+{ -+ void __iomem *base = ar71xx_pcicfg_base; -+ u32 pci_err; -+ u32 ahb_err; -+ -+ pci_err = __raw_readl(base + AR71XX_PCI_REG_PCI_ERR) & 3; -+ if (pci_err) { -+ if (!quiet) { -+ u32 addr; -+ -+ addr = __raw_readl(base + AR71XX_PCI_REG_PCI_ERR_ADDR); -+ pr_crit("ar71xx: %s bus error %d at addr 0x%x\n", -+ "PCI", pci_err, addr); -+ } -+ -+ /* clear PCI error status */ -+ __raw_writel(pci_err, base + AR71XX_PCI_REG_PCI_ERR); -+ } -+ -+ ahb_err = __raw_readl(base + AR71XX_PCI_REG_AHB_ERR) & 1; -+ if (ahb_err) { -+ if (!quiet) { -+ u32 addr; -+ -+ addr = __raw_readl(base + AR71XX_PCI_REG_AHB_ERR_ADDR); -+ pr_crit("ar71xx: %s bus error %d at addr 0x%x\n", -+ "AHB", ahb_err, addr); -+ } -+ -+ /* clear AHB error status */ -+ __raw_writel(ahb_err, base + AR71XX_PCI_REG_AHB_ERR); -+ } -+ -+ return !!(ahb_err | pci_err); -+} -+ -+static inline void ar71xx_pci_local_write(int where, int size, u32 value) -+{ -+ void __iomem *base = ar71xx_pcicfg_base; -+ u32 ad_cbe; -+ -+ value = value << (8 * (where & 3)); -+ -+ ad_cbe = AR71XX_PCI_CRP_CMD_WRITE | (where & ~3); -+ ad_cbe |= ar71xx_pci_get_ble(where, size, 1); -+ -+ __raw_writel(ad_cbe, base + AR71XX_PCI_REG_CRP_AD_CBE); -+ __raw_writel(value, base + AR71XX_PCI_REG_CRP_WRDATA); -+} -+ -+static inline int ar71xx_pci_set_cfgaddr(struct pci_bus *bus, -+ unsigned int devfn, -+ int where, int size, u32 cmd) -+{ -+ void __iomem *base = ar71xx_pcicfg_base; -+ u32 addr; -+ -+ addr = ar71xx_pci_bus_addr(bus, devfn, where); -+ -+ __raw_writel(addr, base + AR71XX_PCI_REG_CFG_AD); -+ __raw_writel(cmd | ar71xx_pci_get_ble(where, size, 0), -+ base + AR71XX_PCI_REG_CFG_CBE); -+ -+ return ar71xx_pci_check_error(1); -+} -+ -+static int ar71xx_pci_read_config(struct pci_bus *bus, unsigned int devfn, -+ int where, int size, u32 *value) -+{ -+ void __iomem *base = ar71xx_pcicfg_base; -+ unsigned long flags; -+ u32 data; -+ int err; -+ int ret; -+ -+ ret = PCIBIOS_SUCCESSFUL; -+ data = ~0; -+ -+ spin_lock_irqsave(&ar71xx_pci_lock, flags); -+ -+ err = ar71xx_pci_set_cfgaddr(bus, devfn, where, size, -+ AR71XX_PCI_CFG_CMD_READ); -+ if (err) -+ ret = PCIBIOS_DEVICE_NOT_FOUND; -+ else -+ data = __raw_readl(base + AR71XX_PCI_REG_CFG_RDDATA); -+ -+ spin_unlock_irqrestore(&ar71xx_pci_lock, flags); -+ -+ *value = (data >> (8 * (where & 3))) & ar71xx_pci_read_mask[size & 7]; -+ -+ return ret; -+} -+ -+static int ar71xx_pci_write_config(struct pci_bus *bus, unsigned int devfn, -+ int where, int size, u32 value) -+{ -+ void __iomem *base = ar71xx_pcicfg_base; -+ unsigned long flags; -+ int err; -+ int ret; -+ -+ value = value << (8 * (where & 3)); -+ ret = PCIBIOS_SUCCESSFUL; -+ -+ spin_lock_irqsave(&ar71xx_pci_lock, flags); -+ -+ err = ar71xx_pci_set_cfgaddr(bus, devfn, where, size, -+ AR71XX_PCI_CFG_CMD_WRITE); -+ if (err) -+ ret = PCIBIOS_DEVICE_NOT_FOUND; -+ else -+ __raw_writel(value, base + AR71XX_PCI_REG_CFG_WRDATA); -+ -+ spin_unlock_irqrestore(&ar71xx_pci_lock, flags); -+ -+ return ret; -+} -+ -+static struct pci_ops ar71xx_pci_ops = { -+ .read = ar71xx_pci_read_config, -+ .write = ar71xx_pci_write_config, -+}; -+ -+static struct resource ar71xx_pci_io_resource = { -+ .name = "PCI IO space", -+ .start = 0, -+ .end = 0, -+ .flags = IORESOURCE_IO, -+}; -+ -+static struct resource ar71xx_pci_mem_resource = { -+ .name = "PCI memory space", -+ .start = AR71XX_PCI_MEM_BASE, -+ .end = AR71XX_PCI_MEM_BASE + AR71XX_PCI_MEM_SIZE - 1, -+ .flags = IORESOURCE_MEM -+}; -+ -+static struct pci_controller ar71xx_pci_controller = { -+ .pci_ops = &ar71xx_pci_ops, -+ .mem_resource = &ar71xx_pci_mem_resource, -+ .io_resource = &ar71xx_pci_io_resource, -+}; -+ -+static void ar71xx_pci_irq_handler(unsigned int irq, struct irq_desc *desc) -+{ -+ void __iomem *base = ath79_reset_base; -+ u32 pending; -+ -+ pending = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_STATUS) & -+ __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE); -+ -+ if (pending & AR71XX_PCI_INT_DEV0) -+ generic_handle_irq(ATH79_PCI_IRQ(0)); -+ -+ else if (pending & AR71XX_PCI_INT_DEV1) -+ generic_handle_irq(ATH79_PCI_IRQ(1)); -+ -+ else if (pending & AR71XX_PCI_INT_DEV2) -+ generic_handle_irq(ATH79_PCI_IRQ(2)); -+ -+ else if (pending & AR71XX_PCI_INT_CORE) -+ generic_handle_irq(ATH79_PCI_IRQ(4)); -+ -+ else -+ spurious_interrupt(); -+} -+ -+static void ar71xx_pci_irq_unmask(struct irq_data *d) -+{ -+ unsigned int irq = d->irq - ATH79_PCI_IRQ_BASE; -+ void __iomem *base = ath79_reset_base; -+ u32 t; -+ -+ t = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE); -+ __raw_writel(t | (1 << irq), base + AR71XX_RESET_REG_PCI_INT_ENABLE); -+ -+ /* flush write */ -+ __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE); -+} -+ -+static void ar71xx_pci_irq_mask(struct irq_data *d) -+{ -+ unsigned int irq = d->irq - ATH79_PCI_IRQ_BASE; -+ void __iomem *base = ath79_reset_base; -+ u32 t; -+ -+ t = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE); -+ __raw_writel(t & ~(1 << irq), base + AR71XX_RESET_REG_PCI_INT_ENABLE); -+ -+ /* flush write */ -+ __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE); -+} -+ -+static struct irq_chip ar71xx_pci_irq_chip = { -+ .name = "AR71XX PCI", -+ .irq_mask = ar71xx_pci_irq_mask, -+ .irq_unmask = ar71xx_pci_irq_unmask, -+ .irq_mask_ack = ar71xx_pci_irq_mask, -+}; -+ -+static __init void ar71xx_pci_irq_init(void) -+{ -+ void __iomem *base = ath79_reset_base; -+ int i; -+ -+ __raw_writel(0, base + AR71XX_RESET_REG_PCI_INT_ENABLE); -+ __raw_writel(0, base + AR71XX_RESET_REG_PCI_INT_STATUS); -+ -+ BUILD_BUG_ON(ATH79_PCI_IRQ_COUNT < AR71XX_PCI_IRQ_COUNT); -+ -+ for (i = ATH79_PCI_IRQ_BASE; -+ i < ATH79_PCI_IRQ_BASE + AR71XX_PCI_IRQ_COUNT; i++) -+ irq_set_chip_and_handler(i, &ar71xx_pci_irq_chip, -+ handle_level_irq); -+ -+ irq_set_chained_handler(ATH79_CPU_IRQ_IP2, ar71xx_pci_irq_handler); -+} -+ -+static __init void ar71xx_pci_reset(void) -+{ -+ void __iomem *ddr_base = ath79_ddr_base; -+ -+ ath79_device_reset_set(AR71XX_RESET_PCI_BUS | AR71XX_RESET_PCI_CORE); -+ mdelay(100); -+ -+ ath79_device_reset_clear(AR71XX_RESET_PCI_BUS | AR71XX_RESET_PCI_CORE); -+ mdelay(100); -+ -+ __raw_writel(AR71XX_PCI_WIN0_OFFS, ddr_base + AR71XX_DDR_REG_PCI_WIN0); -+ __raw_writel(AR71XX_PCI_WIN1_OFFS, ddr_base + AR71XX_DDR_REG_PCI_WIN1); -+ __raw_writel(AR71XX_PCI_WIN2_OFFS, ddr_base + AR71XX_DDR_REG_PCI_WIN2); -+ __raw_writel(AR71XX_PCI_WIN3_OFFS, ddr_base + AR71XX_DDR_REG_PCI_WIN3); -+ __raw_writel(AR71XX_PCI_WIN4_OFFS, ddr_base + AR71XX_DDR_REG_PCI_WIN4); -+ __raw_writel(AR71XX_PCI_WIN5_OFFS, ddr_base + AR71XX_DDR_REG_PCI_WIN5); -+ __raw_writel(AR71XX_PCI_WIN6_OFFS, ddr_base + AR71XX_DDR_REG_PCI_WIN6); -+ __raw_writel(AR71XX_PCI_WIN7_OFFS, ddr_base + AR71XX_DDR_REG_PCI_WIN7); -+ -+ mdelay(100); -+} -+ -+__init int ar71xx_pcibios_init(void) -+{ -+ u32 t; -+ -+ ar71xx_pcicfg_base = ioremap(AR71XX_PCI_CFG_BASE, AR71XX_PCI_CFG_SIZE); -+ if (ar71xx_pcicfg_base == NULL) -+ return -ENOMEM; -+ -+ ar71xx_pci_reset(); -+ -+ /* setup COMMAND register */ -+ t = PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | PCI_COMMAND_INVALIDATE -+ | PCI_COMMAND_PARITY | PCI_COMMAND_SERR | PCI_COMMAND_FAST_BACK; -+ ar71xx_pci_local_write(PCI_COMMAND, 4, t); -+ -+ /* clear bus errors */ -+ ar71xx_pci_check_error(1); -+ -+ ar71xx_pci_irq_init(); -+ -+ register_pci_controller(&ar71xx_pci_controller); -+ -+ return 0; -+} diff --git a/target/linux/ar71xx/patches-3.3/115-MIPS-ath79-allow-to-use-SoC-specific-PCI-IRQ-maps.patch b/target/linux/ar71xx/patches-3.3/115-MIPS-ath79-allow-to-use-SoC-specific-PCI-IRQ-maps.patch deleted file mode 100644 index 7daaf1923b..0000000000 --- a/target/linux/ar71xx/patches-3.3/115-MIPS-ath79-allow-to-use-SoC-specific-PCI-IRQ-maps.patch +++ /dev/null @@ -1,165 +0,0 @@ -From fd1dd2f2c317bc0fc2c30fba440d911654bf592e Mon Sep 17 00:00:00 2001 -From: Gabor Juhos <juhosg@openwrt.org> -Date: Wed, 14 Mar 2012 10:36:11 +0100 -Subject: [PATCH 20/47] MIPS: ath79: allow to use SoC specific PCI IRQ maps - -The PCI controllers in the AR71XX and in the -AR724X SoCs are different, and both of them -uses different IRQ wiring. - -The patch modifies the 'pcibios_map_irq' function -in order to allow to use different IRQ maps for -the different SoCs. The patch also adds a function, -which lets the board setup code to override the -default IRQ map. - -Signed-off-by: Gabor Juhos <juhosg@openwrt.org> -Cc: linux-mips@linux-mips.org -Patchwork: https://patchwork.linux-mips.org/patch/3500/ -Signed-off-by: Ralf Baechle <ralf@linux-mips.org> ---- - arch/mips/ath79/pci.c | 72 ++++++++++++++++++++++++++++++++++++++++++++++--- - arch/mips/ath79/pci.h | 9 ++++++ - 2 files changed, 77 insertions(+), 4 deletions(-) - ---- a/arch/mips/ath79/pci.c -+++ b/arch/mips/ath79/pci.c -@@ -8,6 +8,7 @@ - * by the Free Software Foundation. - */ - -+#include <linux/init.h> - #include <linux/pci.h> - #include <asm/mach-ath79/ath79.h> - #include <asm/mach-ath79/irq.h> -@@ -15,9 +16,35 @@ - #include "pci.h" - - static int (*ath79_pci_plat_dev_init)(struct pci_dev *dev); -+static const struct ath79_pci_irq *ath79_pci_irq_map __initdata; -+static unsigned ath79_pci_nr_irqs __initdata; - static struct ar724x_pci_data *pci_data; - static int pci_data_size; - -+static const struct ath79_pci_irq ar71xx_pci_irq_map[] __initconst = { -+ { -+ .slot = 17, -+ .pin = 1, -+ .irq = ATH79_PCI_IRQ(0), -+ }, { -+ .slot = 18, -+ .pin = 1, -+ .irq = ATH79_PCI_IRQ(1), -+ }, { -+ .slot = 19, -+ .pin = 1, -+ .irq = ATH79_PCI_IRQ(2), -+ } -+}; -+ -+static const struct ath79_pci_irq ar724x_pci_irq_map[] __initconst = { -+ { -+ .slot = 0, -+ .pin = 1, -+ .irq = ATH79_PCI_IRQ(0), -+ } -+}; -+ - void ar724x_pci_add_data(struct ar724x_pci_data *data, int size) - { - pci_data = data; -@@ -26,13 +53,40 @@ void ar724x_pci_add_data(struct ar724x_p - - int __init pcibios_map_irq(const struct pci_dev *dev, uint8_t slot, uint8_t pin) - { -- unsigned int devfn = dev->devfn; - int irq = -1; -+ int i; - -- if (devfn > pci_data_size - 1) -- return irq; -- -- irq = pci_data[devfn].irq; -+ if (ath79_pci_nr_irqs == 0 || -+ ath79_pci_irq_map == NULL) { -+ if (soc_is_ar71xx()) { -+ ath79_pci_irq_map = ar71xx_pci_irq_map; -+ ath79_pci_nr_irqs = ARRAY_SIZE(ar71xx_pci_irq_map); -+ } else if (soc_is_ar724x()) { -+ ath79_pci_irq_map = ar724x_pci_irq_map; -+ ath79_pci_nr_irqs = ARRAY_SIZE(ar724x_pci_irq_map); -+ } else { -+ pr_crit("pci %s: invalid irq map\n", -+ pci_name((struct pci_dev *) dev)); -+ return irq; -+ } -+ } -+ -+ for (i = 0; i < ath79_pci_nr_irqs; i++) { -+ const struct ath79_pci_irq *entry; -+ -+ entry = &ath79_pci_irq_map[i]; -+ if (entry->slot == slot && entry->pin == pin) { -+ irq = entry->irq; -+ break; -+ } -+ } -+ -+ if (irq < 0) -+ pr_crit("pci %s: no irq found for pin %u\n", -+ pci_name((struct pci_dev *) dev), pin); -+ else -+ pr_info("pci %s: using irq %d for pin %u\n", -+ pci_name((struct pci_dev *) dev), irq, pin); - - return irq; - } -@@ -45,6 +99,13 @@ int pcibios_plat_dev_init(struct pci_dev - return 0; - } - -+void __init ath79_pci_set_irq_map(unsigned nr_irqs, -+ const struct ath79_pci_irq *map) -+{ -+ ath79_pci_nr_irqs = nr_irqs; -+ ath79_pci_irq_map = map; -+} -+ - void __init ath79_pci_set_plat_dev_init(int (*func)(struct pci_dev *dev)) - { - ath79_pci_plat_dev_init = func; -@@ -52,6 +113,9 @@ void __init ath79_pci_set_plat_dev_init( - - int __init ath79_register_pci(void) - { -+ if (soc_is_ar71xx()) -+ return ar71xx_pcibios_init(); -+ - if (soc_is_ar724x()) - return ar724x_pcibios_init(ATH79_CPU_IRQ_IP2); - ---- a/arch/mips/ath79/pci.h -+++ b/arch/mips/ath79/pci.h -@@ -15,13 +15,22 @@ struct ar724x_pci_data { - int irq; - }; - -+struct ath79_pci_irq { -+ u8 slot; -+ u8 pin; -+ int irq; -+}; -+ - void ar724x_pci_add_data(struct ar724x_pci_data *data, int size); - - #ifdef CONFIG_PCI -+void ath79_pci_set_irq_map(unsigned nr_irqs, const struct ath79_pci_irq *map); - void ath79_pci_set_plat_dev_init(int (*func)(struct pci_dev *dev)); - int ath79_register_pci(void); - #else - static inline void -+ath79_pci_set_irq_map(unsigned nr_irqs, const struct ath79_pci_irq *map) {} -+static inline void - ath79_pci_set_plat_dev_init(int (*func)(struct pci_dev *)) {} - static inline int ath79_register_pci(void) { return 0; } - #endif diff --git a/target/linux/ar71xx/patches-3.3/116-MIPS-ath79-remove-ar724x_pci_add_data-function.patch b/target/linux/ar71xx/patches-3.3/116-MIPS-ath79-remove-ar724x_pci_add_data-function.patch deleted file mode 100644 index 70013c8d92..0000000000 --- a/target/linux/ar71xx/patches-3.3/116-MIPS-ath79-remove-ar724x_pci_add_data-function.patch +++ /dev/null @@ -1,86 +0,0 @@ -From 29398cf1212afc9a6474127259cbb3a48d0751e5 Mon Sep 17 00:00:00 2001 -From: Gabor Juhos <juhosg@openwrt.org> -Date: Wed, 14 Mar 2012 10:36:12 +0100 -Subject: [PATCH 21/47] MIPS: ath79: remove ar724x_pci_add_data function - -The variables set by this function are not used anymore. -Remove the function and the relevant variables as well. - -Signed-off-by: Gabor Juhos <juhosg@openwrt.org> -Cc: linux-mips@linux-mips.org -Patchwork: https://patchwork.linux-mips.org/patch/3501/ -Signed-off-by: Ralf Baechle <ralf@linux-mips.org> ---- - arch/mips/ath79/mach-ubnt-xm.c | 7 ------- - arch/mips/ath79/pci.c | 8 -------- - arch/mips/ath79/pci.h | 6 ------ - 3 files changed, 0 insertions(+), 21 deletions(-) - ---- a/arch/mips/ath79/mach-ubnt-xm.c -+++ b/arch/mips/ath79/mach-ubnt-xm.c -@@ -82,12 +82,6 @@ static struct ath79_spi_platform_data ub - #ifdef CONFIG_PCI - static struct ath9k_platform_data ubnt_xm_eeprom_data; - --static struct ar724x_pci_data ubnt_xm_pci_data[] = { -- { -- .irq = ATH79_PCI_IRQ(0), -- }, --}; -- - static int ubnt_xm_pci_plat_dev_init(struct pci_dev *dev) - { - switch (PCI_SLOT(dev->devfn)) { -@@ -104,7 +98,6 @@ static void __init ubnt_xm_pci_init(void - memcpy(ubnt_xm_eeprom_data.eeprom_data, UBNT_XM_EEPROM_ADDR, - sizeof(ubnt_xm_eeprom_data.eeprom_data)); - -- ar724x_pci_add_data(ubnt_xm_pci_data, ARRAY_SIZE(ubnt_xm_pci_data)); - ath79_pci_set_plat_dev_init(ubnt_xm_pci_plat_dev_init); - ath79_register_pci(); - } ---- a/arch/mips/ath79/pci.c -+++ b/arch/mips/ath79/pci.c -@@ -18,8 +18,6 @@ - static int (*ath79_pci_plat_dev_init)(struct pci_dev *dev); - static const struct ath79_pci_irq *ath79_pci_irq_map __initdata; - static unsigned ath79_pci_nr_irqs __initdata; --static struct ar724x_pci_data *pci_data; --static int pci_data_size; - - static const struct ath79_pci_irq ar71xx_pci_irq_map[] __initconst = { - { -@@ -45,12 +43,6 @@ static const struct ath79_pci_irq ar724x - } - }; - --void ar724x_pci_add_data(struct ar724x_pci_data *data, int size) --{ -- pci_data = data; -- pci_data_size = size; --} -- - int __init pcibios_map_irq(const struct pci_dev *dev, uint8_t slot, uint8_t pin) - { - int irq = -1; ---- a/arch/mips/ath79/pci.h -+++ b/arch/mips/ath79/pci.h -@@ -11,18 +11,12 @@ - #ifndef _ATH79_PCI_H - #define _ATH79_PCI_H - --struct ar724x_pci_data { -- int irq; --}; -- - struct ath79_pci_irq { - u8 slot; - u8 pin; - int irq; - }; - --void ar724x_pci_add_data(struct ar724x_pci_data *data, int size); -- - #ifdef CONFIG_PCI - void ath79_pci_set_irq_map(unsigned nr_irqs, const struct ath79_pci_irq *map); - void ath79_pci_set_plat_dev_init(int (*func)(struct pci_dev *dev)); diff --git a/target/linux/ar71xx/patches-3.3/117-MIPS-ath79-register-PCI-controller-on-the-PB44-board.patch b/target/linux/ar71xx/patches-3.3/117-MIPS-ath79-register-PCI-controller-on-the-PB44-board.patch deleted file mode 100644 index 969b79d8b2..0000000000 --- a/target/linux/ar71xx/patches-3.3/117-MIPS-ath79-register-PCI-controller-on-the-PB44-board.patch +++ /dev/null @@ -1,34 +0,0 @@ -From 12db6a98b438a50799873bfd2b736a3b02a4bd57 Mon Sep 17 00:00:00 2001 -From: Gabor Juhos <juhosg@openwrt.org> -Date: Wed, 14 Mar 2012 10:36:13 +0100 -Subject: [PATCH 22/47] MIPS: ath79: register PCI controller on the PB44 board - -The PB44 reference board has two miniPCI slots. Register -the PCI controller to make those usable. - -Signed-off-by: Gabor Juhos <juhosg@openwrt.org> -Cc: linux-mips@linux-mips.org -Patchwork: https://patchwork.linux-mips.org/patch/3502/ -Signed-off-by: Ralf Baechle <ralf@linux-mips.org> ---- - arch/mips/ath79/mach-pb44.c | 2 ++ - 1 files changed, 2 insertions(+), 0 deletions(-) - ---- a/arch/mips/ath79/mach-pb44.c -+++ b/arch/mips/ath79/mach-pb44.c -@@ -19,6 +19,7 @@ - #include "dev-leds-gpio.h" - #include "dev-spi.h" - #include "dev-usb.h" -+#include "pci.h" - - #define PB44_GPIO_I2C_SCL 0 - #define PB44_GPIO_I2C_SDA 1 -@@ -114,6 +115,7 @@ static void __init pb44_init(void) - ath79_register_spi(&pb44_spi_data, pb44_spi_info, - ARRAY_SIZE(pb44_spi_info)); - ath79_register_usb(); -+ ath79_register_pci(); - } - - MIPS_MACHINE(ATH79_MACH_PB44, "PB44", "Atheros PB44 reference board", diff --git a/target/linux/ar71xx/patches-3.3/118-MIPS-ath79-update-copyright-headers-of-PCI-related-f.patch b/target/linux/ar71xx/patches-3.3/118-MIPS-ath79-update-copyright-headers-of-PCI-related-f.patch deleted file mode 100644 index da173a5f1d..0000000000 --- a/target/linux/ar71xx/patches-3.3/118-MIPS-ath79-update-copyright-headers-of-PCI-related-f.patch +++ /dev/null @@ -1,71 +0,0 @@ -From d3b5329b89d1bc733c56e4d609a89b429bf6cd4e Mon Sep 17 00:00:00 2001 -From: Gabor Juhos <juhosg@openwrt.org> -Date: Wed, 14 Mar 2012 10:36:14 +0100 -Subject: [PATCH 23/47] MIPS: ath79: update copyright headers of PCI related files - -Add copyright records according to the recent changes in -the PCI code. Also fix up the descriptions. - -Signed-off-by: Gabor Juhos <juhosg@openwrt.org> -Signed-off-by: Imre Kaloz <kaloz@openwrt.org> -Cc: linux-mips@linux-mips.org -Patchwork: https://patchwork.linux-mips.org/patch/3503/ -Signed-off-by: Ralf Baechle <ralf@linux-mips.org> ---- - arch/mips/ath79/pci.c | 4 ++++ - arch/mips/ath79/pci.h | 4 +++- - arch/mips/include/asm/mach-ath79/pci.h | 4 +++- - arch/mips/pci/pci-ar724x.c | 3 ++- - 4 files changed, 12 insertions(+), 3 deletions(-) - ---- a/arch/mips/ath79/pci.c -+++ b/arch/mips/ath79/pci.c -@@ -2,6 +2,10 @@ - * Atheros AR71XX/AR724X specific PCI setup code - * - * Copyright (C) 2011 René Bolldorf <xsecute@googlemail.com> -+ * Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org> -+ * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> -+ * -+ * Parts of this file are based on Atheros' 2.6.15 BSP - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published ---- a/arch/mips/ath79/pci.h -+++ b/arch/mips/ath79/pci.h -@@ -1,7 +1,9 @@ - /* -- * Atheros 724x PCI support -+ * Atheros AR71XX/AR724X PCI support - * - * Copyright (C) 2011 René Bolldorf <xsecute@googlemail.com> -+ * Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org> -+ * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published ---- a/arch/mips/include/asm/mach-ath79/pci.h -+++ b/arch/mips/include/asm/mach-ath79/pci.h -@@ -1,7 +1,9 @@ - /* -- * Atheros 724x PCI support -+ * Atheros AR71XX/AR724X PCI support - * - * Copyright (C) 2011 René Bolldorf <xsecute@googlemail.com> -+ * Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org> -+ * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published ---- a/arch/mips/pci/pci-ar724x.c -+++ b/arch/mips/pci/pci-ar724x.c -@@ -1,7 +1,8 @@ - /* -- * Atheros 724x PCI support -+ * Atheros AR724X PCI host controller driver - * - * Copyright (C) 2011 René Bolldorf <xsecute@googlemail.com> -+ * Copyright (C) 2009-2011 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published diff --git a/target/linux/ar71xx/patches-3.3/119-MIPS-ath79-add-early_printk-support-for-AR934X.patch b/target/linux/ar71xx/patches-3.3/119-MIPS-ath79-add-early_printk-support-for-AR934X.patch deleted file mode 100644 index 512f2da100..0000000000 --- a/target/linux/ar71xx/patches-3.3/119-MIPS-ath79-add-early_printk-support-for-AR934X.patch +++ /dev/null @@ -1,56 +0,0 @@ -From 5c1f1041309ede56d48eb3c665025e87c9824a64 Mon Sep 17 00:00:00 2001 -From: Gabor Juhos <juhosg@openwrt.org> -Date: Wed, 14 Mar 2012 10:45:19 +0100 -Subject: [PATCH 24/47] MIPS: ath79: add early_printk support for AR934X - -The patch allows to see kernel messages on AR934X SoCs in -early boot stage. - -Signed-off-by: Gabor Juhos <juhosg@openwrt.org> -Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com> -Cc: linux-mips@linux-mips.org -Cc: mcgrof@infradead.org -Patchwork: https://patchwork.linux-mips.org/patch/3504/ -Signed-off-by: Ralf Baechle <ralf@linux-mips.org> ---- - arch/mips/ath79/early_printk.c | 3 +++ - arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 6 +++++- - 2 files changed, 8 insertions(+), 1 deletions(-) - ---- a/arch/mips/ath79/early_printk.c -+++ b/arch/mips/ath79/early_printk.c -@@ -71,6 +71,9 @@ static void prom_putchar_init(void) - case REV_ID_MAJOR_AR7241: - case REV_ID_MAJOR_AR7242: - case REV_ID_MAJOR_AR913X: -+ case REV_ID_MAJOR_AR9341: -+ case REV_ID_MAJOR_AR9342: -+ case REV_ID_MAJOR_AR9344: - _prom_putchar = prom_putchar_ar71xx; - break; - ---- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -@@ -1,10 +1,11 @@ - /* - * Atheros AR71XX/AR724X/AR913X SoC register definitions - * -+ * Copyright (C) 2010-2011 Jaiganesh Narayanan <jnarayanan@atheros.com> - * Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> - * -- * Parts of this file are based on Atheros' 2.6.15 BSP -+ * Parts of this file are based on Atheros' 2.6.15/2.6.31 BSP - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published -@@ -249,6 +250,9 @@ - #define REV_ID_MAJOR_AR7242 0x1100 - #define REV_ID_MAJOR_AR9330 0x0110 - #define REV_ID_MAJOR_AR9331 0x1110 -+#define REV_ID_MAJOR_AR9341 0x0120 -+#define REV_ID_MAJOR_AR9342 0x1120 -+#define REV_ID_MAJOR_AR9344 0x2120 - - #define AR71XX_REV_ID_MINOR_MASK 0x3 - #define AR71XX_REV_ID_MINOR_AR7130 0x0 diff --git a/target/linux/ar71xx/patches-3.3/120-MIPS-ath79-sort-case-statements-in-ath79_detect_sys_.patch b/target/linux/ar71xx/patches-3.3/120-MIPS-ath79-sort-case-statements-in-ath79_detect_sys_.patch deleted file mode 100644 index afbb04e4fc..0000000000 --- a/target/linux/ar71xx/patches-3.3/120-MIPS-ath79-sort-case-statements-in-ath79_detect_sys_.patch +++ /dev/null @@ -1,58 +0,0 @@ -From ccb089bbbe49949063cc348743605b3d813ca1c0 Mon Sep 17 00:00:00 2001 -From: Gabor Juhos <juhosg@openwrt.org> -Date: Wed, 14 Mar 2012 10:45:20 +0100 -Subject: [PATCH 25/47] MIPS: ath79: sort case statements in ath79_detect_sys_type - -Sort the case statements alphabetically in order to improve -readability. - -Signed-off-by: Gabor Juhos <juhosg@openwrt.org> -Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com> -Cc: linux-mips@linux-mips.org -Cc: mcgrof@infradead.org -Patchwork: https://patchwork.linux-mips.org/patch/3505/ -Signed-off-by: Ralf Baechle <ralf@linux-mips.org> ---- - arch/mips/ath79/setup.c | 24 ++++++++++++------------ - 1 files changed, 12 insertions(+), 12 deletions(-) - ---- a/arch/mips/ath79/setup.c -+++ b/arch/mips/ath79/setup.c -@@ -116,18 +116,6 @@ static void __init ath79_detect_sys_type - rev = id & AR724X_REV_ID_REVISION_MASK; - break; - -- case REV_ID_MAJOR_AR9330: -- ath79_soc = ATH79_SOC_AR9330; -- chip = "9330"; -- rev = id & AR933X_REV_ID_REVISION_MASK; -- break; -- -- case REV_ID_MAJOR_AR9331: -- ath79_soc = ATH79_SOC_AR9331; -- chip = "9331"; -- rev = id & AR933X_REV_ID_REVISION_MASK; -- break; -- - case REV_ID_MAJOR_AR913X: - minor = id & AR913X_REV_ID_MINOR_MASK; - rev = id >> AR913X_REV_ID_REVISION_SHIFT; -@@ -145,6 +133,18 @@ static void __init ath79_detect_sys_type - } - break; - -+ case REV_ID_MAJOR_AR9330: -+ ath79_soc = ATH79_SOC_AR9330; -+ chip = "9330"; -+ rev = id & AR933X_REV_ID_REVISION_MASK; -+ break; -+ -+ case REV_ID_MAJOR_AR9331: -+ ath79_soc = ATH79_SOC_AR9331; -+ chip = "9331"; -+ rev = id & AR933X_REV_ID_REVISION_MASK; -+ break; -+ - default: - panic("ath79: unknown SoC, id:0x%08x", id); - } diff --git a/target/linux/ar71xx/patches-3.3/121-MIPS-ath79-add-SoC-detection-code-for-AR934X.patch b/target/linux/ar71xx/patches-3.3/121-MIPS-ath79-add-SoC-detection-code-for-AR934X.patch deleted file mode 100644 index 59bb3d8c5d..0000000000 --- a/target/linux/ar71xx/patches-3.3/121-MIPS-ath79-add-SoC-detection-code-for-AR934X.patch +++ /dev/null @@ -1,124 +0,0 @@ -From bf5cb424312f28e51803286a53cb8613bedc5bc8 Mon Sep 17 00:00:00 2001 -From: Gabor Juhos <juhosg@openwrt.org> -Date: Wed, 14 Mar 2012 10:45:21 +0100 -Subject: [PATCH 26/47] MIPS: ath79: add SoC detection code for AR934X - -Also add 'soc_is_ar934[124x]' helper functions and a Kconfig -symbol for the AR934X SoCs. - -Signed-off-by: Gabor Juhos <juhosg@openwrt.org> -Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com> -Cc: linux-mips@linux-mips.org -Cc: mcgrof@infradead.org -Patchwork: https://patchwork.linux-mips.org/patch/3506/ -Signed-off-by: Ralf Baechle <ralf@linux-mips.org> ---- - arch/mips/ath79/Kconfig | 4 ++++ - arch/mips/ath79/setup.c | 21 ++++++++++++++++++++- - arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 2 ++ - arch/mips/include/asm/mach-ath79/ath79.h | 23 +++++++++++++++++++++++ - 4 files changed, 49 insertions(+), 1 deletions(-) - ---- a/arch/mips/ath79/Kconfig -+++ b/arch/mips/ath79/Kconfig -@@ -69,6 +69,10 @@ config SOC_AR933X - select USB_ARCH_HAS_EHCI - def_bool n - -+config SOC_AR934X -+ select USB_ARCH_HAS_EHCI -+ def_bool n -+ - config ATH79_DEV_GPIO_BUTTONS - def_bool n - ---- a/arch/mips/ath79/setup.c -+++ b/arch/mips/ath79/setup.c -@@ -1,10 +1,11 @@ - /* - * Atheros AR71XX/AR724X/AR913X specific setup - * -+ * Copyright (C) 2010-2011 Jaiganesh Narayanan <jnarayanan@atheros.com> - * Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> - * -- * Parts of this file are based on Atheros' 2.6.15 BSP -+ * Parts of this file are based on Atheros' 2.6.15/2.6.31 BSP - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published -@@ -145,6 +146,24 @@ static void __init ath79_detect_sys_type - rev = id & AR933X_REV_ID_REVISION_MASK; - break; - -+ case REV_ID_MAJOR_AR9341: -+ ath79_soc = ATH79_SOC_AR9341; -+ chip = "9341"; -+ rev = id & AR934X_REV_ID_REVISION_MASK; -+ break; -+ -+ case REV_ID_MAJOR_AR9342: -+ ath79_soc = ATH79_SOC_AR9342; -+ chip = "9342"; -+ rev = id & AR934X_REV_ID_REVISION_MASK; -+ break; -+ -+ case REV_ID_MAJOR_AR9344: -+ ath79_soc = ATH79_SOC_AR9344; -+ chip = "9344"; -+ rev = id & AR934X_REV_ID_REVISION_MASK; -+ break; -+ - default: - panic("ath79: unknown SoC, id:0x%08x", id); - } ---- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -@@ -271,6 +271,8 @@ - - #define AR724X_REV_ID_REVISION_MASK 0x3 - -+#define AR934X_REV_ID_REVISION_MASK 0xf -+ - /* - * SPI block - */ ---- a/arch/mips/include/asm/mach-ath79/ath79.h -+++ b/arch/mips/include/asm/mach-ath79/ath79.h -@@ -29,6 +29,9 @@ enum ath79_soc_type { - ATH79_SOC_AR9132, - ATH79_SOC_AR9330, - ATH79_SOC_AR9331, -+ ATH79_SOC_AR9341, -+ ATH79_SOC_AR9342, -+ ATH79_SOC_AR9344, - }; - - extern enum ath79_soc_type ath79_soc; -@@ -75,6 +78,26 @@ static inline int soc_is_ar933x(void) - ath79_soc == ATH79_SOC_AR9331); - } - -+static inline int soc_is_ar9341(void) -+{ -+ return (ath79_soc == ATH79_SOC_AR9341); -+} -+ -+static inline int soc_is_ar9342(void) -+{ -+ return (ath79_soc == ATH79_SOC_AR9342); -+} -+ -+static inline int soc_is_ar9344(void) -+{ -+ return (ath79_soc == ATH79_SOC_AR9344); -+} -+ -+static inline int soc_is_ar934x(void) -+{ -+ return soc_is_ar9341() || soc_is_ar9342() || soc_is_ar9344(); -+} -+ - extern void __iomem *ath79_ddr_base; - extern void __iomem *ath79_pll_base; - extern void __iomem *ath79_reset_base; diff --git a/target/linux/ar71xx/patches-3.3/122-MIPS-ath79-add-clock-initialization-code-for-AR934X.patch b/target/linux/ar71xx/patches-3.3/122-MIPS-ath79-add-clock-initialization-code-for-AR934X.patch deleted file mode 100644 index 39e161cc20..0000000000 --- a/target/linux/ar71xx/patches-3.3/122-MIPS-ath79-add-clock-initialization-code-for-AR934X.patch +++ /dev/null @@ -1,198 +0,0 @@ -From e9706fc0a97feb7992a98806b69a1fc1fcb910c7 Mon Sep 17 00:00:00 2001 -From: Gabor Juhos <juhosg@openwrt.org> -Date: Wed, 14 Mar 2012 10:45:22 +0100 -Subject: [PATCH 27/47] MIPS: ath79: add clock initialization code for AR934X - -Signed-off-by: Gabor Juhos <juhosg@openwrt.org> -Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com> -Cc: linux-mips@linux-mips.org -Cc: mcgrof@infradead.org -Patchwork: https://patchwork.linux-mips.org/patch/3507/ -Signed-off-by: Ralf Baechle <ralf@linux-mips.org> ---- - arch/mips/ath79/clock.c | 81 ++++++++++++++++++++++++ - arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 53 +++++++++++++++ - 2 files changed, 134 insertions(+), 0 deletions(-) - ---- a/arch/mips/ath79/clock.c -+++ b/arch/mips/ath79/clock.c -@@ -1,8 +1,11 @@ - /* - * Atheros AR71XX/AR724X/AR913X common routines - * -+ * Copyright (C) 2010-2011 Jaiganesh Narayanan <jnarayanan@atheros.com> - * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org> - * -+ * Parts of this file are based on Atheros' 2.6.15/2.6.31 BSP -+ * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. -@@ -163,6 +166,82 @@ static void __init ar933x_clocks_init(vo - ath79_uart_clk.rate = ath79_ref_clk.rate; - } - -+static void __init ar934x_clocks_init(void) -+{ -+ u32 pll, out_div, ref_div, nint, frac, clk_ctrl, postdiv; -+ u32 cpu_pll, ddr_pll; -+ u32 bootstrap; -+ -+ bootstrap = ath79_reset_rr(AR934X_RESET_REG_BOOTSTRAP); -+ if (bootstrap & AR934X_BOOTSTRAP_REF_CLK_40) -+ ath79_ref_clk.rate = 40 * 1000 * 1000; -+ else -+ ath79_ref_clk.rate = 25 * 1000 * 1000; -+ -+ pll = ath79_pll_rr(AR934X_PLL_CPU_CONFIG_REG); -+ out_div = (pll >> AR934X_PLL_CPU_CONFIG_OUTDIV_SHIFT) & -+ AR934X_PLL_CPU_CONFIG_OUTDIV_MASK; -+ ref_div = (pll >> AR934X_PLL_CPU_CONFIG_REFDIV_SHIFT) & -+ AR934X_PLL_CPU_CONFIG_REFDIV_MASK; -+ nint = (pll >> AR934X_PLL_CPU_CONFIG_NINT_SHIFT) & -+ AR934X_PLL_CPU_CONFIG_NINT_MASK; -+ frac = (pll >> AR934X_PLL_CPU_CONFIG_NFRAC_SHIFT) & -+ AR934X_PLL_CPU_CONFIG_NFRAC_MASK; -+ -+ cpu_pll = nint * ath79_ref_clk.rate / ref_div; -+ cpu_pll += frac * ath79_ref_clk.rate / (ref_div * (2 << 6)); -+ cpu_pll /= (1 << out_div); -+ -+ pll = ath79_pll_rr(AR934X_PLL_DDR_CONFIG_REG); -+ out_div = (pll >> AR934X_PLL_DDR_CONFIG_OUTDIV_SHIFT) & -+ AR934X_PLL_DDR_CONFIG_OUTDIV_MASK; -+ ref_div = (pll >> AR934X_PLL_DDR_CONFIG_REFDIV_SHIFT) & -+ AR934X_PLL_DDR_CONFIG_REFDIV_MASK; -+ nint = (pll >> AR934X_PLL_DDR_CONFIG_NINT_SHIFT) & -+ AR934X_PLL_DDR_CONFIG_NINT_MASK; -+ frac = (pll >> AR934X_PLL_DDR_CONFIG_NFRAC_SHIFT) & -+ AR934X_PLL_DDR_CONFIG_NFRAC_MASK; -+ -+ ddr_pll = nint * ath79_ref_clk.rate / ref_div; -+ ddr_pll += frac * ath79_ref_clk.rate / (ref_div * (2 << 10)); -+ ddr_pll /= (1 << out_div); -+ -+ clk_ctrl = ath79_pll_rr(AR934X_PLL_CPU_DDR_CLK_CTRL_REG); -+ -+ postdiv = (clk_ctrl >> AR934X_PLL_CPU_DDR_CLK_CTRL_CPU_POST_DIV_SHIFT) & -+ AR934X_PLL_CPU_DDR_CLK_CTRL_CPU_POST_DIV_MASK; -+ -+ if (clk_ctrl & AR934X_PLL_CPU_DDR_CLK_CTRL_CPU_PLL_BYPASS) -+ ath79_cpu_clk.rate = ath79_ref_clk.rate; -+ else if (clk_ctrl & AR934X_PLL_CPU_DDR_CLK_CTRL_CPUCLK_FROM_CPUPLL) -+ ath79_cpu_clk.rate = cpu_pll / (postdiv + 1); -+ else -+ ath79_cpu_clk.rate = ddr_pll / (postdiv + 1); -+ -+ postdiv = (clk_ctrl >> AR934X_PLL_CPU_DDR_CLK_CTRL_DDR_POST_DIV_SHIFT) & -+ AR934X_PLL_CPU_DDR_CLK_CTRL_DDR_POST_DIV_MASK; -+ -+ if (clk_ctrl & AR934X_PLL_CPU_DDR_CLK_CTRL_DDR_PLL_BYPASS) -+ ath79_ddr_clk.rate = ath79_ref_clk.rate; -+ else if (clk_ctrl & AR934X_PLL_CPU_DDR_CLK_CTRL_DDRCLK_FROM_DDRPLL) -+ ath79_ddr_clk.rate = ddr_pll / (postdiv + 1); -+ else -+ ath79_ddr_clk.rate = cpu_pll / (postdiv + 1); -+ -+ postdiv = (clk_ctrl >> AR934X_PLL_CPU_DDR_CLK_CTRL_AHB_POST_DIV_SHIFT) & -+ AR934X_PLL_CPU_DDR_CLK_CTRL_AHB_POST_DIV_MASK; -+ -+ if (clk_ctrl & AR934X_PLL_CPU_DDR_CLK_CTRL_AHB_PLL_BYPASS) -+ ath79_ahb_clk.rate = ath79_ref_clk.rate; -+ else if (clk_ctrl & AR934X_PLL_CPU_DDR_CLK_CTRL_AHBCLK_FROM_DDRPLL) -+ ath79_ahb_clk.rate = ddr_pll / (postdiv + 1); -+ else -+ ath79_ahb_clk.rate = cpu_pll / (postdiv + 1); -+ -+ ath79_wdt_clk.rate = ath79_ref_clk.rate; -+ ath79_uart_clk.rate = ath79_ref_clk.rate; -+} -+ - void __init ath79_clocks_init(void) - { - if (soc_is_ar71xx()) -@@ -173,6 +252,8 @@ void __init ath79_clocks_init(void) - ar913x_clocks_init(); - else if (soc_is_ar933x()) - ar933x_clocks_init(); -+ else if (soc_is_ar934x()) -+ ar934x_clocks_init(); - else - BUG(); - ---- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -@@ -151,6 +151,41 @@ - #define AR933X_PLL_CLOCK_CTRL_AHB_DIV_SHIFT 15 - #define AR933X_PLL_CLOCK_CTRL_AHB_DIV_MASK 0x7 - -+#define AR934X_PLL_CPU_CONFIG_REG 0x00 -+#define AR934X_PLL_DDR_CONFIG_REG 0x04 -+#define AR934X_PLL_CPU_DDR_CLK_CTRL_REG 0x08 -+ -+#define AR934X_PLL_CPU_CONFIG_NFRAC_SHIFT 0 -+#define AR934X_PLL_CPU_CONFIG_NFRAC_MASK 0x3f -+#define AR934X_PLL_CPU_CONFIG_NINT_SHIFT 6 -+#define AR934X_PLL_CPU_CONFIG_NINT_MASK 0x3f -+#define AR934X_PLL_CPU_CONFIG_REFDIV_SHIFT 12 -+#define AR934X_PLL_CPU_CONFIG_REFDIV_MASK 0x1f -+#define AR934X_PLL_CPU_CONFIG_OUTDIV_SHIFT 19 -+#define AR934X_PLL_CPU_CONFIG_OUTDIV_MASK 0x3 -+ -+#define AR934X_PLL_DDR_CONFIG_NFRAC_SHIFT 0 -+#define AR934X_PLL_DDR_CONFIG_NFRAC_MASK 0x3ff -+#define AR934X_PLL_DDR_CONFIG_NINT_SHIFT 10 -+#define AR934X_PLL_DDR_CONFIG_NINT_MASK 0x3f -+#define AR934X_PLL_DDR_CONFIG_REFDIV_SHIFT 16 -+#define AR934X_PLL_DDR_CONFIG_REFDIV_MASK 0x1f -+#define AR934X_PLL_DDR_CONFIG_OUTDIV_SHIFT 23 -+#define AR934X_PLL_DDR_CONFIG_OUTDIV_MASK 0x7 -+ -+#define AR934X_PLL_CPU_DDR_CLK_CTRL_CPU_PLL_BYPASS BIT(2) -+#define AR934X_PLL_CPU_DDR_CLK_CTRL_DDR_PLL_BYPASS BIT(3) -+#define AR934X_PLL_CPU_DDR_CLK_CTRL_AHB_PLL_BYPASS BIT(4) -+#define AR934X_PLL_CPU_DDR_CLK_CTRL_CPU_POST_DIV_SHIFT 5 -+#define AR934X_PLL_CPU_DDR_CLK_CTRL_CPU_POST_DIV_MASK 0x1f -+#define AR934X_PLL_CPU_DDR_CLK_CTRL_DDR_POST_DIV_SHIFT 10 -+#define AR934X_PLL_CPU_DDR_CLK_CTRL_DDR_POST_DIV_MASK 0x1f -+#define AR934X_PLL_CPU_DDR_CLK_CTRL_AHB_POST_DIV_SHIFT 15 -+#define AR934X_PLL_CPU_DDR_CLK_CTRL_AHB_POST_DIV_MASK 0x1f -+#define AR934X_PLL_CPU_DDR_CLK_CTRL_CPUCLK_FROM_CPUPLL BIT(20) -+#define AR934X_PLL_CPU_DDR_CLK_CTRL_DDRCLK_FROM_DDRPLL BIT(21) -+#define AR934X_PLL_CPU_DDR_CLK_CTRL_AHBCLK_FROM_DDRPLL BIT(24) -+ - /* - * USB_CONFIG block - */ -@@ -186,6 +221,8 @@ - #define AR933X_RESET_REG_RESET_MODULE 0x1c - #define AR933X_RESET_REG_BOOTSTRAP 0xac - -+#define AR934X_RESET_REG_BOOTSTRAP 0xb0 -+ - #define MISC_INT_ETHSW BIT(12) - #define MISC_INT_TIMER4 BIT(10) - #define MISC_INT_TIMER3 BIT(9) -@@ -242,6 +279,22 @@ - - #define AR933X_BOOTSTRAP_REF_CLK_40 BIT(0) - -+#define AR934X_BOOTSTRAP_SW_OPTION8 BIT(23) -+#define AR934X_BOOTSTRAP_SW_OPTION7 BIT(22) -+#define AR934X_BOOTSTRAP_SW_OPTION6 BIT(21) -+#define AR934X_BOOTSTRAP_SW_OPTION5 BIT(20) -+#define AR934X_BOOTSTRAP_SW_OPTION4 BIT(19) -+#define AR934X_BOOTSTRAP_SW_OPTION3 BIT(18) -+#define AR934X_BOOTSTRAP_SW_OPTION2 BIT(17) -+#define AR934X_BOOTSTRAP_SW_OPTION1 BIT(16) -+#define AR934X_BOOTSTRAP_USB_MODE_DEVICE BIT(7) -+#define AR934X_BOOTSTRAP_PCIE_RC BIT(6) -+#define AR934X_BOOTSTRAP_EJTAG_MODE BIT(5) -+#define AR934X_BOOTSTRAP_REF_CLK_40 BIT(4) -+#define AR934X_BOOTSTRAP_BOOT_FROM_SPI BIT(2) -+#define AR934X_BOOTSTRAP_SDRAM_DISABLED BIT(1) -+#define AR934X_BOOTSTRAP_DDR1 BIT(0) -+ - #define REV_ID_MAJOR_MASK 0xfff0 - #define REV_ID_MAJOR_AR71XX 0x00a0 - #define REV_ID_MAJOR_AR913X 0x00b0 diff --git a/target/linux/ar71xx/patches-3.3/123-MIPS-ath79-add-GPIO-support-code-for-AR934X.patch b/target/linux/ar71xx/patches-3.3/123-MIPS-ath79-add-GPIO-support-code-for-AR934X.patch deleted file mode 100644 index 77c8d5a57c..0000000000 --- a/target/linux/ar71xx/patches-3.3/123-MIPS-ath79-add-GPIO-support-code-for-AR934X.patch +++ /dev/null @@ -1,102 +0,0 @@ -From 77bb01d1919bcb6787d5cde9056936420288ab34 Mon Sep 17 00:00:00 2001 -From: Gabor Juhos <juhosg@openwrt.org> -Date: Wed, 14 Mar 2012 10:45:23 +0100 -Subject: [PATCH 28/47] MIPS: ath79: add GPIO support code for AR934X - -Signed-off-by: Gabor Juhos <juhosg@openwrt.org> -Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com> -Cc: linux-mips@linux-mips.org -Cc: mcgrof@infradead.org -Patchwork: https://patchwork.linux-mips.org/patch/3508/ -Signed-off-by: Ralf Baechle <ralf@linux-mips.org> ---- - arch/mips/ath79/gpio.c | 47 +++++++++++++++++++++++- - arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 1 + - 2 files changed, 47 insertions(+), 1 deletions(-) - ---- a/arch/mips/ath79/gpio.c -+++ b/arch/mips/ath79/gpio.c -@@ -1,9 +1,12 @@ - /* - * Atheros AR71XX/AR724X/AR913X GPIO API support - * -- * Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org> -+ * Copyright (C) 2010-2011 Jaiganesh Narayanan <jnarayanan@atheros.com> -+ * Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> - * -+ * Parts of this file are based on Atheros' 2.6.15/2.6.31 BSP -+ * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. -@@ -89,6 +92,42 @@ static int ath79_gpio_direction_output(s - return 0; - } - -+static int ar934x_gpio_direction_input(struct gpio_chip *chip, unsigned offset) -+{ -+ void __iomem *base = ath79_gpio_base; -+ unsigned long flags; -+ -+ spin_lock_irqsave(&ath79_gpio_lock, flags); -+ -+ __raw_writel(__raw_readl(base + AR71XX_GPIO_REG_OE) | (1 << offset), -+ base + AR71XX_GPIO_REG_OE); -+ -+ spin_unlock_irqrestore(&ath79_gpio_lock, flags); -+ -+ return 0; -+} -+ -+static int ar934x_gpio_direction_output(struct gpio_chip *chip, unsigned offset, -+ int value) -+{ -+ void __iomem *base = ath79_gpio_base; -+ unsigned long flags; -+ -+ spin_lock_irqsave(&ath79_gpio_lock, flags); -+ -+ if (value) -+ __raw_writel(1 << offset, base + AR71XX_GPIO_REG_SET); -+ else -+ __raw_writel(1 << offset, base + AR71XX_GPIO_REG_CLEAR); -+ -+ __raw_writel(__raw_readl(base + AR71XX_GPIO_REG_OE) & ~(1 << offset), -+ base + AR71XX_GPIO_REG_OE); -+ -+ spin_unlock_irqrestore(&ath79_gpio_lock, flags); -+ -+ return 0; -+} -+ - static struct gpio_chip ath79_gpio_chip = { - .label = "ath79", - .get = ath79_gpio_get_value, -@@ -155,11 +194,17 @@ void __init ath79_gpio_init(void) - ath79_gpio_count = AR913X_GPIO_COUNT; - else if (soc_is_ar933x()) - ath79_gpio_count = AR933X_GPIO_COUNT; -+ else if (soc_is_ar934x()) -+ ath79_gpio_count = AR934X_GPIO_COUNT; - else - BUG(); - - ath79_gpio_base = ioremap_nocache(AR71XX_GPIO_BASE, AR71XX_GPIO_SIZE); - ath79_gpio_chip.ngpio = ath79_gpio_count; -+ if (soc_is_ar934x()) { -+ ath79_gpio_chip.direction_input = ar934x_gpio_direction_input; -+ ath79_gpio_chip.direction_output = ar934x_gpio_direction_output; -+ } - - err = gpiochip_add(&ath79_gpio_chip); - if (err) ---- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -@@ -367,5 +367,6 @@ - #define AR724X_GPIO_COUNT 18 - #define AR913X_GPIO_COUNT 22 - #define AR933X_GPIO_COUNT 30 -+#define AR934X_GPIO_COUNT 23 - - #endif /* __ASM_MACH_AR71XX_REGS_H */ diff --git a/target/linux/ar71xx/patches-3.3/124-MIPS-ath79-rework-IP2-IP3-interrupt-handling.patch b/target/linux/ar71xx/patches-3.3/124-MIPS-ath79-rework-IP2-IP3-interrupt-handling.patch deleted file mode 100644 index 0f30d3836f..0000000000 --- a/target/linux/ar71xx/patches-3.3/124-MIPS-ath79-rework-IP2-IP3-interrupt-handling.patch +++ /dev/null @@ -1,158 +0,0 @@ -From f44c70eb5368c0742a8f401ccf39f2ba7252f5a7 Mon Sep 17 00:00:00 2001 -From: Gabor Juhos <juhosg@openwrt.org> -Date: Wed, 14 Mar 2012 10:45:24 +0100 -Subject: [PATCH 29/47] MIPS: ath79: rework IP2/IP3 interrupt handling - -The current implementation assumes that flushing the -DDR writeback buffer is required for IP2/IP3 interrupts, -however this is not true for all SoCs. - -Use SoC specific IP2/IP3 handlers instead of flushing -the buffers in the dispatcher code. - -Signed-off-by: Gabor Juhos <juhosg@openwrt.org> -Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com> -Cc: linux-mips@linux-mips.org -Cc: mcgrof@infradead.org -Patchwork: https://patchwork.linux-mips.org/patch/3509/ -Signed-off-by: Ralf Baechle <ralf@linux-mips.org> ---- - arch/mips/ath79/irq.c | 92 ++++++++++++++++++++++++++++++++++++++----------- - 1 files changed, 72 insertions(+), 20 deletions(-) - ---- a/arch/mips/ath79/irq.c -+++ b/arch/mips/ath79/irq.c -@@ -1,7 +1,7 @@ - /* - * Atheros AR71xx/AR724x/AR913x specific interrupt handling - * -- * Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org> -+ * Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> - * - * Parts of this file are based on Atheros' 2.6.15 BSP -@@ -23,8 +23,8 @@ - #include <asm/mach-ath79/ar71xx_regs.h> - #include "common.h" - --static unsigned int ath79_ip2_flush_reg; --static unsigned int ath79_ip3_flush_reg; -+static void (*ath79_ip2_handler)(void); -+static void (*ath79_ip3_handler)(void); - - static void ath79_misc_irq_handler(unsigned int irq, struct irq_desc *desc) - { -@@ -152,10 +152,8 @@ asmlinkage void plat_irq_dispatch(void) - if (pending & STATUSF_IP7) - do_IRQ(ATH79_CPU_IRQ_TIMER); - -- else if (pending & STATUSF_IP2) { -- ath79_ddr_wb_flush(ath79_ip2_flush_reg); -- do_IRQ(ATH79_CPU_IRQ_IP2); -- } -+ else if (pending & STATUSF_IP2) -+ ath79_ip2_handler(); - - else if (pending & STATUSF_IP4) - do_IRQ(ATH79_CPU_IRQ_GE0); -@@ -163,10 +161,8 @@ asmlinkage void plat_irq_dispatch(void) - else if (pending & STATUSF_IP5) - do_IRQ(ATH79_CPU_IRQ_GE1); - -- else if (pending & STATUSF_IP3) { -- ath79_ddr_wb_flush(ath79_ip3_flush_reg); -- do_IRQ(ATH79_CPU_IRQ_USB); -- } -+ else if (pending & STATUSF_IP3) -+ ath79_ip3_handler(); - - else if (pending & STATUSF_IP6) - do_IRQ(ATH79_CPU_IRQ_MISC); -@@ -175,22 +171,78 @@ asmlinkage void plat_irq_dispatch(void) - spurious_interrupt(); - } - -+/* -+ * The IP2/IP3 lines are tied to a PCI/WMAC/USB device. Drivers for -+ * these devices typically allocate coherent DMA memory, however the -+ * DMA controller may still have some unsynchronized data in the FIFO. -+ * Issue a flush in the handlers to ensure that the driver sees -+ * the update. -+ */ -+static void ar71xx_ip2_handler(void) -+{ -+ ath79_ddr_wb_flush(AR71XX_DDR_REG_FLUSH_PCI); -+ do_IRQ(ATH79_CPU_IRQ_IP2); -+} -+ -+static void ar724x_ip2_handler(void) -+{ -+ ath79_ddr_wb_flush(AR724X_DDR_REG_FLUSH_PCIE); -+ do_IRQ(ATH79_CPU_IRQ_IP2); -+} -+ -+static void ar913x_ip2_handler(void) -+{ -+ ath79_ddr_wb_flush(AR913X_DDR_REG_FLUSH_WMAC); -+ do_IRQ(ATH79_CPU_IRQ_IP2); -+} -+ -+static void ar933x_ip2_handler(void) -+{ -+ ath79_ddr_wb_flush(AR933X_DDR_REG_FLUSH_WMAC); -+ do_IRQ(ATH79_CPU_IRQ_IP2); -+} -+ -+static void ar71xx_ip3_handler(void) -+{ -+ ath79_ddr_wb_flush(AR71XX_DDR_REG_FLUSH_USB); -+ do_IRQ(ATH79_CPU_IRQ_USB); -+} -+ -+static void ar724x_ip3_handler(void) -+{ -+ ath79_ddr_wb_flush(AR724X_DDR_REG_FLUSH_USB); -+ do_IRQ(ATH79_CPU_IRQ_USB); -+} -+ -+static void ar913x_ip3_handler(void) -+{ -+ ath79_ddr_wb_flush(AR913X_DDR_REG_FLUSH_USB); -+ do_IRQ(ATH79_CPU_IRQ_USB); -+} -+ -+static void ar933x_ip3_handler(void) -+{ -+ ath79_ddr_wb_flush(AR933X_DDR_REG_FLUSH_USB); -+ do_IRQ(ATH79_CPU_IRQ_USB); -+} -+ - void __init arch_init_irq(void) - { - if (soc_is_ar71xx()) { -- ath79_ip2_flush_reg = AR71XX_DDR_REG_FLUSH_PCI; -- ath79_ip3_flush_reg = AR71XX_DDR_REG_FLUSH_USB; -+ ath79_ip2_handler = ar71xx_ip2_handler; -+ ath79_ip3_handler = ar71xx_ip3_handler; - } else if (soc_is_ar724x()) { -- ath79_ip2_flush_reg = AR724X_DDR_REG_FLUSH_PCIE; -- ath79_ip3_flush_reg = AR724X_DDR_REG_FLUSH_USB; -+ ath79_ip2_handler = ar724x_ip2_handler; -+ ath79_ip3_handler = ar724x_ip3_handler; - } else if (soc_is_ar913x()) { -- ath79_ip2_flush_reg = AR913X_DDR_REG_FLUSH_WMAC; -- ath79_ip3_flush_reg = AR913X_DDR_REG_FLUSH_USB; -+ ath79_ip2_handler = ar913x_ip2_handler; -+ ath79_ip3_handler = ar913x_ip3_handler; - } else if (soc_is_ar933x()) { -- ath79_ip2_flush_reg = AR933X_DDR_REG_FLUSH_WMAC; -- ath79_ip3_flush_reg = AR933X_DDR_REG_FLUSH_USB; -- } else -+ ath79_ip2_handler = ar933x_ip2_handler; -+ ath79_ip3_handler = ar933x_ip3_handler; -+ } else { - BUG(); -+ } - - cp0_perfcount_irq = ATH79_MISC_IRQ_PERFC; - mips_cpu_irq_init(); diff --git a/target/linux/ar71xx/patches-3.3/125-MIPS-ath79-add-IRQ-handling-code-for-AR934X.patch b/target/linux/ar71xx/patches-3.3/125-MIPS-ath79-add-IRQ-handling-code-for-AR934X.patch deleted file mode 100644 index 1268077255..0000000000 --- a/target/linux/ar71xx/patches-3.3/125-MIPS-ath79-add-IRQ-handling-code-for-AR934X.patch +++ /dev/null @@ -1,194 +0,0 @@ -From b16fdecf14d24fe213c81409c0c2dca66d5b7bc9 Mon Sep 17 00:00:00 2001 -From: Gabor Juhos <juhosg@openwrt.org> -Date: Wed, 14 Mar 2012 10:45:25 +0100 -Subject: [PATCH 30/47] MIPS: ath79: add IRQ handling code for AR934X - -Signed-off-by: Gabor Juhos <juhosg@openwrt.org> -Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com> -Cc: linux-mips@linux-mips.org -Cc: mcgrof@infradead.org -Patchwork: https://patchwork.linux-mips.org/patch/3510/ -Signed-off-by: Ralf Baechle <ralf@linux-mips.org> ---- - arch/mips/ath79/irq.c | 55 +++++++++++++++++++++++- - arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 25 +++++++++++ - arch/mips/include/asm/mach-ath79/irq.h | 6 ++- - 3 files changed, 83 insertions(+), 3 deletions(-) - ---- a/arch/mips/ath79/irq.c -+++ b/arch/mips/ath79/irq.c -@@ -1,10 +1,11 @@ - /* - * Atheros AR71xx/AR724x/AR913x specific interrupt handling - * -+ * Copyright (C) 2010-2011 Jaiganesh Narayanan <jnarayanan@atheros.com> - * Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> - * -- * Parts of this file are based on Atheros' 2.6.15 BSP -+ * Parts of this file are based on Atheros' 2.6.15/2.6.31 BSP - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published -@@ -129,7 +130,7 @@ static void __init ath79_misc_irq_init(v - - if (soc_is_ar71xx() || soc_is_ar913x()) - ath79_misc_irq_chip.irq_mask_ack = ar71xx_misc_irq_mask; -- else if (soc_is_ar724x() || soc_is_ar933x()) -+ else if (soc_is_ar724x() || soc_is_ar933x() || soc_is_ar934x()) - ath79_misc_irq_chip.irq_ack = ar724x_misc_irq_ack; - else - BUG(); -@@ -143,6 +144,39 @@ static void __init ath79_misc_irq_init(v - irq_set_chained_handler(ATH79_CPU_IRQ_MISC, ath79_misc_irq_handler); - } - -+static void ar934x_ip2_irq_dispatch(unsigned int irq, struct irq_desc *desc) -+{ -+ u32 status; -+ -+ disable_irq_nosync(irq); -+ -+ status = ath79_reset_rr(AR934X_RESET_REG_PCIE_WMAC_INT_STATUS); -+ -+ if (status & AR934X_PCIE_WMAC_INT_PCIE_ALL) { -+ ath79_ddr_wb_flush(AR934X_DDR_REG_FLUSH_PCIE); -+ generic_handle_irq(ATH79_IP2_IRQ(0)); -+ } else if (status & AR934X_PCIE_WMAC_INT_WMAC_ALL) { -+ ath79_ddr_wb_flush(AR934X_DDR_REG_FLUSH_WMAC); -+ generic_handle_irq(ATH79_IP2_IRQ(1)); -+ } else { -+ spurious_interrupt(); -+ } -+ -+ enable_irq(irq); -+} -+ -+static void ar934x_ip2_irq_init(void) -+{ -+ int i; -+ -+ for (i = ATH79_IP2_IRQ_BASE; -+ i < ATH79_IP2_IRQ_BASE + ATH79_IP2_IRQ_COUNT; i++) -+ irq_set_chip_and_handler(i, &dummy_irq_chip, -+ handle_level_irq); -+ -+ irq_set_chained_handler(ATH79_CPU_IRQ_IP2, ar934x_ip2_irq_dispatch); -+} -+ - asmlinkage void plat_irq_dispatch(void) - { - unsigned long pending; -@@ -202,6 +236,11 @@ static void ar933x_ip2_handler(void) - do_IRQ(ATH79_CPU_IRQ_IP2); - } - -+static void ar934x_ip2_handler(void) -+{ -+ do_IRQ(ATH79_CPU_IRQ_IP2); -+} -+ - static void ar71xx_ip3_handler(void) - { - ath79_ddr_wb_flush(AR71XX_DDR_REG_FLUSH_USB); -@@ -226,6 +265,12 @@ static void ar933x_ip3_handler(void) - do_IRQ(ATH79_CPU_IRQ_USB); - } - -+static void ar934x_ip3_handler(void) -+{ -+ ath79_ddr_wb_flush(AR934X_DDR_REG_FLUSH_USB); -+ do_IRQ(ATH79_CPU_IRQ_USB); -+} -+ - void __init arch_init_irq(void) - { - if (soc_is_ar71xx()) { -@@ -240,6 +285,9 @@ void __init arch_init_irq(void) - } else if (soc_is_ar933x()) { - ath79_ip2_handler = ar933x_ip2_handler; - ath79_ip3_handler = ar933x_ip3_handler; -+ } else if (soc_is_ar934x()) { -+ ath79_ip2_handler = ar934x_ip2_handler; -+ ath79_ip3_handler = ar934x_ip3_handler; - } else { - BUG(); - } -@@ -247,4 +295,7 @@ void __init arch_init_irq(void) - cp0_perfcount_irq = ATH79_MISC_IRQ_PERFC; - mips_cpu_irq_init(); - ath79_misc_irq_init(); -+ -+ if (soc_is_ar934x()) -+ ar934x_ip2_irq_init(); - } ---- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -@@ -92,6 +92,12 @@ - #define AR933X_DDR_REG_FLUSH_USB 0x84 - #define AR933X_DDR_REG_FLUSH_WMAC 0x88 - -+#define AR934X_DDR_REG_FLUSH_GE0 0x9c -+#define AR934X_DDR_REG_FLUSH_GE1 0xa0 -+#define AR934X_DDR_REG_FLUSH_USB 0xa4 -+#define AR934X_DDR_REG_FLUSH_PCIE 0xa8 -+#define AR934X_DDR_REG_FLUSH_WMAC 0xac -+ - /* - * PLL block - */ -@@ -222,6 +228,7 @@ - #define AR933X_RESET_REG_BOOTSTRAP 0xac - - #define AR934X_RESET_REG_BOOTSTRAP 0xb0 -+#define AR934X_RESET_REG_PCIE_WMAC_INT_STATUS 0xac - - #define MISC_INT_ETHSW BIT(12) - #define MISC_INT_TIMER4 BIT(10) -@@ -295,6 +302,24 @@ - #define AR934X_BOOTSTRAP_SDRAM_DISABLED BIT(1) - #define AR934X_BOOTSTRAP_DDR1 BIT(0) - -+#define AR934X_PCIE_WMAC_INT_WMAC_MISC BIT(0) -+#define AR934X_PCIE_WMAC_INT_WMAC_TX BIT(1) -+#define AR934X_PCIE_WMAC_INT_WMAC_RXLP BIT(2) -+#define AR934X_PCIE_WMAC_INT_WMAC_RXHP BIT(3) -+#define AR934X_PCIE_WMAC_INT_PCIE_RC BIT(4) -+#define AR934X_PCIE_WMAC_INT_PCIE_RC0 BIT(5) -+#define AR934X_PCIE_WMAC_INT_PCIE_RC1 BIT(6) -+#define AR934X_PCIE_WMAC_INT_PCIE_RC2 BIT(7) -+#define AR934X_PCIE_WMAC_INT_PCIE_RC3 BIT(8) -+#define AR934X_PCIE_WMAC_INT_WMAC_ALL \ -+ (AR934X_PCIE_WMAC_INT_WMAC_MISC | AR934X_PCIE_WMAC_INT_WMAC_TX | \ -+ AR934X_PCIE_WMAC_INT_WMAC_RXLP | AR934X_PCIE_WMAC_INT_WMAC_RXHP) -+ -+#define AR934X_PCIE_WMAC_INT_PCIE_ALL \ -+ (AR934X_PCIE_WMAC_INT_PCIE_RC | AR934X_PCIE_WMAC_INT_PCIE_RC0 | \ -+ AR934X_PCIE_WMAC_INT_PCIE_RC1 | AR934X_PCIE_WMAC_INT_PCIE_RC2 | \ -+ AR934X_PCIE_WMAC_INT_PCIE_RC3) -+ - #define REV_ID_MAJOR_MASK 0xfff0 - #define REV_ID_MAJOR_AR71XX 0x00a0 - #define REV_ID_MAJOR_AR913X 0x00b0 ---- a/arch/mips/include/asm/mach-ath79/irq.h -+++ b/arch/mips/include/asm/mach-ath79/irq.h -@@ -10,7 +10,7 @@ - #define __ASM_MACH_ATH79_IRQ_H - - #define MIPS_CPU_IRQ_BASE 0 --#define NR_IRQS 46 -+#define NR_IRQS 48 - - #define ATH79_MISC_IRQ_BASE 8 - #define ATH79_MISC_IRQ_COUNT 32 -@@ -19,6 +19,10 @@ - #define ATH79_PCI_IRQ_COUNT 6 - #define ATH79_PCI_IRQ(_x) (ATH79_PCI_IRQ_BASE + (_x)) - -+#define ATH79_IP2_IRQ_BASE (ATH79_PCI_IRQ_BASE + ATH79_PCI_IRQ_COUNT) -+#define ATH79_IP2_IRQ_COUNT 2 -+#define ATH79_IP2_IRQ(_x) (ATH79_IP2_IRQ_BASE + (_x)) -+ - #define ATH79_CPU_IRQ_IP2 (MIPS_CPU_IRQ_BASE + 2) - #define ATH79_CPU_IRQ_USB (MIPS_CPU_IRQ_BASE + 3) - #define ATH79_CPU_IRQ_GE0 (MIPS_CPU_IRQ_BASE + 4) diff --git a/target/linux/ar71xx/patches-3.3/126-MIPS-ath79-add-AR934X-specific-glue-to-ath79_device_.patch b/target/linux/ar71xx/patches-3.3/126-MIPS-ath79-add-AR934X-specific-glue-to-ath79_device_.patch deleted file mode 100644 index 14d4a27d16..0000000000 --- a/target/linux/ar71xx/patches-3.3/126-MIPS-ath79-add-AR934X-specific-glue-to-ath79_device_.patch +++ /dev/null @@ -1,60 +0,0 @@ -From 98bfbb0b3f126d93076377fcd9553a493e45e304 Mon Sep 17 00:00:00 2001 -From: Gabor Juhos <juhosg@openwrt.org> -Date: Wed, 14 Mar 2012 10:45:26 +0100 -Subject: [PATCH 31/47] MIPS: ath79: add AR934X specific glue to ath79_device_reset_{clear,set} - -Signed-off-by: Gabor Juhos <juhosg@openwrt.org> -Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com> -Cc: linux-mips@linux-mips.org -Cc: mcgrof@infradead.org -Patchwork: https://patchwork.linux-mips.org/patch/3511/ -Signed-off-by: Ralf Baechle <ralf@linux-mips.org> ---- - arch/mips/ath79/common.c | 9 ++++++++- - arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 1 + - 2 files changed, 9 insertions(+), 1 deletions(-) - ---- a/arch/mips/ath79/common.c -+++ b/arch/mips/ath79/common.c -@@ -1,9 +1,12 @@ - /* - * Atheros AR71XX/AR724X/AR913X common routines - * -- * Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org> -+ * Copyright (C) 2010-2011 Jaiganesh Narayanan <jnarayanan@atheros.com> -+ * Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> - * -+ * Parts of this file are based on Atheros' 2.6.15/2.6.31 BSP -+ * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. -@@ -67,6 +70,8 @@ void ath79_device_reset_set(u32 mask) - reg = AR913X_RESET_REG_RESET_MODULE; - else if (soc_is_ar933x()) - reg = AR933X_RESET_REG_RESET_MODULE; -+ else if (soc_is_ar934x()) -+ reg = AR934X_RESET_REG_RESET_MODULE; - else - BUG(); - -@@ -91,6 +96,8 @@ void ath79_device_reset_clear(u32 mask) - reg = AR913X_RESET_REG_RESET_MODULE; - else if (soc_is_ar933x()) - reg = AR933X_RESET_REG_RESET_MODULE; -+ else if (soc_is_ar934x()) -+ reg = AR934X_RESET_REG_RESET_MODULE; - else - BUG(); - ---- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -@@ -227,6 +227,7 @@ - #define AR933X_RESET_REG_RESET_MODULE 0x1c - #define AR933X_RESET_REG_BOOTSTRAP 0xac - -+#define AR934X_RESET_REG_RESET_MODULE 0x1c - #define AR934X_RESET_REG_BOOTSTRAP 0xb0 - #define AR934X_RESET_REG_PCIE_WMAC_INT_STATUS 0xac - diff --git a/target/linux/ar71xx/patches-3.3/127-MIPS-ath79-register-UART-device-for-AR934X-SoCs.patch b/target/linux/ar71xx/patches-3.3/127-MIPS-ath79-register-UART-device-for-AR934X-SoCs.patch deleted file mode 100644 index 2c7eecabf7..0000000000 --- a/target/linux/ar71xx/patches-3.3/127-MIPS-ath79-register-UART-device-for-AR934X-SoCs.patch +++ /dev/null @@ -1,27 +0,0 @@ -From 2d4ed1c7405d05da812b67830eaac15f43b862b7 Mon Sep 17 00:00:00 2001 -From: Gabor Juhos <juhosg@openwrt.org> -Date: Wed, 14 Mar 2012 10:45:27 +0100 -Subject: [PATCH 32/47] MIPS: ath79: register UART device for AR934X SoCs - -Signed-off-by: Gabor Juhos <juhosg@openwrt.org> -Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com> -Cc: linux-mips@linux-mips.org -Cc: mcgrof@infradead.org -Patchwork: https://patchwork.linux-mips.org/patch/3512/ -Signed-off-by: Ralf Baechle <ralf@linux-mips.org> ---- - arch/mips/ath79/dev-common.c | 3 ++- - 1 files changed, 2 insertions(+), 1 deletions(-) - ---- a/arch/mips/ath79/dev-common.c -+++ b/arch/mips/ath79/dev-common.c -@@ -89,7 +89,8 @@ void __init ath79_register_uart(void) - - if (soc_is_ar71xx() || - soc_is_ar724x() || -- soc_is_ar913x()) { -+ soc_is_ar913x() || -+ soc_is_ar934x()) { - ath79_uart_data[0].uartclk = clk_get_rate(clk); - platform_device_register(&ath79_uart_device); - } else if (soc_is_ar933x()) { diff --git a/target/linux/ar71xx/patches-3.3/128-MIPS-ath79-add-WMAC-registration-code-for-AR934X.patch b/target/linux/ar71xx/patches-3.3/128-MIPS-ath79-add-WMAC-registration-code-for-AR934X.patch deleted file mode 100644 index adbe3e4bb5..0000000000 --- a/target/linux/ar71xx/patches-3.3/128-MIPS-ath79-add-WMAC-registration-code-for-AR934X.patch +++ /dev/null @@ -1,116 +0,0 @@ -From d677877e2688813e5e0c12d0228a631021ed70c4 Mon Sep 17 00:00:00 2001 -From: Gabor Juhos <juhosg@openwrt.org> -Date: Wed, 14 Mar 2012 10:45:28 +0100 -Subject: [PATCH 33/47] MIPS: ath79: add WMAC registration code for AR934X - -Signed-off-by: Gabor Juhos <juhosg@openwrt.org> -Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com> -Cc: linux-mips@linux-mips.org -Cc: mcgrof@infradead.org -Patchwork: https://patchwork.linux-mips.org/patch/3513/ -Signed-off-by: Ralf Baechle <ralf@linux-mips.org> ---- - arch/mips/ath79/Kconfig | 2 +- - arch/mips/ath79/dev-wmac.c | 30 ++++++++++++++++++++++- - arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 3 ++ - 3 files changed, 32 insertions(+), 3 deletions(-) - ---- a/arch/mips/ath79/Kconfig -+++ b/arch/mips/ath79/Kconfig -@@ -86,7 +86,7 @@ config ATH79_DEV_USB - def_bool n - - config ATH79_DEV_WMAC -- depends on (SOC_AR913X || SOC_AR933X) -+ depends on (SOC_AR913X || SOC_AR933X || SOC_AR934X) - def_bool n - - endif ---- a/arch/mips/ath79/dev-wmac.c -+++ b/arch/mips/ath79/dev-wmac.c -@@ -1,9 +1,12 @@ - /* - * Atheros AR913X/AR933X SoC built-in WMAC device support - * -+ * Copyright (C) 2010-2011 Jaiganesh Narayanan <jnarayanan@atheros.com> - * Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> - * -+ * Parts of this file are based on Atheros 2.6.15/2.6.31 BSP -+ * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. -@@ -26,8 +29,7 @@ static struct resource ath79_wmac_resour - /* .start and .end fields are filled dynamically */ - .flags = IORESOURCE_MEM, - }, { -- .start = ATH79_CPU_IRQ_IP2, -- .end = ATH79_CPU_IRQ_IP2, -+ /* .start and .end fields are filled dynamically */ - .flags = IORESOURCE_IRQ, - }, - }; -@@ -53,6 +55,8 @@ static void __init ar913x_wmac_setup(voi - - ath79_wmac_resources[0].start = AR913X_WMAC_BASE; - ath79_wmac_resources[0].end = AR913X_WMAC_BASE + AR913X_WMAC_SIZE - 1; -+ ath79_wmac_resources[1].start = ATH79_CPU_IRQ_IP2; -+ ath79_wmac_resources[1].end = ATH79_CPU_IRQ_IP2; - } - - -@@ -79,6 +83,8 @@ static void __init ar933x_wmac_setup(voi - - ath79_wmac_resources[0].start = AR933X_WMAC_BASE; - ath79_wmac_resources[0].end = AR933X_WMAC_BASE + AR933X_WMAC_SIZE - 1; -+ ath79_wmac_resources[1].start = ATH79_CPU_IRQ_IP2; -+ ath79_wmac_resources[1].end = ATH79_CPU_IRQ_IP2; - - t = ath79_reset_rr(AR933X_RESET_REG_BOOTSTRAP); - if (t & AR933X_BOOTSTRAP_REF_CLK_40) -@@ -92,12 +98,32 @@ static void __init ar933x_wmac_setup(voi - ath79_wmac_data.external_reset = ar933x_wmac_reset; - } - -+static void ar934x_wmac_setup(void) -+{ -+ u32 t; -+ -+ ath79_wmac_device.name = "ar934x_wmac"; -+ -+ ath79_wmac_resources[0].start = AR934X_WMAC_BASE; -+ ath79_wmac_resources[0].end = AR934X_WMAC_BASE + AR934X_WMAC_SIZE - 1; -+ ath79_wmac_resources[1].start = ATH79_IP2_IRQ(1); -+ ath79_wmac_resources[1].start = ATH79_IP2_IRQ(1); -+ -+ t = ath79_reset_rr(AR934X_RESET_REG_BOOTSTRAP); -+ if (t & AR934X_BOOTSTRAP_REF_CLK_40) -+ ath79_wmac_data.is_clk_25mhz = false; -+ else -+ ath79_wmac_data.is_clk_25mhz = true; -+} -+ - void __init ath79_register_wmac(u8 *cal_data) - { - if (soc_is_ar913x()) - ar913x_wmac_setup(); - else if (soc_is_ar933x()) - ar933x_wmac_setup(); -+ else if (soc_is_ar934x()) -+ ar934x_wmac_setup(); - else - BUG(); - ---- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -@@ -61,6 +61,9 @@ - #define AR933X_EHCI_BASE 0x1b000000 - #define AR933X_EHCI_SIZE 0x1000 - -+#define AR934X_WMAC_BASE (AR71XX_APB_BASE + 0x00100000) -+#define AR934X_WMAC_SIZE 0x20000 -+ - /* - * DDR_CTRL block - */ diff --git a/target/linux/ar71xx/patches-3.3/129-MIPS-ath79-add-PCI_AR724X-Kconfig-symbol.patch b/target/linux/ar71xx/patches-3.3/129-MIPS-ath79-add-PCI_AR724X-Kconfig-symbol.patch deleted file mode 100644 index 27a46e6388..0000000000 --- a/target/linux/ar71xx/patches-3.3/129-MIPS-ath79-add-PCI_AR724X-Kconfig-symbol.patch +++ /dev/null @@ -1,66 +0,0 @@ -From 27a5b2948831f4fd8e66e2e1a98b4c23902728cc Mon Sep 17 00:00:00 2001 -From: Gabor Juhos <juhosg@openwrt.org> -Date: Wed, 14 Mar 2012 10:45:29 +0100 -Subject: [PATCH 34/47] MIPS: ath79: add PCI_AR724X Kconfig symbol - -The AR724X specific PCI code can be used for the -AR934X SoCs, however it can be selected only if -SOC_AR724X is set. - -Introduce a new Kconfig symbol in order to be able -to use the code for AR934X as well. - -Signed-off-by: Gabor Juhos <juhosg@openwrt.org> -Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com> -Cc: linux-mips@linux-mips.org -Cc: mcgrof@infradead.org -Patchwork: https://patchwork.linux-mips.org/patch/3514/ -Signed-off-by: Ralf Baechle <ralf@linux-mips.org> ---- - arch/mips/ath79/Kconfig | 4 ++++ - arch/mips/include/asm/mach-ath79/pci.h | 2 +- - arch/mips/pci/Makefile | 2 +- - 3 files changed, 6 insertions(+), 2 deletions(-) - ---- a/arch/mips/ath79/Kconfig -+++ b/arch/mips/ath79/Kconfig -@@ -59,6 +59,7 @@ config SOC_AR724X - select USB_ARCH_HAS_EHCI - select USB_ARCH_HAS_OHCI - select HW_HAS_PCI -+ select PCI_AR724X if PCI - def_bool n - - config SOC_AR913X -@@ -73,6 +74,9 @@ config SOC_AR934X - select USB_ARCH_HAS_EHCI - def_bool n - -+config PCI_AR724X -+ def_bool n -+ - config ATH79_DEV_GPIO_BUTTONS - def_bool n - ---- a/arch/mips/include/asm/mach-ath79/pci.h -+++ b/arch/mips/include/asm/mach-ath79/pci.h -@@ -19,7 +19,7 @@ int ar71xx_pcibios_init(void); - static inline int ar71xx_pcibios_init(void) { return 0; } - #endif - --#if defined(CONFIG_PCI) && defined(CONFIG_SOC_AR724X) -+#if defined(CONFIG_PCI_AR724X) - int ar724x_pcibios_init(int irq); - #else - static inline int ar724x_pcibios_init(int irq) { return 0; } ---- a/arch/mips/pci/Makefile -+++ b/arch/mips/pci/Makefile -@@ -20,7 +20,7 @@ obj-$(CONFIG_BCM63XX) += pci-bcm63xx.o - ops-bcm63xx.o - obj-$(CONFIG_MIPS_ALCHEMY) += pci-alchemy.o - obj-$(CONFIG_SOC_AR71XX) += pci-ar71xx.o --obj-$(CONFIG_SOC_AR724X) += pci-ar724x.o -+obj-$(CONFIG_PCI_AR724X) += pci-ar724x.o - - # - # These are still pretty much in the old state, watch, go blind. diff --git a/target/linux/ar71xx/patches-3.3/130-MIPS-ath79-add-PCI-registration-code-for-AR934X.patch b/target/linux/ar71xx/patches-3.3/130-MIPS-ath79-add-PCI-registration-code-for-AR934X.patch deleted file mode 100644 index bd9386d8c9..0000000000 --- a/target/linux/ar71xx/patches-3.3/130-MIPS-ath79-add-PCI-registration-code-for-AR934X.patch +++ /dev/null @@ -1,62 +0,0 @@ -From 902b348cdddd4c858993e02aced615aa6caf04d0 Mon Sep 17 00:00:00 2001 -From: Gabor Juhos <juhosg@openwrt.org> -Date: Wed, 14 Mar 2012 10:45:30 +0100 -Subject: [PATCH 35/47] MIPS: ath79: add PCI registration code for AR934X - -Signed-off-by: Gabor Juhos <juhosg@openwrt.org> -Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com> -Cc: linux-mips@linux-mips.org -Cc: mcgrof@infradead.org -Patchwork: https://patchwork.linux-mips.org/patch/3516/ -Signed-off-by: Ralf Baechle <ralf@linux-mips.org> ---- - arch/mips/ath79/Kconfig | 2 ++ - arch/mips/ath79/pci.c | 13 ++++++++++++- - 2 files changed, 14 insertions(+), 1 deletions(-) - ---- a/arch/mips/ath79/Kconfig -+++ b/arch/mips/ath79/Kconfig -@@ -72,6 +72,8 @@ config SOC_AR933X - - config SOC_AR934X - select USB_ARCH_HAS_EHCI -+ select HW_HAS_PCI -+ select PCI_AR724X if PCI - def_bool n - - config PCI_AR724X ---- a/arch/mips/ath79/pci.c -+++ b/arch/mips/ath79/pci.c -@@ -14,6 +14,7 @@ - - #include <linux/init.h> - #include <linux/pci.h> -+#include <asm/mach-ath79/ar71xx_regs.h> - #include <asm/mach-ath79/ath79.h> - #include <asm/mach-ath79/irq.h> - #include <asm/mach-ath79/pci.h> -@@ -57,7 +58,9 @@ int __init pcibios_map_irq(const struct - if (soc_is_ar71xx()) { - ath79_pci_irq_map = ar71xx_pci_irq_map; - ath79_pci_nr_irqs = ARRAY_SIZE(ar71xx_pci_irq_map); -- } else if (soc_is_ar724x()) { -+ } else if (soc_is_ar724x() || -+ soc_is_ar9342() || -+ soc_is_ar9344()) { - ath79_pci_irq_map = ar724x_pci_irq_map; - ath79_pci_nr_irqs = ARRAY_SIZE(ar724x_pci_irq_map); - } else { -@@ -115,5 +118,13 @@ int __init ath79_register_pci(void) - if (soc_is_ar724x()) - return ar724x_pcibios_init(ATH79_CPU_IRQ_IP2); - -+ if (soc_is_ar9342() || soc_is_ar9344()) { -+ u32 bootstrap; -+ -+ bootstrap = ath79_reset_rr(AR934X_RESET_REG_BOOTSTRAP); -+ if (bootstrap & AR934X_BOOTSTRAP_PCIE_RC) -+ return ar724x_pcibios_init(ATH79_IP2_IRQ(0)); -+ } -+ - return -ENODEV; - } diff --git a/target/linux/ar71xx/patches-3.3/131-MIPS-ath79-add-initial-support-for-the-Atheros-DB120.patch b/target/linux/ar71xx/patches-3.3/131-MIPS-ath79-add-initial-support-for-the-Atheros-DB120.patch deleted file mode 100644 index 30c2c1b187..0000000000 --- a/target/linux/ar71xx/patches-3.3/131-MIPS-ath79-add-initial-support-for-the-Atheros-DB120.patch +++ /dev/null @@ -1,196 +0,0 @@ -From 4921cb7d9f6997b6f7aefd37c7cfd50324e8fd75 Mon Sep 17 00:00:00 2001 -From: Gabor Juhos <juhosg@openwrt.org> -Date: Wed, 14 Mar 2012 20:39:35 +0100 -Subject: [PATCH 36/47] MIPS: ath79: add initial support for the Atheros DB120 board - -Signed-off-by: Gabor Juhos <juhosg@openwrt.org> -Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com> -Cc: linux-mips@linux-mips.org -Cc: mcgrof@infradead.org -Patchwork: https://patchwork.linux-mips.org/patch/3517/ -Signed-off-by: Ralf Baechle <ralf@linux-mips.org> ---- - arch/mips/ath79/Kconfig | 12 ++++ - arch/mips/ath79/Makefile | 1 + - arch/mips/ath79/mach-db120.c | 134 ++++++++++++++++++++++++++++++++++++++++++ - arch/mips/ath79/machtypes.h | 1 + - 4 files changed, 148 insertions(+), 0 deletions(-) - create mode 100644 arch/mips/ath79/mach-db120.c - ---- a/arch/mips/ath79/Kconfig -+++ b/arch/mips/ath79/Kconfig -@@ -26,6 +26,18 @@ config ATH79_MACH_AP81 - Say 'Y' here if you want your kernel to support the - Atheros AP81 reference board. - -+config ATH79_MACH_DB120 -+ bool "Atheros DB120 reference board" -+ select SOC_AR934X -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_SPI -+ select ATH79_DEV_USB -+ select ATH79_DEV_WMAC -+ help -+ Say 'Y' here if you want your kernel to support the -+ Atheros DB120 reference board. -+ - config ATH79_MACH_PB44 - bool "Atheros PB44 reference board" - select SOC_AR71XX ---- a/arch/mips/ath79/Makefile -+++ b/arch/mips/ath79/Makefile -@@ -28,5 +28,6 @@ obj-$(CONFIG_ATH79_DEV_WMAC) += dev-wma - # - obj-$(CONFIG_ATH79_MACH_AP121) += mach-ap121.o - obj-$(CONFIG_ATH79_MACH_AP81) += mach-ap81.o -+obj-$(CONFIG_ATH79_MACH_DB120) += mach-db120.o - obj-$(CONFIG_ATH79_MACH_PB44) += mach-pb44.o - obj-$(CONFIG_ATH79_MACH_UBNT_XM) += mach-ubnt-xm.o ---- /dev/null -+++ b/arch/mips/ath79/mach-db120.c -@@ -0,0 +1,134 @@ -+/* -+ * Atheros DB120 reference board support -+ * -+ * Copyright (c) 2011 Qualcomm Atheros -+ * Copyright (c) 2011 Gabor Juhos <juhosg@openwrt.org> -+ * -+ * Permission to use, copy, modify, and/or distribute this software for any -+ * purpose with or without fee is hereby granted, provided that the above -+ * copyright notice and this permission notice appear in all copies. -+ * -+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES -+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF -+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR -+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES -+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN -+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF -+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. -+ * -+ */ -+ -+#include <linux/pci.h> -+#include <linux/ath9k_platform.h> -+ -+#include "machtypes.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-spi.h" -+#include "dev-wmac.h" -+#include "pci.h" -+ -+#define DB120_GPIO_LED_WLAN_5G 12 -+#define DB120_GPIO_LED_WLAN_2G 13 -+#define DB120_GPIO_LED_STATUS 14 -+#define DB120_GPIO_LED_WPS 15 -+ -+#define DB120_GPIO_BTN_WPS 16 -+ -+#define DB120_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define DB120_KEYS_DEBOUNCE_INTERVAL (3 * DB120_KEYS_POLL_INTERVAL) -+ -+#define DB120_WMAC_CALDATA_OFFSET 0x1000 -+#define DB120_PCIE_CALDATA_OFFSET 0x5000 -+ -+static struct gpio_led db120_leds_gpio[] __initdata = { -+ { -+ .name = "db120:green:status", -+ .gpio = DB120_GPIO_LED_STATUS, -+ .active_low = 1, -+ }, -+ { -+ .name = "db120:green:wps", -+ .gpio = DB120_GPIO_LED_WPS, -+ .active_low = 1, -+ }, -+ { -+ .name = "db120:green:wlan-5g", -+ .gpio = DB120_GPIO_LED_WLAN_5G, -+ .active_low = 1, -+ }, -+ { -+ .name = "db120:green:wlan-2g", -+ .gpio = DB120_GPIO_LED_WLAN_2G, -+ .active_low = 1, -+ }, -+}; -+ -+static struct gpio_keys_button db120_gpio_keys[] __initdata = { -+ { -+ .desc = "WPS button", -+ .type = EV_KEY, -+ .code = KEY_WPS_BUTTON, -+ .debounce_interval = DB120_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = DB120_GPIO_BTN_WPS, -+ .active_low = 1, -+ }, -+}; -+ -+static struct spi_board_info db120_spi_info[] = { -+ { -+ .bus_num = 0, -+ .chip_select = 0, -+ .max_speed_hz = 25000000, -+ .modalias = "s25sl064a", -+ } -+}; -+ -+static struct ath79_spi_platform_data db120_spi_data = { -+ .bus_num = 0, -+ .num_chipselect = 1, -+}; -+ -+#ifdef CONFIG_PCI -+static struct ath9k_platform_data db120_ath9k_data; -+ -+static int db120_pci_plat_dev_init(struct pci_dev *dev) -+{ -+ switch (PCI_SLOT(dev->devfn)) { -+ case 0: -+ dev->dev.platform_data = &db120_ath9k_data; -+ break; -+ } -+ -+ return 0; -+} -+ -+static void __init db120_pci_init(u8 *eeprom) -+{ -+ memcpy(db120_ath9k_data.eeprom_data, eeprom, -+ sizeof(db120_ath9k_data.eeprom_data)); -+ -+ ath79_pci_set_plat_dev_init(db120_pci_plat_dev_init); -+ ath79_register_pci(); -+} -+#else -+static inline void db120_pci_init(void) {} -+#endif /* CONFIG_PCI */ -+ -+static void __init db120_setup(void) -+{ -+ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(db120_leds_gpio), -+ db120_leds_gpio); -+ ath79_register_gpio_keys_polled(-1, DB120_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(db120_gpio_keys), -+ db120_gpio_keys); -+ ath79_register_spi(&db120_spi_data, db120_spi_info, -+ ARRAY_SIZE(db120_spi_info)); -+ ath79_register_wmac(art + DB120_WMAC_CALDATA_OFFSET); -+ db120_pci_init(art + DB120_PCIE_CALDATA_OFFSET); -+} -+ -+MIPS_MACHINE(ATH79_MACH_DB120, "DB120", "Atheros DB120 reference board", -+ db120_setup); ---- a/arch/mips/ath79/machtypes.h -+++ b/arch/mips/ath79/machtypes.h -@@ -18,6 +18,7 @@ enum ath79_mach_type { - ATH79_MACH_GENERIC = 0, - ATH79_MACH_AP121, /* Atheros AP121 reference board */ - ATH79_MACH_AP81, /* Atheros AP81 reference board */ -+ ATH79_MACH_DB120, /* Atheros DB120 reference board */ - ATH79_MACH_PB44, /* Atheros PB44 reference board */ - ATH79_MACH_UBNT_XM, /* Ubiquiti Networks XM board rev 1.0 */ - }; diff --git a/target/linux/ar71xx/patches-3.3/132-MIPS-ath79-use-correct-IRQ-number-for-the-OHCI-contr.patch b/target/linux/ar71xx/patches-3.3/132-MIPS-ath79-use-correct-IRQ-number-for-the-OHCI-contr.patch deleted file mode 100644 index 07ddb512d6..0000000000 --- a/target/linux/ar71xx/patches-3.3/132-MIPS-ath79-use-correct-IRQ-number-for-the-OHCI-contr.patch +++ /dev/null @@ -1,37 +0,0 @@ -From fe0cc1327ddfb69b171102019a8148a9c8b352b8 Mon Sep 17 00:00:00 2001 -From: Gabor Juhos <juhosg@openwrt.org> -Date: Wed, 28 Mar 2012 11:00:19 +0200 -Subject: [PATCH 37/47] MIPS: ath79: use correct IRQ number for the OHCI controller on AR7240 - -The currently assigned IRQ number to the OHCI -controller is incorrect for the AR7240 SoC, and -that leads to the following error message from -the OHCI driver: - -ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver -ath79-ohci ath79-ohci: Atheros built-in OHCI controller -ath79-ohci ath79-ohci: new USB bus registered, assigned bus number 1 -ath79-ohci ath79-ohci: irq 14, io mem 0x1b000000 -hub 1-0:1.0: USB hub found -hub 1-0:1.0: 1 port detected -usb 1-1: new full-speed USB device number 2 using ath79-ohci -ath79-ohci ath79-ohci: Unlink after no-IRQ? Controller is probably using the wrong IRQ. - -Fix this by using the correct IRQ number. - -Signed-off-by: Gabor Juhos <juhosg@openwrt.org> ---- - arch/mips/ath79/dev-usb.c | 2 ++ - 1 files changed, 2 insertions(+), 0 deletions(-) - ---- a/arch/mips/ath79/dev-usb.c -+++ b/arch/mips/ath79/dev-usb.c -@@ -145,6 +145,8 @@ static void __init ar7240_usb_setup(void - - ath79_ohci_resources[0].start = AR7240_OHCI_BASE; - ath79_ohci_resources[0].end = AR7240_OHCI_BASE + AR7240_OHCI_SIZE - 1; -+ ath79_ohci_resources[1].start = ATH79_CPU_IRQ_USB; -+ ath79_ohci_resources[1].end = ATH79_CPU_IRQ_USB; - platform_device_register(&ath79_ohci_device); - } - diff --git a/target/linux/ar71xx/patches-3.3/133-MIPS-ath79-use-a-helper-function-for-USB-resource-in.patch b/target/linux/ar71xx/patches-3.3/133-MIPS-ath79-use-a-helper-function-for-USB-resource-in.patch deleted file mode 100644 index 0def09f130..0000000000 --- a/target/linux/ar71xx/patches-3.3/133-MIPS-ath79-use-a-helper-function-for-USB-resource-in.patch +++ /dev/null @@ -1,140 +0,0 @@ -From 30b15d9a4b05e38ae19e340b63e1a2bca917d557 Mon Sep 17 00:00:00 2001 -From: Gabor Juhos <juhosg@openwrt.org> -Date: Wed, 28 Mar 2012 14:15:23 +0200 -Subject: [PATCH 38/47] MIPS: ath79: use a helper function for USB resource initialization - -This improves code readability, and ensures that -all resource fields will be initialized correctly. -Additionally, it helps to reduce the size of the -kernel image by using uninitialized resource -variables. - -Signed-off-by: Gabor Juhos <juhosg@openwrt.org> ---- - arch/mips/ath79/dev-usb.c | 64 +++++++++++++++++++------------------------- - 1 files changed, 28 insertions(+), 36 deletions(-) - ---- a/arch/mips/ath79/dev-usb.c -+++ b/arch/mips/ath79/dev-usb.c -@@ -25,17 +25,7 @@ - #include "common.h" - #include "dev-usb.h" - --static struct resource ath79_ohci_resources[] = { -- [0] = { -- /* .start and .end fields are filled dynamically */ -- .flags = IORESOURCE_MEM, -- }, -- [1] = { -- .start = ATH79_MISC_IRQ_OHCI, -- .end = ATH79_MISC_IRQ_OHCI, -- .flags = IORESOURCE_IRQ, -- }, --}; -+static struct resource ath79_ohci_resources[2]; - - static u64 ath79_ohci_dmamask = DMA_BIT_MASK(32); - -@@ -54,17 +44,7 @@ static struct platform_device ath79_ohci - }, - }; - --static struct resource ath79_ehci_resources[] = { -- [0] = { -- /* .start and .end fields are filled dynamically */ -- .flags = IORESOURCE_MEM, -- }, -- [1] = { -- .start = ATH79_CPU_IRQ_USB, -- .end = ATH79_CPU_IRQ_USB, -- .flags = IORESOURCE_IRQ, -- }, --}; -+static struct resource ath79_ehci_resources[2]; - - static u64 ath79_ehci_dmamask = DMA_BIT_MASK(32); - -@@ -90,6 +70,20 @@ static struct platform_device ath79_ehci - }, - }; - -+static void __init ath79_usb_init_resource(struct resource res[2], -+ unsigned long base, -+ unsigned long size, -+ int irq) -+{ -+ res[0].flags = IORESOURCE_MEM; -+ res[0].start = base; -+ res[0].end = base + size - 1; -+ -+ res[1].flags = IORESOURCE_IRQ; -+ res[1].start = irq; -+ res[1].end = irq; -+} -+ - #define AR71XX_USB_RESET_MASK (AR71XX_RESET_USB_HOST | \ - AR71XX_RESET_USB_PHY | \ - AR71XX_RESET_USB_OHCI_DLL) -@@ -114,12 +108,12 @@ static void __init ath79_usb_setup(void) - - mdelay(900); - -- ath79_ohci_resources[0].start = AR71XX_OHCI_BASE; -- ath79_ohci_resources[0].end = AR71XX_OHCI_BASE + AR71XX_OHCI_SIZE - 1; -+ ath79_usb_init_resource(ath79_ohci_resources, AR71XX_OHCI_BASE, -+ AR71XX_OHCI_SIZE, ATH79_MISC_IRQ_OHCI); - platform_device_register(&ath79_ohci_device); - -- ath79_ehci_resources[0].start = AR71XX_EHCI_BASE; -- ath79_ehci_resources[0].end = AR71XX_EHCI_BASE + AR71XX_EHCI_SIZE - 1; -+ ath79_usb_init_resource(ath79_ehci_resources, AR71XX_EHCI_BASE, -+ AR71XX_EHCI_SIZE, ATH79_CPU_IRQ_USB); - ath79_ehci_device.dev.platform_data = &ath79_ehci_pdata_v1; - platform_device_register(&ath79_ehci_device); - } -@@ -143,10 +137,8 @@ static void __init ar7240_usb_setup(void - - iounmap(usb_ctrl_base); - -- ath79_ohci_resources[0].start = AR7240_OHCI_BASE; -- ath79_ohci_resources[0].end = AR7240_OHCI_BASE + AR7240_OHCI_SIZE - 1; -- ath79_ohci_resources[1].start = ATH79_CPU_IRQ_USB; -- ath79_ohci_resources[1].end = ATH79_CPU_IRQ_USB; -+ ath79_usb_init_resource(ath79_ohci_resources, AR7240_OHCI_BASE, -+ AR7240_OHCI_SIZE, ATH79_CPU_IRQ_USB); - platform_device_register(&ath79_ohci_device); - } - -@@ -161,8 +153,8 @@ static void __init ar724x_usb_setup(void - ath79_device_reset_clear(AR724X_RESET_USB_PHY); - mdelay(10); - -- ath79_ehci_resources[0].start = AR724X_EHCI_BASE; -- ath79_ehci_resources[0].end = AR724X_EHCI_BASE + AR724X_EHCI_SIZE - 1; -+ ath79_usb_init_resource(ath79_ehci_resources, AR724X_EHCI_BASE, -+ AR724X_EHCI_SIZE, ATH79_CPU_IRQ_USB); - ath79_ehci_device.dev.platform_data = &ath79_ehci_pdata_v2; - platform_device_register(&ath79_ehci_device); - } -@@ -178,8 +170,8 @@ static void __init ar913x_usb_setup(void - ath79_device_reset_clear(AR913X_RESET_USB_PHY); - mdelay(10); - -- ath79_ehci_resources[0].start = AR913X_EHCI_BASE; -- ath79_ehci_resources[0].end = AR913X_EHCI_BASE + AR913X_EHCI_SIZE - 1; -+ ath79_usb_init_resource(ath79_ehci_resources, AR913X_EHCI_BASE, -+ AR913X_EHCI_SIZE, ATH79_CPU_IRQ_USB); - ath79_ehci_device.dev.platform_data = &ath79_ehci_pdata_v2; - platform_device_register(&ath79_ehci_device); - } -@@ -195,8 +187,8 @@ static void __init ar933x_usb_setup(void - ath79_device_reset_clear(AR933X_RESET_USB_PHY); - mdelay(10); - -- ath79_ehci_resources[0].start = AR933X_EHCI_BASE; -- ath79_ehci_resources[0].end = AR933X_EHCI_BASE + AR933X_EHCI_SIZE - 1; -+ ath79_usb_init_resource(ath79_ehci_resources, AR933X_EHCI_BASE, -+ AR933X_EHCI_SIZE, ATH79_CPU_IRQ_USB); - ath79_ehci_device.dev.platform_data = &ath79_ehci_pdata_v2; - platform_device_register(&ath79_ehci_device); - } diff --git a/target/linux/ar71xx/patches-3.3/134-MIPS-ath79-add-USB-platform-setup-code-for-AR934X.patch b/target/linux/ar71xx/patches-3.3/134-MIPS-ath79-add-USB-platform-setup-code-for-AR934X.patch deleted file mode 100644 index c77de28038..0000000000 --- a/target/linux/ar71xx/patches-3.3/134-MIPS-ath79-add-USB-platform-setup-code-for-AR934X.patch +++ /dev/null @@ -1,78 +0,0 @@ -From 635d5a2ac8aa483c3a0635c60bff8ea8978ff6a7 Mon Sep 17 00:00:00 2001 -From: Gabor Juhos <juhosg@openwrt.org> -Date: Sun, 11 Dec 2011 18:34:13 +0100 -Subject: [PATCH 39/47] MIPS: ath79: add USB platform setup code for AR934X - -Signed-off-by: Gabor Juhos <juhosg@openwrt.org> ---- - arch/mips/ath79/dev-usb.c | 28 ++++++++++++++++++++++++ - arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 7 ++++++ - 2 files changed, 35 insertions(+), 0 deletions(-) - ---- a/arch/mips/ath79/dev-usb.c -+++ b/arch/mips/ath79/dev-usb.c -@@ -193,6 +193,32 @@ static void __init ar933x_usb_setup(void - platform_device_register(&ath79_ehci_device); - } - -+static void __init ar934x_usb_setup(void) -+{ -+ u32 bootstrap; -+ -+ bootstrap = ath79_reset_rr(AR934X_RESET_REG_BOOTSTRAP); -+ if (bootstrap & AR934X_BOOTSTRAP_USB_MODE_DEVICE) -+ return; -+ -+ ath79_device_reset_set(AR934X_RESET_USBSUS_OVERRIDE); -+ udelay(1000); -+ -+ ath79_device_reset_clear(AR934X_RESET_USB_PHY); -+ udelay(1000); -+ -+ ath79_device_reset_clear(AR934X_RESET_USB_PHY_ANALOG); -+ udelay(1000); -+ -+ ath79_device_reset_clear(AR934X_RESET_USB_HOST); -+ udelay(1000); -+ -+ ath79_usb_init_resource(ath79_ehci_resources, AR934X_EHCI_BASE, -+ AR934X_EHCI_SIZE, ATH79_CPU_IRQ_USB); -+ ath79_ehci_device.dev.platform_data = &ath79_ehci_pdata_v2; -+ platform_device_register(&ath79_ehci_device); -+} -+ - void __init ath79_register_usb(void) - { - if (soc_is_ar71xx()) -@@ -205,6 +231,8 @@ void __init ath79_register_usb(void) - ar913x_usb_setup(); - else if (soc_is_ar933x()) - ar933x_usb_setup(); -+ else if (soc_is_ar934x()) -+ ar934x_usb_setup(); - else - BUG(); - } ---- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -@@ -63,6 +63,8 @@ - - #define AR934X_WMAC_BASE (AR71XX_APB_BASE + 0x00100000) - #define AR934X_WMAC_SIZE 0x20000 -+#define AR934X_EHCI_BASE 0x1b000000 -+#define AR934X_EHCI_SIZE 0x200 - - /* - * DDR_CTRL block -@@ -288,6 +290,11 @@ - #define AR933X_RESET_USB_PHY BIT(4) - #define AR933X_RESET_USBSUS_OVERRIDE BIT(3) - -+#define AR934X_RESET_USB_PHY_ANALOG BIT(11) -+#define AR934X_RESET_USB_HOST BIT(5) -+#define AR934X_RESET_USB_PHY BIT(4) -+#define AR934X_RESET_USBSUS_OVERRIDE BIT(3) -+ - #define AR933X_BOOTSTRAP_REF_CLK_40 BIT(0) - - #define AR934X_BOOTSTRAP_SW_OPTION8 BIT(23) diff --git a/target/linux/ar71xx/patches-3.3/135-MIPS-ath79-register-USB-host-controller-on-the-DB120.patch b/target/linux/ar71xx/patches-3.3/135-MIPS-ath79-register-USB-host-controller-on-the-DB120.patch deleted file mode 100644 index e82da3daac..0000000000 --- a/target/linux/ar71xx/patches-3.3/135-MIPS-ath79-register-USB-host-controller-on-the-DB120.patch +++ /dev/null @@ -1,28 +0,0 @@ -From 932c1688e960bff170f1fc8072b3d3e958407a60 Mon Sep 17 00:00:00 2001 -From: Gabor Juhos <juhosg@openwrt.org> -Date: Tue, 13 Mar 2012 13:51:09 +0100 -Subject: [PATCH 40/47] MIPS: ath79: register USB host controller on the DB120 board - -Signed-off-by: Gabor Juhos <juhosg@openwrt.org> ---- - arch/mips/ath79/mach-db120.c | 2 ++ - 1 files changed, 2 insertions(+), 0 deletions(-) - ---- a/arch/mips/ath79/mach-db120.c -+++ b/arch/mips/ath79/mach-db120.c -@@ -25,6 +25,7 @@ - #include "dev-gpio-buttons.h" - #include "dev-leds-gpio.h" - #include "dev-spi.h" -+#include "dev-usb.h" - #include "dev-wmac.h" - #include "pci.h" - -@@ -126,6 +127,7 @@ static void __init db120_setup(void) - db120_gpio_keys); - ath79_register_spi(&db120_spi_data, db120_spi_info, - ARRAY_SIZE(db120_spi_info)); -+ ath79_register_usb(); - ath79_register_wmac(art + DB120_WMAC_CALDATA_OFFSET); - db120_pci_init(art + DB120_PCIE_CALDATA_OFFSET); - } diff --git a/target/linux/ar71xx/patches-3.3/136-MIPS-ath79-use-correct-fractional-dividers-for-CPU-D.patch b/target/linux/ar71xx/patches-3.3/136-MIPS-ath79-use-correct-fractional-dividers-for-CPU-D.patch deleted file mode 100644 index cb6aa3221d..0000000000 --- a/target/linux/ar71xx/patches-3.3/136-MIPS-ath79-use-correct-fractional-dividers-for-CPU-D.patch +++ /dev/null @@ -1,49 +0,0 @@ -From 7328ff547389ee0b455cbf98bdfc819731d9f7b9 Mon Sep 17 00:00:00 2001 -From: Gabor Juhos <juhosg@openwrt.org> -Date: Fri, 31 Aug 2012 14:22:35 +0200 -Subject: [PATCH] MIPS: ath79: use correct fractional dividers for - {CPU,DDR}_PLL on AR934x - -The current dividers in the code are wrong and this -leads to broken CPU frequency calculation on boards -where the fractional part is used. - -For example, if the SoC is running from a 40MHz -reference clock, refdiv=1, nint=14, outdiv=0 and -nfrac=31 the real frequency is 579.375MHz but the -current code calculates 569.687MHz instead. - -Because the system time is indirectly related to -the CPU frequency the broken computation causes -drift in the system time. - -The correct divider is 2^6 for the CPU PLL and 2^10 -for the DDR PLL. Use the correct values to fix the -issue. - -Cc: <stable@vger.kernel.org> [3.5+] -Signed-off-by: Gabor Juhos <juhosg@openwrt.org> ---- - arch/mips/ath79/clock.c | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - ---- a/arch/mips/ath79/clock.c -+++ b/arch/mips/ath79/clock.c -@@ -189,7 +189,7 @@ static void __init ar934x_clocks_init(vo - AR934X_PLL_CPU_CONFIG_NFRAC_MASK; - - cpu_pll = nint * ath79_ref_clk.rate / ref_div; -- cpu_pll += frac * ath79_ref_clk.rate / (ref_div * (2 << 6)); -+ cpu_pll += frac * ath79_ref_clk.rate / (ref_div * (1 << 6)); - cpu_pll /= (1 << out_div); - - pll = ath79_pll_rr(AR934X_PLL_DDR_CONFIG_REG); -@@ -203,7 +203,7 @@ static void __init ar934x_clocks_init(vo - AR934X_PLL_DDR_CONFIG_NFRAC_MASK; - - ddr_pll = nint * ath79_ref_clk.rate / ref_div; -- ddr_pll += frac * ath79_ref_clk.rate / (ref_div * (2 << 10)); -+ ddr_pll += frac * ath79_ref_clk.rate / (ref_div * (1 << 10)); - ddr_pll /= (1 << out_div); - - clk_ctrl = ath79_pll_rr(AR934X_PLL_CPU_DDR_CLK_CTRL_REG); diff --git a/target/linux/ar71xx/patches-3.3/137-MIPS-ath79-fix-CPU-DDR-frequency-calculation-for-SRI.patch b/target/linux/ar71xx/patches-3.3/137-MIPS-ath79-fix-CPU-DDR-frequency-calculation-for-SRI.patch deleted file mode 100644 index a2fa4db56c..0000000000 --- a/target/linux/ar71xx/patches-3.3/137-MIPS-ath79-fix-CPU-DDR-frequency-calculation-for-SRI.patch +++ /dev/null @@ -1,205 +0,0 @@ -From 3f735e202d5099a5b7c621443bea365b87b0e3bb Mon Sep 17 00:00:00 2001 -From: Gabor Juhos <juhosg@openwrt.org> -Date: Sat, 8 Sep 2012 12:12:50 +0200 -Subject: [PATCH] MIPS: ath79: fix CPU/DDR frequency calculation for SRIF PLLs - -Besides the CPU and DDR PLLs, the CPU and DDR frequencies -can be derived from other PLLs in the SRIF block on the -AR934x SoCs. The current code does not checks if the SRIF -PLLs are used and this can lead to incorrectly calculated -CPU/DDR frequencies. - -Fix it by calculating the frequencies from SRIF PLLs if -those are used on a given board. - -Cc: <stable@vger.kernel.org> -Signed-off-by: Gabor Juhos <juhosg@openwrt.org> ---- -This depends on the following patch: -'MIPS: ath79: use correct fractional dividers for {CPU,DDR}_PLL on AR934x' -https://patchwork.linux-mips.org/patch/4305/ - - arch/mips/ath79/clock.c | 109 ++++++++++++++++++------ - arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 23 +++++ - 2 files changed, 104 insertions(+), 28 deletions(-) - ---- a/arch/mips/ath79/clock.c -+++ b/arch/mips/ath79/clock.c -@@ -17,6 +17,8 @@ - #include <linux/err.h> - #include <linux/clk.h> - -+#include <asm/div64.h> -+ - #include <asm/mach-ath79/ath79.h> - #include <asm/mach-ath79/ar71xx_regs.h> - #include "common.h" -@@ -166,11 +168,34 @@ static void __init ar933x_clocks_init(vo - ath79_uart_clk.rate = ath79_ref_clk.rate; - } - -+static u32 __init ar934x_get_pll_freq(u32 ref, u32 ref_div, u32 nint, u32 nfrac, -+ u32 frac, u32 out_div) -+{ -+ u64 t; -+ u32 ret; -+ -+ t = ath79_ref_clk.rate; -+ t *= nint; -+ do_div(t, ref_div); -+ ret = t; -+ -+ t = ath79_ref_clk.rate; -+ t *= nfrac; -+ do_div(t, ref_div * frac); -+ ret += t; -+ -+ ret /= (1 << out_div); -+ return ret; -+} -+ - static void __init ar934x_clocks_init(void) - { -- u32 pll, out_div, ref_div, nint, frac, clk_ctrl, postdiv; -+ u32 pll, out_div, ref_div, nint, nfrac, frac, clk_ctrl, postdiv; - u32 cpu_pll, ddr_pll; - u32 bootstrap; -+ void __iomem *dpll_base; -+ -+ dpll_base = ioremap(AR934X_SRIF_BASE, AR934X_SRIF_SIZE); - - bootstrap = ath79_reset_rr(AR934X_RESET_REG_BOOTSTRAP); - if (bootstrap & AR934X_BOOTSTRAP_REF_CLK_40) -@@ -178,33 +203,59 @@ static void __init ar934x_clocks_init(vo - else - ath79_ref_clk.rate = 25 * 1000 * 1000; - -- pll = ath79_pll_rr(AR934X_PLL_CPU_CONFIG_REG); -- out_div = (pll >> AR934X_PLL_CPU_CONFIG_OUTDIV_SHIFT) & -- AR934X_PLL_CPU_CONFIG_OUTDIV_MASK; -- ref_div = (pll >> AR934X_PLL_CPU_CONFIG_REFDIV_SHIFT) & -- AR934X_PLL_CPU_CONFIG_REFDIV_MASK; -- nint = (pll >> AR934X_PLL_CPU_CONFIG_NINT_SHIFT) & -- AR934X_PLL_CPU_CONFIG_NINT_MASK; -- frac = (pll >> AR934X_PLL_CPU_CONFIG_NFRAC_SHIFT) & -- AR934X_PLL_CPU_CONFIG_NFRAC_MASK; -- -- cpu_pll = nint * ath79_ref_clk.rate / ref_div; -- cpu_pll += frac * ath79_ref_clk.rate / (ref_div * (1 << 6)); -- cpu_pll /= (1 << out_div); -- -- pll = ath79_pll_rr(AR934X_PLL_DDR_CONFIG_REG); -- out_div = (pll >> AR934X_PLL_DDR_CONFIG_OUTDIV_SHIFT) & -- AR934X_PLL_DDR_CONFIG_OUTDIV_MASK; -- ref_div = (pll >> AR934X_PLL_DDR_CONFIG_REFDIV_SHIFT) & -- AR934X_PLL_DDR_CONFIG_REFDIV_MASK; -- nint = (pll >> AR934X_PLL_DDR_CONFIG_NINT_SHIFT) & -- AR934X_PLL_DDR_CONFIG_NINT_MASK; -- frac = (pll >> AR934X_PLL_DDR_CONFIG_NFRAC_SHIFT) & -- AR934X_PLL_DDR_CONFIG_NFRAC_MASK; -- -- ddr_pll = nint * ath79_ref_clk.rate / ref_div; -- ddr_pll += frac * ath79_ref_clk.rate / (ref_div * (1 << 10)); -- ddr_pll /= (1 << out_div); -+ pll = __raw_readl(dpll_base + AR934X_SRIF_CPU_DPLL2_REG); -+ if (pll & AR934X_SRIF_DPLL2_LOCAL_PLL) { -+ out_div = (pll >> AR934X_SRIF_DPLL2_OUTDIV_SHIFT) & -+ AR934X_SRIF_DPLL2_OUTDIV_MASK; -+ pll = __raw_readl(dpll_base + AR934X_SRIF_CPU_DPLL1_REG); -+ nint = (pll >> AR934X_SRIF_DPLL1_NINT_SHIFT) & -+ AR934X_SRIF_DPLL1_NINT_MASK; -+ nfrac = pll & AR934X_SRIF_DPLL1_NFRAC_MASK; -+ ref_div = (pll >> AR934X_SRIF_DPLL1_REFDIV_SHIFT) & -+ AR934X_SRIF_DPLL1_REFDIV_MASK; -+ frac = 1 << 18; -+ } else { -+ pll = ath79_pll_rr(AR934X_PLL_CPU_CONFIG_REG); -+ out_div = (pll >> AR934X_PLL_CPU_CONFIG_OUTDIV_SHIFT) & -+ AR934X_PLL_CPU_CONFIG_OUTDIV_MASK; -+ ref_div = (pll >> AR934X_PLL_CPU_CONFIG_REFDIV_SHIFT) & -+ AR934X_PLL_CPU_CONFIG_REFDIV_MASK; -+ nint = (pll >> AR934X_PLL_CPU_CONFIG_NINT_SHIFT) & -+ AR934X_PLL_CPU_CONFIG_NINT_MASK; -+ nfrac = (pll >> AR934X_PLL_CPU_CONFIG_NFRAC_SHIFT) & -+ AR934X_PLL_CPU_CONFIG_NFRAC_MASK; -+ frac = 1 << 6; -+ } -+ -+ cpu_pll = ar934x_get_pll_freq(ath79_ref_clk.rate, ref_div, nint, -+ nfrac, frac, out_div); -+ -+ pll = __raw_readl(dpll_base + AR934X_SRIF_DDR_DPLL2_REG); -+ if (pll & AR934X_SRIF_DPLL2_LOCAL_PLL) { -+ out_div = (pll >> AR934X_SRIF_DPLL2_OUTDIV_SHIFT) & -+ AR934X_SRIF_DPLL2_OUTDIV_MASK; -+ pll = __raw_readl(dpll_base + AR934X_SRIF_DDR_DPLL1_REG); -+ nint = (pll >> AR934X_SRIF_DPLL1_NINT_SHIFT) & -+ AR934X_SRIF_DPLL1_NINT_MASK; -+ nfrac = pll & AR934X_SRIF_DPLL1_NFRAC_MASK; -+ ref_div = (pll >> AR934X_SRIF_DPLL1_REFDIV_SHIFT) & -+ AR934X_SRIF_DPLL1_REFDIV_MASK; -+ frac = 1 << 18; -+ } else { -+ pll = ath79_pll_rr(AR934X_PLL_DDR_CONFIG_REG); -+ out_div = (pll >> AR934X_PLL_DDR_CONFIG_OUTDIV_SHIFT) & -+ AR934X_PLL_DDR_CONFIG_OUTDIV_MASK; -+ ref_div = (pll >> AR934X_PLL_DDR_CONFIG_REFDIV_SHIFT) & -+ AR934X_PLL_DDR_CONFIG_REFDIV_MASK; -+ nint = (pll >> AR934X_PLL_DDR_CONFIG_NINT_SHIFT) & -+ AR934X_PLL_DDR_CONFIG_NINT_MASK; -+ nfrac = (pll >> AR934X_PLL_DDR_CONFIG_NFRAC_SHIFT) & -+ AR934X_PLL_DDR_CONFIG_NFRAC_MASK; -+ frac = 1 << 10; -+ } -+ -+ ddr_pll = ar934x_get_pll_freq(ath79_ref_clk.rate, ref_div, nint, -+ nfrac, frac, out_div); - - clk_ctrl = ath79_pll_rr(AR934X_PLL_CPU_DDR_CLK_CTRL_REG); - -@@ -240,6 +291,8 @@ static void __init ar934x_clocks_init(vo - - ath79_wdt_clk.rate = ath79_ref_clk.rate; - ath79_uart_clk.rate = ath79_ref_clk.rate; -+ -+ iounmap(dpll_base); - } - - void __init ath79_clocks_init(void) ---- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -@@ -65,6 +65,8 @@ - #define AR934X_WMAC_SIZE 0x20000 - #define AR934X_EHCI_BASE 0x1b000000 - #define AR934X_EHCI_SIZE 0x200 -+#define AR934X_SRIF_BASE (AR71XX_APB_BASE + 0x00116000) -+#define AR934X_SRIF_SIZE 0x1000 - - /* - * DDR_CTRL block -@@ -405,4 +407,25 @@ - #define AR933X_GPIO_COUNT 30 - #define AR934X_GPIO_COUNT 23 - -+/* -+ * SRIF block -+ */ -+#define AR934X_SRIF_CPU_DPLL1_REG 0x1c0 -+#define AR934X_SRIF_CPU_DPLL2_REG 0x1c4 -+#define AR934X_SRIF_CPU_DPLL3_REG 0x1c8 -+ -+#define AR934X_SRIF_DDR_DPLL1_REG 0x240 -+#define AR934X_SRIF_DDR_DPLL2_REG 0x244 -+#define AR934X_SRIF_DDR_DPLL3_REG 0x248 -+ -+#define AR934X_SRIF_DPLL1_REFDIV_SHIFT 27 -+#define AR934X_SRIF_DPLL1_REFDIV_MASK 0x1f -+#define AR934X_SRIF_DPLL1_NINT_SHIFT 18 -+#define AR934X_SRIF_DPLL1_NINT_MASK 0x1ff -+#define AR934X_SRIF_DPLL1_NFRAC_MASK 0x0003ffff -+ -+#define AR934X_SRIF_DPLL2_LOCAL_PLL BIT(30) -+#define AR934X_SRIF_DPLL2_OUTDIV_SHIFT 13 -+#define AR934X_SRIF_DPLL2_OUTDIV_MASK 0x7 -+ - #endif /* __ASM_MACH_AR71XX_REGS_H */ diff --git a/target/linux/ar71xx/patches-3.3/140-MIPS-pci-ar724x-avoid-data-bus-error-due-to-a-missin.patch b/target/linux/ar71xx/patches-3.3/140-MIPS-pci-ar724x-avoid-data-bus-error-due-to-a-missin.patch deleted file mode 100644 index a05b1e7a92..0000000000 --- a/target/linux/ar71xx/patches-3.3/140-MIPS-pci-ar724x-avoid-data-bus-error-due-to-a-missin.patch +++ /dev/null @@ -1,78 +0,0 @@ -From 9cfa64ddaba49975b420ce5e5020efc3301061ac Mon Sep 17 00:00:00 2001 -From: Gabor Juhos <juhosg@openwrt.org> -Date: Tue, 26 Jun 2012 10:19:46 +0200 -Subject: [PATCH 01/34] MIPS: pci-ar724x: avoid data bus error due to a missing PCIe module - -If the controller has no PCIe module attached, -accessing of the device configuration space -causes a data bus error. Avoid this by checking -the status of the PCIe link in advance, and -indicate an error if the link is down. - -Signed-off-by: Gabor Juhos <juhosg@openwrt.org> ---- - arch/mips/pci/pci-ar724x.c | 22 ++++++++++++++++++++++ - 1 files changed, 22 insertions(+), 0 deletions(-) - ---- a/arch/mips/pci/pci-ar724x.c -+++ b/arch/mips/pci/pci-ar724x.c -@@ -23,9 +23,12 @@ - #define AR724X_PCI_MEM_BASE 0x10000000 - #define AR724X_PCI_MEM_SIZE 0x08000000 - -+#define AR724X_PCI_REG_RESET 0x18 - #define AR724X_PCI_REG_INT_STATUS 0x4c - #define AR724X_PCI_REG_INT_MASK 0x50 - -+#define AR724X_PCI_RESET_LINK_UP BIT(0) -+ - #define AR724X_PCI_INT_DEV0 BIT(14) - - #define AR724X_PCI_IRQ_COUNT 1 -@@ -38,6 +41,15 @@ static void __iomem *ar724x_pci_ctrl_bas - - static u32 ar724x_pci_bar0_value; - static bool ar724x_pci_bar0_is_cached; -+static bool ar724x_pci_link_up; -+ -+static inline bool ar724x_pci_check_link(void) -+{ -+ u32 reset; -+ -+ reset = __raw_readl(ar724x_pci_ctrl_base + AR724X_PCI_REG_RESET); -+ return reset & AR724X_PCI_RESET_LINK_UP; -+} - - static int ar724x_pci_read(struct pci_bus *bus, unsigned int devfn, int where, - int size, uint32_t *value) -@@ -46,6 +58,9 @@ static int ar724x_pci_read(struct pci_bu - void __iomem *base; - u32 data; - -+ if (!ar724x_pci_link_up) -+ return PCIBIOS_DEVICE_NOT_FOUND; -+ - if (devfn) - return PCIBIOS_DEVICE_NOT_FOUND; - -@@ -96,6 +111,9 @@ static int ar724x_pci_write(struct pci_b - u32 data; - int s; - -+ if (!ar724x_pci_link_up) -+ return PCIBIOS_DEVICE_NOT_FOUND; -+ - if (devfn) - return PCIBIOS_DEVICE_NOT_FOUND; - -@@ -280,6 +298,10 @@ int __init ar724x_pcibios_init(int irq) - if (ar724x_pci_ctrl_base == NULL) - goto err_unmap_devcfg; - -+ ar724x_pci_link_up = ar724x_pci_check_link(); -+ if (!ar724x_pci_link_up) -+ pr_warn("ar724x: PCIe link is down\n"); -+ - ar724x_pci_irq_init(irq); - register_pci_controller(&ar724x_pci_controller); - diff --git a/target/linux/ar71xx/patches-3.3/141-MIPS-pci-ar724x-use-correct-value-for-AR724X_PCI_MEM.patch b/target/linux/ar71xx/patches-3.3/141-MIPS-pci-ar724x-use-correct-value-for-AR724X_PCI_MEM.patch deleted file mode 100644 index d409a7a6a1..0000000000 --- a/target/linux/ar71xx/patches-3.3/141-MIPS-pci-ar724x-use-correct-value-for-AR724X_PCI_MEM.patch +++ /dev/null @@ -1,24 +0,0 @@ -From 4b0f8aaea1f9e2f931c4de785d9ce46ff7164627 Mon Sep 17 00:00:00 2001 -From: Gabor Juhos <juhosg@openwrt.org> -Date: Sun, 17 Jun 2012 12:55:24 +0200 -Subject: [PATCH 02/34] MIPS: pci-ar724x: use correct value for AR724X_PCI_MEM_SIZE - -The current definiton is wrong, it is conflicting -with AR724X_PCI_CFG_BASE. - -Signed-off-by: Gabor Juhos <juhosg@openwrt.org> ---- - arch/mips/pci/pci-ar724x.c | 2 +- - 1 files changed, 1 insertions(+), 1 deletions(-) - ---- a/arch/mips/pci/pci-ar724x.c -+++ b/arch/mips/pci/pci-ar724x.c -@@ -21,7 +21,7 @@ - #define AR724X_PCI_CTRL_SIZE 0x100 - - #define AR724X_PCI_MEM_BASE 0x10000000 --#define AR724X_PCI_MEM_SIZE 0x08000000 -+#define AR724X_PCI_MEM_SIZE 0x04000000 - - #define AR724X_PCI_REG_RESET 0x18 - #define AR724X_PCI_REG_INT_STATUS 0x4c diff --git a/target/linux/ar71xx/patches-3.3/142-MIPS-pci-ar71xx-fix-AR71XX_PCI_MEM_SIZE.patch b/target/linux/ar71xx/patches-3.3/142-MIPS-pci-ar71xx-fix-AR71XX_PCI_MEM_SIZE.patch deleted file mode 100644 index 7fb56f831e..0000000000 --- a/target/linux/ar71xx/patches-3.3/142-MIPS-pci-ar71xx-fix-AR71XX_PCI_MEM_SIZE.patch +++ /dev/null @@ -1,21 +0,0 @@ -From 01dbfe17b8ff628b6e2b3c75e1fc8c11d4cca644 Mon Sep 17 00:00:00 2001 -From: Gabor Juhos <juhosg@openwrt.org> -Date: Thu, 28 Jun 2012 19:19:58 +0200 -Subject: [PATCH 03/34] MIPS: pci-ar71xx: fix AR71XX_PCI_MEM_SIZE - -Signed-off-by: Gabor Juhos <juhosg@openwrt.org> ---- - arch/mips/pci/pci-ar71xx.c | 2 +- - 1 files changed, 1 insertions(+), 1 deletions(-) - ---- a/arch/mips/pci/pci-ar71xx.c -+++ b/arch/mips/pci/pci-ar71xx.c -@@ -24,7 +24,7 @@ - #include <asm/mach-ath79/pci.h> - - #define AR71XX_PCI_MEM_BASE 0x10000000 --#define AR71XX_PCI_MEM_SIZE 0x08000000 -+#define AR71XX_PCI_MEM_SIZE 0x07000000 - - #define AR71XX_PCI_WIN0_OFFS 0x10000000 - #define AR71XX_PCI_WIN1_OFFS 0x11000000 diff --git a/target/linux/ar71xx/patches-3.3/143-MIPS-pci-ar724x-convert-to-a-platform-driver.patch b/target/linux/ar71xx/patches-3.3/143-MIPS-pci-ar724x-convert-to-a-platform-driver.patch deleted file mode 100644 index fd9868963d..0000000000 --- a/target/linux/ar71xx/patches-3.3/143-MIPS-pci-ar724x-convert-to-a-platform-driver.patch +++ /dev/null @@ -1,94 +0,0 @@ -From f2d2d928c3900b67a5f95e53b86de5b61a3ab12c Mon Sep 17 00:00:00 2001 -From: Gabor Juhos <juhosg@openwrt.org> -Date: Mon, 11 Jun 2012 13:19:44 +0200 -Subject: [PATCH 04/34] MIPS: pci-ar724x: convert to a platform driver - -Signed-off-by: Gabor Juhos <juhosg@openwrt.org> ---- - arch/mips/pci/pci-ar724x.c | 57 ++++++++++++++++++++++++++++++++++++++++++- - 1 files changed, 55 insertions(+), 2 deletions(-) - ---- a/arch/mips/pci/pci-ar724x.c -+++ b/arch/mips/pci/pci-ar724x.c -@@ -11,6 +11,8 @@ - - #include <linux/irq.h> - #include <linux/pci.h> -+#include <linux/module.h> -+#include <linux/platform_device.h> - #include <asm/mach-ath79/ath79.h> - #include <asm/mach-ath79/ar71xx_regs.h> - #include <asm/mach-ath79/pci.h> -@@ -262,7 +264,7 @@ static struct irq_chip ar724x_pci_irq_ch - .irq_mask_ack = ar724x_pci_irq_mask, - }; - --static void __init ar724x_pci_irq_init(int irq) -+static void __devinit ar724x_pci_irq_init(int irq) - { - void __iomem *base; - int i; -@@ -282,7 +284,7 @@ static void __init ar724x_pci_irq_init(i - irq_set_chained_handler(irq, ar724x_pci_irq_handler); - } - --int __init ar724x_pcibios_init(int irq) -+int __devinit ar724x_pcibios_init(int irq) - { - int ret; - -@@ -312,3 +314,54 @@ err_unmap_devcfg: - err: - return ret; - } -+ -+static int __devinit ar724x_pci_probe(struct platform_device *pdev) -+{ -+ struct resource *res; -+ int irq; -+ -+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "ctrl_base"); -+ if (!res) -+ return -EINVAL; -+ -+ ar724x_pci_ctrl_base = devm_request_and_ioremap(&pdev->dev, res); -+ if (ar724x_pci_ctrl_base == NULL) -+ return -EBUSY; -+ -+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "cfg_base"); -+ if (!res) -+ return -EINVAL; -+ -+ ar724x_pci_devcfg_base = devm_request_and_ioremap(&pdev->dev, res); -+ if (!ar724x_pci_devcfg_base) -+ return -EBUSY; -+ -+ irq = platform_get_irq(pdev, 0); -+ if (irq < 0) -+ return -EINVAL; -+ -+ ar724x_pci_link_up = ar724x_pci_check_link(); -+ if (!ar724x_pci_link_up) -+ dev_warn(&pdev->dev, "PCIe link is down\n"); -+ -+ ar724x_pci_irq_init(irq); -+ -+ register_pci_controller(&ar724x_pci_controller); -+ -+ return 0; -+} -+ -+static struct platform_driver ar724x_pci_driver = { -+ .probe = ar724x_pci_probe, -+ .driver = { -+ .name = "ar724x-pci", -+ .owner = THIS_MODULE, -+ }, -+}; -+ -+static int __init ar724x_pci_init(void) -+{ -+ return platform_driver_register(&ar724x_pci_driver); -+} -+ -+postcore_initcall(ar724x_pci_init); diff --git a/target/linux/ar71xx/patches-3.3/144-MIPS-pci-ar71xx-convert-to-a-platform-driver.patch b/target/linux/ar71xx/patches-3.3/144-MIPS-pci-ar71xx-convert-to-a-platform-driver.patch deleted file mode 100644 index a78469b718..0000000000 --- a/target/linux/ar71xx/patches-3.3/144-MIPS-pci-ar71xx-convert-to-a-platform-driver.patch +++ /dev/null @@ -1,104 +0,0 @@ -From d1a22e73f991145a4abd7d0c37bcf318703c89ed Mon Sep 17 00:00:00 2001 -From: Gabor Juhos <juhosg@openwrt.org> -Date: Mon, 11 Jun 2012 13:24:55 +0200 -Subject: [PATCH 05/34] MIPS: pci-ar71xx: convert to a platform driver - -Signed-off-by: Gabor Juhos <juhosg@openwrt.org> ---- - arch/mips/pci/pci-ar71xx.c | 60 +++++++++++++++++++++++++++++++++++++++++--- - 1 files changed, 56 insertions(+), 4 deletions(-) - ---- a/arch/mips/pci/pci-ar71xx.c -+++ b/arch/mips/pci/pci-ar71xx.c -@@ -18,6 +18,8 @@ - #include <linux/pci.h> - #include <linux/pci_regs.h> - #include <linux/interrupt.h> -+#include <linux/module.h> -+#include <linux/platform_device.h> - - #include <asm/mach-ath79/ar71xx_regs.h> - #include <asm/mach-ath79/ath79.h> -@@ -309,7 +311,7 @@ static struct irq_chip ar71xx_pci_irq_ch - .irq_mask_ack = ar71xx_pci_irq_mask, - }; - --static __init void ar71xx_pci_irq_init(void) -+static __devinit void ar71xx_pci_irq_init(int irq) - { - void __iomem *base = ath79_reset_base; - int i; -@@ -324,10 +326,10 @@ static __init void ar71xx_pci_irq_init(v - irq_set_chip_and_handler(i, &ar71xx_pci_irq_chip, - handle_level_irq); - -- irq_set_chained_handler(ATH79_CPU_IRQ_IP2, ar71xx_pci_irq_handler); -+ irq_set_chained_handler(irq, ar71xx_pci_irq_handler); - } - --static __init void ar71xx_pci_reset(void) -+static __devinit void ar71xx_pci_reset(void) - { - void __iomem *ddr_base = ath79_ddr_base; - -@@ -367,9 +369,59 @@ __init int ar71xx_pcibios_init(void) - /* clear bus errors */ - ar71xx_pci_check_error(1); - -- ar71xx_pci_irq_init(); -+ ar71xx_pci_irq_init(ATH79_CPU_IRQ_IP2); - - register_pci_controller(&ar71xx_pci_controller); - - return 0; - } -+ -+static int __devinit ar71xx_pci_probe(struct platform_device *pdev) -+{ -+ struct resource *res; -+ int irq; -+ u32 t; -+ -+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "cfg_base"); -+ if (!res) -+ return -EINVAL; -+ -+ ar71xx_pcicfg_base = devm_request_and_ioremap(&pdev->dev, res); -+ if (!ar71xx_pcicfg_base) -+ return -ENOMEM; -+ -+ irq = platform_get_irq(pdev, 0); -+ if (irq < 0) -+ return -EINVAL; -+ -+ ar71xx_pci_reset(); -+ -+ /* setup COMMAND register */ -+ t = PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | PCI_COMMAND_INVALIDATE -+ | PCI_COMMAND_PARITY | PCI_COMMAND_SERR | PCI_COMMAND_FAST_BACK; -+ ar71xx_pci_local_write(PCI_COMMAND, 4, t); -+ -+ /* clear bus errors */ -+ ar71xx_pci_check_error(1); -+ -+ ar71xx_pci_irq_init(irq); -+ -+ register_pci_controller(&ar71xx_pci_controller); -+ -+ return 0; -+} -+ -+static struct platform_driver ar71xx_pci_driver = { -+ .probe = ar71xx_pci_probe, -+ .driver = { -+ .name = "ar71xx-pci", -+ .owner = THIS_MODULE, -+ }, -+}; -+ -+static int __init ar71xx_pci_init(void) -+{ -+ return platform_driver_register(&ar71xx_pci_driver); -+} -+ -+postcore_initcall(ar71xx_pci_init); diff --git a/target/linux/ar71xx/patches-3.3/145-MIPS-ath79-move-global-PCI-defines-into-a-common-hea.patch b/target/linux/ar71xx/patches-3.3/145-MIPS-ath79-move-global-PCI-defines-into-a-common-hea.patch deleted file mode 100644 index 4861db00f3..0000000000 --- a/target/linux/ar71xx/patches-3.3/145-MIPS-ath79-move-global-PCI-defines-into-a-common-hea.patch +++ /dev/null @@ -1,94 +0,0 @@ -From c3a8b5fa196cedc4b940c1e5ec482dd875aa3180 Mon Sep 17 00:00:00 2001 -From: Gabor Juhos <juhosg@openwrt.org> -Date: Mon, 11 Jun 2012 13:38:06 +0200 -Subject: [PATCH 06/34] MIPS: ath79: move global PCI defines into a common header - -The constants will be used by a subsequent patch. - -Signed-off-by: Gabor Juhos <juhosg@openwrt.org> ---- - arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 24 ++++++++++++++++++++++++ - arch/mips/pci/pci-ar71xx.c | 16 ---------------- - arch/mips/pci/pci-ar724x.c | 8 -------- - 3 files changed, 24 insertions(+), 24 deletions(-) - ---- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -@@ -41,11 +41,35 @@ - #define AR71XX_RESET_BASE (AR71XX_APB_BASE + 0x00060000) - #define AR71XX_RESET_SIZE 0x100 - -+#define AR71XX_PCI_MEM_BASE 0x10000000 -+#define AR71XX_PCI_MEM_SIZE 0x07000000 -+ -+#define AR71XX_PCI_WIN0_OFFS 0x10000000 -+#define AR71XX_PCI_WIN1_OFFS 0x11000000 -+#define AR71XX_PCI_WIN2_OFFS 0x12000000 -+#define AR71XX_PCI_WIN3_OFFS 0x13000000 -+#define AR71XX_PCI_WIN4_OFFS 0x14000000 -+#define AR71XX_PCI_WIN5_OFFS 0x15000000 -+#define AR71XX_PCI_WIN6_OFFS 0x16000000 -+#define AR71XX_PCI_WIN7_OFFS 0x07000000 -+ -+#define AR71XX_PCI_CFG_BASE \ -+ (AR71XX_PCI_MEM_BASE + AR71XX_PCI_WIN7_OFFS + 0x10000) -+#define AR71XX_PCI_CFG_SIZE 0x100 -+ - #define AR7240_USB_CTRL_BASE (AR71XX_APB_BASE + 0x00030000) - #define AR7240_USB_CTRL_SIZE 0x100 - #define AR7240_OHCI_BASE 0x1b000000 - #define AR7240_OHCI_SIZE 0x1000 - -+#define AR724X_PCI_MEM_BASE 0x10000000 -+#define AR724X_PCI_MEM_SIZE 0x04000000 -+ -+#define AR724X_PCI_CFG_BASE 0x14000000 -+#define AR724X_PCI_CFG_SIZE 0x1000 -+#define AR724X_PCI_CTRL_BASE (AR71XX_APB_BASE + 0x000f0000) -+#define AR724X_PCI_CTRL_SIZE 0x100 -+ - #define AR724X_EHCI_BASE 0x1b000000 - #define AR724X_EHCI_SIZE 0x1000 - ---- a/arch/mips/pci/pci-ar71xx.c -+++ b/arch/mips/pci/pci-ar71xx.c -@@ -25,22 +25,6 @@ - #include <asm/mach-ath79/ath79.h> - #include <asm/mach-ath79/pci.h> - --#define AR71XX_PCI_MEM_BASE 0x10000000 --#define AR71XX_PCI_MEM_SIZE 0x07000000 -- --#define AR71XX_PCI_WIN0_OFFS 0x10000000 --#define AR71XX_PCI_WIN1_OFFS 0x11000000 --#define AR71XX_PCI_WIN2_OFFS 0x12000000 --#define AR71XX_PCI_WIN3_OFFS 0x13000000 --#define AR71XX_PCI_WIN4_OFFS 0x14000000 --#define AR71XX_PCI_WIN5_OFFS 0x15000000 --#define AR71XX_PCI_WIN6_OFFS 0x16000000 --#define AR71XX_PCI_WIN7_OFFS 0x07000000 -- --#define AR71XX_PCI_CFG_BASE \ -- (AR71XX_PCI_MEM_BASE + AR71XX_PCI_WIN7_OFFS + 0x10000) --#define AR71XX_PCI_CFG_SIZE 0x100 -- - #define AR71XX_PCI_REG_CRP_AD_CBE 0x00 - #define AR71XX_PCI_REG_CRP_WRDATA 0x04 - #define AR71XX_PCI_REG_CRP_RDDATA 0x08 ---- a/arch/mips/pci/pci-ar724x.c -+++ b/arch/mips/pci/pci-ar724x.c -@@ -17,14 +17,6 @@ - #include <asm/mach-ath79/ar71xx_regs.h> - #include <asm/mach-ath79/pci.h> - --#define AR724X_PCI_CFG_BASE 0x14000000 --#define AR724X_PCI_CFG_SIZE 0x1000 --#define AR724X_PCI_CTRL_BASE (AR71XX_APB_BASE + 0x000f0000) --#define AR724X_PCI_CTRL_SIZE 0x100 -- --#define AR724X_PCI_MEM_BASE 0x10000000 --#define AR724X_PCI_MEM_SIZE 0x04000000 -- - #define AR724X_PCI_REG_RESET 0x18 - #define AR724X_PCI_REG_INT_STATUS 0x4c - #define AR724X_PCI_REG_INT_MASK 0x50 diff --git a/target/linux/ar71xx/patches-3.3/146-MIPS-ath79-register-platform-devices-for-the-PCI-con.patch b/target/linux/ar71xx/patches-3.3/146-MIPS-ath79-register-platform-devices-for-the-PCI-con.patch deleted file mode 100644 index cc2572f88e..0000000000 --- a/target/linux/ar71xx/patches-3.3/146-MIPS-ath79-register-platform-devices-for-the-PCI-con.patch +++ /dev/null @@ -1,119 +0,0 @@ -From 2fdf8dcff3ffaa806e9f9d7f1c1bd876222cff4d Mon Sep 17 00:00:00 2001 -From: Gabor Juhos <juhosg@openwrt.org> -Date: Mon, 11 Jun 2012 13:39:32 +0200 -Subject: [PATCH 07/34] MIPS: ath79: register platform devices for the PCI controllers - -Signed-off-by: Gabor Juhos <juhosg@openwrt.org> ---- - arch/mips/ath79/pci.c | 87 +++++++++++++++++++++++++++++++++++++++++++----- - 1 files changed, 78 insertions(+), 9 deletions(-) - ---- a/arch/mips/ath79/pci.c -+++ b/arch/mips/ath79/pci.c -@@ -14,6 +14,8 @@ - - #include <linux/init.h> - #include <linux/pci.h> -+#include <linux/resource.h> -+#include <linux/platform_device.h> - #include <asm/mach-ath79/ar71xx_regs.h> - #include <asm/mach-ath79/ath79.h> - #include <asm/mach-ath79/irq.h> -@@ -110,21 +112,88 @@ void __init ath79_pci_set_plat_dev_init( - ath79_pci_plat_dev_init = func; - } - --int __init ath79_register_pci(void) -+static struct platform_device * -+ath79_register_pci_ar71xx(void) - { -- if (soc_is_ar71xx()) -- return ar71xx_pcibios_init(); -+ struct platform_device *pdev; -+ struct resource res[2]; -+ -+ memset(res, 0, sizeof(res)); - -- if (soc_is_ar724x()) -- return ar724x_pcibios_init(ATH79_CPU_IRQ_IP2); -+ res[0].name = "cfg_base"; -+ res[0].flags = IORESOURCE_MEM; -+ res[0].start = AR71XX_PCI_CFG_BASE; -+ res[0].end = AR71XX_PCI_CFG_BASE + AR71XX_PCI_CFG_SIZE - 1; -+ -+ res[1].flags = IORESOURCE_IRQ; -+ res[1].start = ATH79_CPU_IRQ_IP2; -+ res[1].end = ATH79_CPU_IRQ_IP2; -+ -+ pdev = platform_device_register_simple("ar71xx-pci", -1, -+ res, ARRAY_SIZE(res)); -+ return pdev; -+} - -- if (soc_is_ar9342() || soc_is_ar9344()) { -+static struct platform_device * -+ath79_register_pci_ar724x(int id, -+ unsigned long cfg_base, -+ unsigned long ctrl_base, -+ int irq) -+{ -+ struct platform_device *pdev; -+ struct resource res[3]; -+ -+ memset(res, 0, sizeof(res)); -+ -+ res[0].name = "cfg_base"; -+ res[0].flags = IORESOURCE_MEM; -+ res[0].start = cfg_base; -+ res[0].end = cfg_base + AR724X_PCI_CFG_SIZE - 1; -+ -+ res[1].name = "ctrl_base"; -+ res[1].flags = IORESOURCE_MEM; -+ res[1].start = ctrl_base; -+ res[1].end = ctrl_base + AR724X_PCI_CTRL_SIZE - 1; -+ -+ res[2].flags = IORESOURCE_IRQ; -+ res[2].start = irq; -+ res[2].end = irq; -+ -+ pdev = platform_device_register_simple("ar724x-pci", id, -+ res, ARRAY_SIZE(res)); -+ return pdev; -+} -+ -+int __init ath79_register_pci(void) -+{ -+ struct platform_device *pdev = NULL; -+ -+ if (soc_is_ar71xx()) { -+ pdev = ath79_register_pci_ar71xx(); -+ } else if (soc_is_ar724x()) { -+ pdev = ath79_register_pci_ar724x(-1, -+ AR724X_PCI_CFG_BASE, -+ AR724X_PCI_CTRL_BASE, -+ ATH79_CPU_IRQ_IP2); -+ } else if (soc_is_ar9342() || -+ soc_is_ar9344()) { - u32 bootstrap; - - bootstrap = ath79_reset_rr(AR934X_RESET_REG_BOOTSTRAP); -- if (bootstrap & AR934X_BOOTSTRAP_PCIE_RC) -- return ar724x_pcibios_init(ATH79_IP2_IRQ(0)); -+ if ((bootstrap & AR934X_BOOTSTRAP_PCIE_RC) == 0) -+ return -ENODEV; -+ -+ pdev = ath79_register_pci_ar724x(-1, -+ AR724X_PCI_CFG_BASE, -+ AR724X_PCI_CTRL_BASE, -+ ATH79_IP2_IRQ(0)); -+ } else { -+ /* No PCI support */ -+ return -ENODEV; - } - -- return -ENODEV; -+ if (!pdev) -+ pr_err("unable to register PCI controller device\n"); -+ -+ return pdev ? 0 : -ENODEV; - } diff --git a/target/linux/ar71xx/patches-3.3/147-MIPS-ath79-remove-unused-ar7-1x-24-x_pcibios_init-fu.patch b/target/linux/ar71xx/patches-3.3/147-MIPS-ath79-remove-unused-ar7-1x-24-x_pcibios_init-fu.patch deleted file mode 100644 index 0157e347c7..0000000000 --- a/target/linux/ar71xx/patches-3.3/147-MIPS-ath79-remove-unused-ar7-1x-24-x_pcibios_init-fu.patch +++ /dev/null @@ -1,147 +0,0 @@ -From 07224e2fa5f889162ee0560c6ab1eb8cd16a8dd2 Mon Sep 17 00:00:00 2001 -From: Gabor Juhos <juhosg@openwrt.org> -Date: Mon, 11 Jun 2012 14:59:39 +0200 -Subject: [PATCH 08/34] MIPS: ath79: remove unused ar7{1x,24}x_pcibios_init functions - -The functions are unused now, so remove them. - -Signed-off-by: Gabor Juhos <juhosg@openwrt.org> ---- - arch/mips/ath79/pci.c | 1 - - arch/mips/include/asm/mach-ath79/pci.h | 28 ---------------------------- - arch/mips/pci/pci-ar71xx.c | 26 -------------------------- - arch/mips/pci/pci-ar724x.c | 32 -------------------------------- - 4 files changed, 0 insertions(+), 87 deletions(-) - delete mode 100644 arch/mips/include/asm/mach-ath79/pci.h - ---- a/arch/mips/ath79/pci.c -+++ b/arch/mips/ath79/pci.c -@@ -19,7 +19,6 @@ - #include <asm/mach-ath79/ar71xx_regs.h> - #include <asm/mach-ath79/ath79.h> - #include <asm/mach-ath79/irq.h> --#include <asm/mach-ath79/pci.h> - #include "pci.h" - - static int (*ath79_pci_plat_dev_init)(struct pci_dev *dev); ---- a/arch/mips/include/asm/mach-ath79/pci.h -+++ /dev/null -@@ -1,28 +0,0 @@ --/* -- * Atheros AR71XX/AR724X PCI support -- * -- * Copyright (C) 2011 René Bolldorf <xsecute@googlemail.com> -- * Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org> -- * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> -- * -- * This program is free software; you can redistribute it and/or modify it -- * under the terms of the GNU General Public License version 2 as published -- * by the Free Software Foundation. -- */ -- --#ifndef __ASM_MACH_ATH79_PCI_H --#define __ASM_MACH_ATH79_PCI_H -- --#if defined(CONFIG_PCI) && defined(CONFIG_SOC_AR71XX) --int ar71xx_pcibios_init(void); --#else --static inline int ar71xx_pcibios_init(void) { return 0; } --#endif -- --#if defined(CONFIG_PCI_AR724X) --int ar724x_pcibios_init(int irq); --#else --static inline int ar724x_pcibios_init(int irq) { return 0; } --#endif -- --#endif /* __ASM_MACH_ATH79_PCI_H */ ---- a/arch/mips/pci/pci-ar71xx.c -+++ b/arch/mips/pci/pci-ar71xx.c -@@ -23,7 +23,6 @@ - - #include <asm/mach-ath79/ar71xx_regs.h> - #include <asm/mach-ath79/ath79.h> --#include <asm/mach-ath79/pci.h> - - #define AR71XX_PCI_REG_CRP_AD_CBE 0x00 - #define AR71XX_PCI_REG_CRP_WRDATA 0x04 -@@ -335,31 +334,6 @@ static __devinit void ar71xx_pci_reset(v - mdelay(100); - } - --__init int ar71xx_pcibios_init(void) --{ -- u32 t; -- -- ar71xx_pcicfg_base = ioremap(AR71XX_PCI_CFG_BASE, AR71XX_PCI_CFG_SIZE); -- if (ar71xx_pcicfg_base == NULL) -- return -ENOMEM; -- -- ar71xx_pci_reset(); -- -- /* setup COMMAND register */ -- t = PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | PCI_COMMAND_INVALIDATE -- | PCI_COMMAND_PARITY | PCI_COMMAND_SERR | PCI_COMMAND_FAST_BACK; -- ar71xx_pci_local_write(PCI_COMMAND, 4, t); -- -- /* clear bus errors */ -- ar71xx_pci_check_error(1); -- -- ar71xx_pci_irq_init(ATH79_CPU_IRQ_IP2); -- -- register_pci_controller(&ar71xx_pci_controller); -- -- return 0; --} -- - static int __devinit ar71xx_pci_probe(struct platform_device *pdev) - { - struct resource *res; ---- a/arch/mips/pci/pci-ar724x.c -+++ b/arch/mips/pci/pci-ar724x.c -@@ -15,7 +15,6 @@ - #include <linux/platform_device.h> - #include <asm/mach-ath79/ath79.h> - #include <asm/mach-ath79/ar71xx_regs.h> --#include <asm/mach-ath79/pci.h> - - #define AR724X_PCI_REG_RESET 0x18 - #define AR724X_PCI_REG_INT_STATUS 0x4c -@@ -276,37 +275,6 @@ static void __devinit ar724x_pci_irq_ini - irq_set_chained_handler(irq, ar724x_pci_irq_handler); - } - --int __devinit ar724x_pcibios_init(int irq) --{ -- int ret; -- -- ret = -ENOMEM; -- -- ar724x_pci_devcfg_base = ioremap(AR724X_PCI_CFG_BASE, -- AR724X_PCI_CFG_SIZE); -- if (ar724x_pci_devcfg_base == NULL) -- goto err; -- -- ar724x_pci_ctrl_base = ioremap(AR724X_PCI_CTRL_BASE, -- AR724X_PCI_CTRL_SIZE); -- if (ar724x_pci_ctrl_base == NULL) -- goto err_unmap_devcfg; -- -- ar724x_pci_link_up = ar724x_pci_check_link(); -- if (!ar724x_pci_link_up) -- pr_warn("ar724x: PCIe link is down\n"); -- -- ar724x_pci_irq_init(irq); -- register_pci_controller(&ar724x_pci_controller); -- -- return PCIBIOS_SUCCESSFUL; -- --err_unmap_devcfg: -- iounmap(ar724x_pci_devcfg_base); --err: -- return ret; --} -- - static int __devinit ar724x_pci_probe(struct platform_device *pdev) - { - struct resource *res; diff --git a/target/linux/ar71xx/patches-3.3/148-MIPS-avoid-possible-resource-conflict-in-register_pc.patch b/target/linux/ar71xx/patches-3.3/148-MIPS-avoid-possible-resource-conflict-in-register_pc.patch deleted file mode 100644 index fc1385fc7f..0000000000 --- a/target/linux/ar71xx/patches-3.3/148-MIPS-avoid-possible-resource-conflict-in-register_pc.patch +++ /dev/null @@ -1,35 +0,0 @@ -From a018b28d3953a32008de839d997a992a724ae314 Mon Sep 17 00:00:00 2001 -From: Gabor Juhos <juhosg@openwrt.org> -Date: Sun, 24 Jun 2012 17:40:45 +0200 -Subject: [PATCH 09/34] MIPS: avoid possible resource conflict in register_pci_controller - -Signed-off-by: Gabor Juhos <juhosg@openwrt.org> ---- - arch/mips/pci/pci.c | 15 +++++++++++++-- - 1 files changed, 13 insertions(+), 2 deletions(-) - ---- a/arch/mips/pci/pci.c -+++ b/arch/mips/pci/pci.c -@@ -127,9 +127,20 @@ static DEFINE_MUTEX(pci_scan_mutex); - - void __devinit register_pci_controller(struct pci_controller *hose) - { -- if (request_resource(&iomem_resource, hose->mem_resource) < 0) -+ struct resource *parent; -+ -+ parent = hose->mem_resource->parent; -+ if (!parent) -+ parent = &iomem_resource; -+ -+ if (request_resource(parent, hose->mem_resource) < 0) - goto out; -- if (request_resource(&ioport_resource, hose->io_resource) < 0) { -+ -+ parent = hose->io_resource->parent; -+ if (!parent) -+ parent = &ioport_resource; -+ -+ if (request_resource(parent, hose->io_resource) < 0) { - release_resource(hose->mem_resource); - goto out; - } diff --git a/target/linux/ar71xx/patches-3.3/149-MIPS-pci-ar724x-use-dynamically-allocated-PCI-contro.patch b/target/linux/ar71xx/patches-3.3/149-MIPS-pci-ar724x-use-dynamically-allocated-PCI-contro.patch deleted file mode 100644 index 3a67cae2d2..0000000000 --- a/target/linux/ar71xx/patches-3.3/149-MIPS-pci-ar724x-use-dynamically-allocated-PCI-contro.patch +++ /dev/null @@ -1,307 +0,0 @@ -From 242aedf3246dc5085271aca56134ac455bfb64b5 Mon Sep 17 00:00:00 2001 -From: Gabor Juhos <juhosg@openwrt.org> -Date: Sun, 24 Jun 2012 11:51:34 +0200 -Subject: [PATCH 10/34] MIPS: pci-ar724x: use dynamically allocated PCI controller structure - -Signed-off-by: Gabor Juhos <juhosg@openwrt.org> ---- - arch/mips/pci/pci-ar724x.c | 129 ++++++++++++++++++++++++++++---------------- - 1 files changed, 82 insertions(+), 47 deletions(-) - ---- a/arch/mips/pci/pci-ar724x.c -+++ b/arch/mips/pci/pci-ar724x.c -@@ -9,6 +9,7 @@ - * by the Free Software Foundation. - */ - -+#include <linux/spinlock.h> - #include <linux/irq.h> - #include <linux/pci.h> - #include <linux/module.h> -@@ -28,38 +29,56 @@ - - #define AR7240_BAR0_WAR_VALUE 0xffff - --static DEFINE_SPINLOCK(ar724x_pci_lock); --static void __iomem *ar724x_pci_devcfg_base; --static void __iomem *ar724x_pci_ctrl_base; -- --static u32 ar724x_pci_bar0_value; --static bool ar724x_pci_bar0_is_cached; --static bool ar724x_pci_link_up; -+struct ar724x_pci_controller { -+ void __iomem *devcfg_base; -+ void __iomem *ctrl_base; - --static inline bool ar724x_pci_check_link(void) -+ int irq; -+ -+ bool link_up; -+ bool bar0_is_cached; -+ u32 bar0_value; -+ -+ spinlock_t lock; -+ -+ struct pci_controller pci_controller; -+}; -+ -+static inline bool ar724x_pci_check_link(struct ar724x_pci_controller *apc) - { - u32 reset; - -- reset = __raw_readl(ar724x_pci_ctrl_base + AR724X_PCI_REG_RESET); -+ reset = __raw_readl(apc->ctrl_base + AR724X_PCI_REG_RESET); - return reset & AR724X_PCI_RESET_LINK_UP; - } - -+static inline struct ar724x_pci_controller * -+pci_bus_to_ar724x_controller(struct pci_bus *bus) -+{ -+ struct pci_controller *hose; -+ -+ hose = (struct pci_controller *) bus->sysdata; -+ return container_of(hose, struct ar724x_pci_controller, pci_controller); -+} -+ - static int ar724x_pci_read(struct pci_bus *bus, unsigned int devfn, int where, - int size, uint32_t *value) - { -+ struct ar724x_pci_controller *apc; - unsigned long flags; - void __iomem *base; - u32 data; - -- if (!ar724x_pci_link_up) -+ apc = pci_bus_to_ar724x_controller(bus); -+ if (!apc->link_up) - return PCIBIOS_DEVICE_NOT_FOUND; - - if (devfn) - return PCIBIOS_DEVICE_NOT_FOUND; - -- base = ar724x_pci_devcfg_base; -+ base = apc->devcfg_base; - -- spin_lock_irqsave(&ar724x_pci_lock, flags); -+ spin_lock_irqsave(&apc->lock, flags); - data = __raw_readl(base + (where & ~3)); - - switch (size) { -@@ -78,17 +97,17 @@ static int ar724x_pci_read(struct pci_bu - case 4: - break; - default: -- spin_unlock_irqrestore(&ar724x_pci_lock, flags); -+ spin_unlock_irqrestore(&apc->lock, flags); - - return PCIBIOS_BAD_REGISTER_NUMBER; - } - -- spin_unlock_irqrestore(&ar724x_pci_lock, flags); -+ spin_unlock_irqrestore(&apc->lock, flags); - - if (where == PCI_BASE_ADDRESS_0 && size == 4 && -- ar724x_pci_bar0_is_cached) { -+ apc->bar0_is_cached) { - /* use the cached value */ -- *value = ar724x_pci_bar0_value; -+ *value = apc->bar0_value; - } else { - *value = data; - } -@@ -99,12 +118,14 @@ static int ar724x_pci_read(struct pci_bu - static int ar724x_pci_write(struct pci_bus *bus, unsigned int devfn, int where, - int size, uint32_t value) - { -+ struct ar724x_pci_controller *apc; - unsigned long flags; - void __iomem *base; - u32 data; - int s; - -- if (!ar724x_pci_link_up) -+ apc = pci_bus_to_ar724x_controller(bus); -+ if (!apc->link_up) - return PCIBIOS_DEVICE_NOT_FOUND; - - if (devfn) -@@ -122,18 +143,18 @@ static int ar724x_pci_write(struct pci_b - * BAR0 register in order to make the device memory - * accessible. - */ -- ar724x_pci_bar0_is_cached = true; -- ar724x_pci_bar0_value = value; -+ apc->bar0_is_cached = true; -+ apc->bar0_value = value; - - value = AR7240_BAR0_WAR_VALUE; - } else { -- ar724x_pci_bar0_is_cached = false; -+ apc->bar0_is_cached = false; - } - } - -- base = ar724x_pci_devcfg_base; -+ base = apc->devcfg_base; - -- spin_lock_irqsave(&ar724x_pci_lock, flags); -+ spin_lock_irqsave(&apc->lock, flags); - data = __raw_readl(base + (where & ~3)); - - switch (size) { -@@ -151,7 +172,7 @@ static int ar724x_pci_write(struct pci_b - data = value; - break; - default: -- spin_unlock_irqrestore(&ar724x_pci_lock, flags); -+ spin_unlock_irqrestore(&apc->lock, flags); - - return PCIBIOS_BAD_REGISTER_NUMBER; - } -@@ -159,7 +180,7 @@ static int ar724x_pci_write(struct pci_b - __raw_writel(data, base + (where & ~3)); - /* flush write */ - __raw_readl(base + (where & ~3)); -- spin_unlock_irqrestore(&ar724x_pci_lock, flags); -+ spin_unlock_irqrestore(&apc->lock, flags); - - return PCIBIOS_SUCCESSFUL; - } -@@ -183,18 +204,14 @@ static struct resource ar724x_mem_resour - .flags = IORESOURCE_MEM, - }; - --static struct pci_controller ar724x_pci_controller = { -- .pci_ops = &ar724x_pci_ops, -- .io_resource = &ar724x_io_resource, -- .mem_resource = &ar724x_mem_resource, --}; -- - static void ar724x_pci_irq_handler(unsigned int irq, struct irq_desc *desc) - { -+ struct ar724x_pci_controller *apc; - void __iomem *base; - u32 pending; - -- base = ar724x_pci_ctrl_base; -+ apc = irq_get_handler_data(irq); -+ base = apc->ctrl_base; - - pending = __raw_readl(base + AR724X_PCI_REG_INT_STATUS) & - __raw_readl(base + AR724X_PCI_REG_INT_MASK); -@@ -208,10 +225,12 @@ static void ar724x_pci_irq_handler(unsig - - static void ar724x_pci_irq_unmask(struct irq_data *d) - { -+ struct ar724x_pci_controller *apc; - void __iomem *base; - u32 t; - -- base = ar724x_pci_ctrl_base; -+ apc = irq_data_get_irq_chip_data(d); -+ base = apc->ctrl_base; - - switch (d->irq) { - case ATH79_PCI_IRQ(0): -@@ -225,10 +244,12 @@ static void ar724x_pci_irq_unmask(struct - - static void ar724x_pci_irq_mask(struct irq_data *d) - { -+ struct ar724x_pci_controller *apc; - void __iomem *base; - u32 t; - -- base = ar724x_pci_ctrl_base; -+ apc = irq_data_get_irq_chip_data(d); -+ base = apc->ctrl_base; - - switch (d->irq) { - case ATH79_PCI_IRQ(0): -@@ -255,12 +276,12 @@ static struct irq_chip ar724x_pci_irq_ch - .irq_mask_ack = ar724x_pci_irq_mask, - }; - --static void __devinit ar724x_pci_irq_init(int irq) -+static void __devinit ar724x_pci_irq_init(struct ar724x_pci_controller *apc) - { - void __iomem *base; - int i; - -- base = ar724x_pci_ctrl_base; -+ base = apc->ctrl_base; - - __raw_writel(0, base + AR724X_PCI_REG_INT_MASK); - __raw_writel(0, base + AR724X_PCI_REG_INT_STATUS); -@@ -268,45 +289,59 @@ static void __devinit ar724x_pci_irq_ini - BUILD_BUG_ON(ATH79_PCI_IRQ_COUNT < AR724X_PCI_IRQ_COUNT); - - for (i = ATH79_PCI_IRQ_BASE; -- i < ATH79_PCI_IRQ_BASE + AR724X_PCI_IRQ_COUNT; i++) -+ i < ATH79_PCI_IRQ_BASE + AR724X_PCI_IRQ_COUNT; i++) { - irq_set_chip_and_handler(i, &ar724x_pci_irq_chip, - handle_level_irq); -+ irq_set_chip_data(i, apc); -+ } - -- irq_set_chained_handler(irq, ar724x_pci_irq_handler); -+ irq_set_handler_data(apc->irq, apc); -+ irq_set_chained_handler(apc->irq, ar724x_pci_irq_handler); - } - - static int __devinit ar724x_pci_probe(struct platform_device *pdev) - { -+ struct ar724x_pci_controller *apc; - struct resource *res; -- int irq; -+ -+ apc = devm_kzalloc(&pdev->dev, sizeof(struct ar724x_pci_controller), -+ GFP_KERNEL); -+ if (!apc) -+ return -ENOMEM; - - res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "ctrl_base"); - if (!res) - return -EINVAL; - -- ar724x_pci_ctrl_base = devm_request_and_ioremap(&pdev->dev, res); -- if (ar724x_pci_ctrl_base == NULL) -+ apc->ctrl_base = devm_request_and_ioremap(&pdev->dev, res); -+ if (apc->ctrl_base == NULL) - return -EBUSY; - - res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "cfg_base"); - if (!res) - return -EINVAL; - -- ar724x_pci_devcfg_base = devm_request_and_ioremap(&pdev->dev, res); -- if (!ar724x_pci_devcfg_base) -+ apc->devcfg_base = devm_request_and_ioremap(&pdev->dev, res); -+ if (!apc->devcfg_base) - return -EBUSY; - -- irq = platform_get_irq(pdev, 0); -- if (irq < 0) -+ apc->irq = platform_get_irq(pdev, 0); -+ if (apc->irq < 0) - return -EINVAL; - -- ar724x_pci_link_up = ar724x_pci_check_link(); -- if (!ar724x_pci_link_up) -+ spin_lock_init(&apc->lock); -+ -+ apc->pci_controller.pci_ops = &ar724x_pci_ops; -+ apc->pci_controller.io_resource = &ar724x_io_resource; -+ apc->pci_controller.mem_resource = &ar724x_mem_resource; -+ -+ apc->link_up = ar724x_pci_check_link(apc); -+ if (!apc->link_up) - dev_warn(&pdev->dev, "PCIe link is down\n"); - -- ar724x_pci_irq_init(irq); -+ ar724x_pci_irq_init(apc); - -- register_pci_controller(&ar724x_pci_controller); -+ register_pci_controller(&apc->pci_controller); - - return 0; - } diff --git a/target/linux/ar71xx/patches-3.3/150-MIPS-pci-ar724x-remove-static-PCI-resources.patch b/target/linux/ar71xx/patches-3.3/150-MIPS-pci-ar724x-remove-static-PCI-resources.patch deleted file mode 100644 index 698b2ae0a6..0000000000 --- a/target/linux/ar71xx/patches-3.3/150-MIPS-pci-ar724x-remove-static-PCI-resources.patch +++ /dev/null @@ -1,131 +0,0 @@ -From f1c3a7dadf7b77809cda7f77df4b1ba3b24fbfa3 Mon Sep 17 00:00:00 2001 -From: Gabor Juhos <juhosg@openwrt.org> -Date: Wed, 27 Jun 2012 10:12:50 +0200 -Subject: [PATCH 11/34] MIPS: pci-ar724x: remove static PCI resources - -Get those from the platform device instead. - -Signed-off-by: Gabor Juhos <juhosg@openwrt.org> ---- - arch/mips/ath79/pci.c | 21 ++++++++++++++++++++- - arch/mips/pci/pci-ar724x.c | 40 ++++++++++++++++++++++++---------------- - 2 files changed, 44 insertions(+), 17 deletions(-) - ---- a/arch/mips/ath79/pci.c -+++ b/arch/mips/ath79/pci.c -@@ -137,10 +137,13 @@ static struct platform_device * - ath79_register_pci_ar724x(int id, - unsigned long cfg_base, - unsigned long ctrl_base, -+ unsigned long mem_base, -+ unsigned long mem_size, -+ unsigned long io_base, - int irq) - { - struct platform_device *pdev; -- struct resource res[3]; -+ struct resource res[5]; - - memset(res, 0, sizeof(res)); - -@@ -158,6 +161,16 @@ ath79_register_pci_ar724x(int id, - res[2].start = irq; - res[2].end = irq; - -+ res[3].name = "mem_base"; -+ res[3].flags = IORESOURCE_MEM; -+ res[3].start = mem_base; -+ res[3].end = mem_base + mem_size - 1; -+ -+ res[4].name = "io_base"; -+ res[4].flags = IORESOURCE_IO; -+ res[4].start = io_base; -+ res[4].end = io_base; -+ - pdev = platform_device_register_simple("ar724x-pci", id, - res, ARRAY_SIZE(res)); - return pdev; -@@ -173,6 +186,9 @@ int __init ath79_register_pci(void) - pdev = ath79_register_pci_ar724x(-1, - AR724X_PCI_CFG_BASE, - AR724X_PCI_CTRL_BASE, -+ AR724X_PCI_MEM_BASE, -+ AR724X_PCI_MEM_SIZE, -+ 0, - ATH79_CPU_IRQ_IP2); - } else if (soc_is_ar9342() || - soc_is_ar9344()) { -@@ -185,6 +201,9 @@ int __init ath79_register_pci(void) - pdev = ath79_register_pci_ar724x(-1, - AR724X_PCI_CFG_BASE, - AR724X_PCI_CTRL_BASE, -+ AR724X_PCI_MEM_BASE, -+ AR724X_PCI_MEM_SIZE, -+ 0, - ATH79_IP2_IRQ(0)); - } else { - /* No PCI support */ ---- a/arch/mips/pci/pci-ar724x.c -+++ b/arch/mips/pci/pci-ar724x.c -@@ -42,6 +42,8 @@ struct ar724x_pci_controller { - spinlock_t lock; - - struct pci_controller pci_controller; -+ struct resource io_res; -+ struct resource mem_res; - }; - - static inline bool ar724x_pci_check_link(struct ar724x_pci_controller *apc) -@@ -190,20 +192,6 @@ static struct pci_ops ar724x_pci_ops = { - .write = ar724x_pci_write, - }; - --static struct resource ar724x_io_resource = { -- .name = "PCI IO space", -- .start = 0, -- .end = 0, -- .flags = IORESOURCE_IO, --}; -- --static struct resource ar724x_mem_resource = { -- .name = "PCI memory space", -- .start = AR724X_PCI_MEM_BASE, -- .end = AR724X_PCI_MEM_BASE + AR724X_PCI_MEM_SIZE - 1, -- .flags = IORESOURCE_MEM, --}; -- - static void ar724x_pci_irq_handler(unsigned int irq, struct irq_desc *desc) - { - struct ar724x_pci_controller *apc; -@@ -331,9 +319,29 @@ static int __devinit ar724x_pci_probe(st - - spin_lock_init(&apc->lock); - -+ res = platform_get_resource_byname(pdev, IORESOURCE_IO, "io_base"); -+ if (!res) -+ return -EINVAL; -+ -+ apc->io_res.parent = res; -+ apc->io_res.name = "PCI IO space"; -+ apc->io_res.start = res->start; -+ apc->io_res.end = res->end; -+ apc->io_res.flags = IORESOURCE_IO; -+ -+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mem_base"); -+ if (!res) -+ return -EINVAL; -+ -+ apc->mem_res.parent = res; -+ apc->mem_res.name = "PCI memory space"; -+ apc->mem_res.start = res->start; -+ apc->mem_res.end = res->end; -+ apc->mem_res.flags = IORESOURCE_MEM; -+ - apc->pci_controller.pci_ops = &ar724x_pci_ops; -- apc->pci_controller.io_resource = &ar724x_io_resource; -- apc->pci_controller.mem_resource = &ar724x_mem_resource; -+ apc->pci_controller.io_resource = &apc->io_res; -+ apc->pci_controller.mem_resource = &apc->mem_res; - - apc->link_up = ar724x_pci_check_link(apc); - if (!apc->link_up) diff --git a/target/linux/ar71xx/patches-3.3/151-MIPS-pci-ar724x-use-per-controller-IRQ-base.patch b/target/linux/ar71xx/patches-3.3/151-MIPS-pci-ar724x-use-per-controller-IRQ-base.patch deleted file mode 100644 index 5b690ab3e0..0000000000 --- a/target/linux/ar71xx/patches-3.3/151-MIPS-pci-ar724x-use-per-controller-IRQ-base.patch +++ /dev/null @@ -1,110 +0,0 @@ -From d258929cd4c8c495f619f0e66d9d1c23f3f9246f Mon Sep 17 00:00:00 2001 -From: Gabor Juhos <juhosg@openwrt.org> -Date: Tue, 26 Jun 2012 11:59:45 +0200 -Subject: [PATCH 12/34] MIPS: pci-ar724x: use per-controller IRQ base - -Signed-off-by: Gabor Juhos <juhosg@openwrt.org> ---- - arch/mips/pci/pci-ar724x.c | 31 +++++++++++++++++++++---------- - 1 files changed, 21 insertions(+), 10 deletions(-) - ---- a/arch/mips/pci/pci-ar724x.c -+++ b/arch/mips/pci/pci-ar724x.c -@@ -34,6 +34,7 @@ struct ar724x_pci_controller { - void __iomem *ctrl_base; - - int irq; -+ int irq_base; - - bool link_up; - bool bar0_is_cached; -@@ -205,7 +206,7 @@ static void ar724x_pci_irq_handler(unsig - __raw_readl(base + AR724X_PCI_REG_INT_MASK); - - if (pending & AR724X_PCI_INT_DEV0) -- generic_handle_irq(ATH79_PCI_IRQ(0)); -+ generic_handle_irq(apc->irq_base + 0); - - else - spurious_interrupt(); -@@ -215,13 +216,15 @@ static void ar724x_pci_irq_unmask(struct - { - struct ar724x_pci_controller *apc; - void __iomem *base; -+ int offset; - u32 t; - - apc = irq_data_get_irq_chip_data(d); - base = apc->ctrl_base; -+ offset = apc->irq_base - d->irq; - -- switch (d->irq) { -- case ATH79_PCI_IRQ(0): -+ switch (offset) { -+ case 0: - t = __raw_readl(base + AR724X_PCI_REG_INT_MASK); - __raw_writel(t | AR724X_PCI_INT_DEV0, - base + AR724X_PCI_REG_INT_MASK); -@@ -234,13 +237,15 @@ static void ar724x_pci_irq_mask(struct i - { - struct ar724x_pci_controller *apc; - void __iomem *base; -+ int offset; - u32 t; - - apc = irq_data_get_irq_chip_data(d); - base = apc->ctrl_base; -+ offset = apc->irq_base - d->irq; - -- switch (d->irq) { -- case ATH79_PCI_IRQ(0): -+ switch (offset) { -+ case 0: - t = __raw_readl(base + AR724X_PCI_REG_INT_MASK); - __raw_writel(t & ~AR724X_PCI_INT_DEV0, - base + AR724X_PCI_REG_INT_MASK); -@@ -264,7 +269,8 @@ static struct irq_chip ar724x_pci_irq_ch - .irq_mask_ack = ar724x_pci_irq_mask, - }; - --static void __devinit ar724x_pci_irq_init(struct ar724x_pci_controller *apc) -+static void __devinit ar724x_pci_irq_init(struct ar724x_pci_controller *apc, -+ int id) - { - void __iomem *base; - int i; -@@ -274,10 +280,10 @@ static void __devinit ar724x_pci_irq_ini - __raw_writel(0, base + AR724X_PCI_REG_INT_MASK); - __raw_writel(0, base + AR724X_PCI_REG_INT_STATUS); - -- BUILD_BUG_ON(ATH79_PCI_IRQ_COUNT < AR724X_PCI_IRQ_COUNT); -+ apc->irq_base = ATH79_PCI_IRQ_BASE + (id * AR724X_PCI_IRQ_COUNT); - -- for (i = ATH79_PCI_IRQ_BASE; -- i < ATH79_PCI_IRQ_BASE + AR724X_PCI_IRQ_COUNT; i++) { -+ for (i = apc->irq_base; -+ i < apc->irq_base + AR724X_PCI_IRQ_COUNT; i++) { - irq_set_chip_and_handler(i, &ar724x_pci_irq_chip, - handle_level_irq); - irq_set_chip_data(i, apc); -@@ -291,6 +297,11 @@ static int __devinit ar724x_pci_probe(st - { - struct ar724x_pci_controller *apc; - struct resource *res; -+ int id; -+ -+ id = pdev->id; -+ if (id == -1) -+ id = 0; - - apc = devm_kzalloc(&pdev->dev, sizeof(struct ar724x_pci_controller), - GFP_KERNEL); -@@ -347,7 +358,7 @@ static int __devinit ar724x_pci_probe(st - if (!apc->link_up) - dev_warn(&pdev->dev, "PCIe link is down\n"); - -- ar724x_pci_irq_init(apc); -+ ar724x_pci_irq_init(apc, id); - - register_pci_controller(&apc->pci_controller); - diff --git a/target/linux/ar71xx/patches-3.3/152-MIPS-pci-ar724x-setup-command-register-of-the-PCI-co.patch b/target/linux/ar71xx/patches-3.3/152-MIPS-pci-ar724x-setup-command-register-of-the-PCI-co.patch deleted file mode 100644 index 38c43bccdb..0000000000 --- a/target/linux/ar71xx/patches-3.3/152-MIPS-pci-ar724x-setup-command-register-of-the-PCI-co.patch +++ /dev/null @@ -1,165 +0,0 @@ -From 93824983ceb36d4ce1f4a644031ec6fb5f332f1d Mon Sep 17 00:00:00 2001 -From: Gabor Juhos <juhosg@openwrt.org> -Date: Tue, 26 Jun 2012 15:14:47 +0200 -Subject: [PATCH 13/34] MIPS: pci-ar724x: setup command register of the PCI controller - -Signed-off-by: Gabor Juhos <juhosg@openwrt.org> ---- - arch/mips/ath79/pci.c | 10 +++- - arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 2 + - arch/mips/pci/pci-ar724x.c | 63 ++++++++++++++++++++++++ - 3 files changed, 74 insertions(+), 1 deletions(-) - ---- a/arch/mips/ath79/pci.c -+++ b/arch/mips/ath79/pci.c -@@ -137,13 +137,14 @@ static struct platform_device * - ath79_register_pci_ar724x(int id, - unsigned long cfg_base, - unsigned long ctrl_base, -+ unsigned long crp_base, - unsigned long mem_base, - unsigned long mem_size, - unsigned long io_base, - int irq) - { - struct platform_device *pdev; -- struct resource res[5]; -+ struct resource res[6]; - - memset(res, 0, sizeof(res)); - -@@ -171,6 +172,11 @@ ath79_register_pci_ar724x(int id, - res[4].start = io_base; - res[4].end = io_base; - -+ res[5].name = "crp_base"; -+ res[5].flags = IORESOURCE_MEM; -+ res[5].start = crp_base; -+ res[5].end = crp_base + AR724X_PCI_CRP_SIZE - 1; -+ - pdev = platform_device_register_simple("ar724x-pci", id, - res, ARRAY_SIZE(res)); - return pdev; -@@ -186,6 +192,7 @@ int __init ath79_register_pci(void) - pdev = ath79_register_pci_ar724x(-1, - AR724X_PCI_CFG_BASE, - AR724X_PCI_CTRL_BASE, -+ AR724X_PCI_CRP_BASE, - AR724X_PCI_MEM_BASE, - AR724X_PCI_MEM_SIZE, - 0, -@@ -201,6 +208,7 @@ int __init ath79_register_pci(void) - pdev = ath79_register_pci_ar724x(-1, - AR724X_PCI_CFG_BASE, - AR724X_PCI_CTRL_BASE, -+ AR724X_PCI_CRP_BASE, - AR724X_PCI_MEM_BASE, - AR724X_PCI_MEM_SIZE, - 0, ---- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -@@ -67,6 +67,8 @@ - - #define AR724X_PCI_CFG_BASE 0x14000000 - #define AR724X_PCI_CFG_SIZE 0x1000 -+#define AR724X_PCI_CRP_BASE (AR71XX_APB_BASE + 0x000c0000) -+#define AR724X_PCI_CRP_SIZE 0x1000 - #define AR724X_PCI_CTRL_BASE (AR71XX_APB_BASE + 0x000f0000) - #define AR724X_PCI_CTRL_SIZE 0x100 - ---- a/arch/mips/pci/pci-ar724x.c -+++ b/arch/mips/pci/pci-ar724x.c -@@ -29,9 +29,17 @@ - - #define AR7240_BAR0_WAR_VALUE 0xffff - -+#define AR724X_PCI_CMD_INIT (PCI_COMMAND_MEMORY | \ -+ PCI_COMMAND_MASTER | \ -+ PCI_COMMAND_INVALIDATE | \ -+ PCI_COMMAND_PARITY | \ -+ PCI_COMMAND_SERR | \ -+ PCI_COMMAND_FAST_BACK) -+ - struct ar724x_pci_controller { - void __iomem *devcfg_base; - void __iomem *ctrl_base; -+ void __iomem *crp_base; - - int irq; - int irq_base; -@@ -64,6 +72,51 @@ pci_bus_to_ar724x_controller(struct pci_ - return container_of(hose, struct ar724x_pci_controller, pci_controller); - } - -+static int ar724x_pci_local_write(struct ar724x_pci_controller *apc, -+ int where, int size, u32 value) -+{ -+ unsigned long flags; -+ void __iomem *base; -+ u32 data; -+ int s; -+ -+ WARN_ON(where & (size - 1)); -+ -+ if (!apc->link_up) -+ return PCIBIOS_DEVICE_NOT_FOUND; -+ -+ base = apc->crp_base; -+ -+ spin_lock_irqsave(&apc->lock, flags); -+ data = __raw_readl(base + (where & ~3)); -+ -+ switch (size) { -+ case 1: -+ s = ((where & 3) * 8); -+ data &= ~(0xff << s); -+ data |= ((value & 0xff) << s); -+ break; -+ case 2: -+ s = ((where & 2) * 8); -+ data &= ~(0xffff << s); -+ data |= ((value & 0xffff) << s); -+ break; -+ case 4: -+ data = value; -+ break; -+ default: -+ spin_unlock_irqrestore(&apc->lock, flags); -+ return PCIBIOS_BAD_REGISTER_NUMBER; -+ } -+ -+ __raw_writel(data, base + (where & ~3)); -+ /* flush write */ -+ __raw_readl(base + (where & ~3)); -+ spin_unlock_irqrestore(&apc->lock, flags); -+ -+ return PCIBIOS_SUCCESSFUL; -+} -+ - static int ar724x_pci_read(struct pci_bus *bus, unsigned int devfn, int where, - int size, uint32_t *value) - { -@@ -324,6 +377,14 @@ static int __devinit ar724x_pci_probe(st - if (!apc->devcfg_base) - return -EBUSY; - -+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "crp_base"); -+ if (!res) -+ return -EINVAL; -+ -+ apc->crp_base = devm_request_and_ioremap(&pdev->dev, res); -+ if (apc->crp_base == NULL) -+ return -EBUSY; -+ - apc->irq = platform_get_irq(pdev, 0); - if (apc->irq < 0) - return -EINVAL; -@@ -360,6 +421,8 @@ static int __devinit ar724x_pci_probe(st - - ar724x_pci_irq_init(apc, id); - -+ ar724x_pci_local_write(apc, PCI_COMMAND, 4, AR724X_PCI_CMD_INIT); -+ - register_pci_controller(&apc->pci_controller); - - return 0; diff --git a/target/linux/ar71xx/patches-3.3/153-MIPS-pci-ar71xx-use-dynamically-allocated-PCI-contro.patch b/target/linux/ar71xx/patches-3.3/153-MIPS-pci-ar71xx-use-dynamically-allocated-PCI-contro.patch deleted file mode 100644 index 4db1fd92b3..0000000000 --- a/target/linux/ar71xx/patches-3.3/153-MIPS-pci-ar71xx-use-dynamically-allocated-PCI-contro.patch +++ /dev/null @@ -1,228 +0,0 @@ -From 6c3ef689e4364dca74eaaecd72384be09e5a6bc8 Mon Sep 17 00:00:00 2001 -From: Gabor Juhos <juhosg@openwrt.org> -Date: Mon, 25 Jun 2012 09:19:08 +0200 -Subject: [PATCH 14/34] MIPS: pci-ar71xx: use dynamically allocated PCI controller structure - -Signed-off-by: Gabor Juhos <juhosg@openwrt.org> ---- - arch/mips/pci/pci-ar71xx.c | 84 +++++++++++++++++++++++++++---------------- - 1 files changed, 53 insertions(+), 31 deletions(-) - ---- a/arch/mips/pci/pci-ar71xx.c -+++ b/arch/mips/pci/pci-ar71xx.c -@@ -20,6 +20,7 @@ - #include <linux/interrupt.h> - #include <linux/module.h> - #include <linux/platform_device.h> -+#include <linux/slab.h> - - #include <asm/mach-ath79/ar71xx_regs.h> - #include <asm/mach-ath79/ath79.h> -@@ -48,8 +49,12 @@ - - #define AR71XX_PCI_IRQ_COUNT 5 - --static DEFINE_SPINLOCK(ar71xx_pci_lock); --static void __iomem *ar71xx_pcicfg_base; -+struct ar71xx_pci_controller { -+ void __iomem *cfg_base; -+ spinlock_t lock; -+ int irq; -+ struct pci_controller pci_ctrl; -+}; - - /* Byte lane enable bits */ - static const u8 ar71xx_pci_ble_table[4][4] = { -@@ -92,9 +97,18 @@ static inline u32 ar71xx_pci_bus_addr(st - return ret; - } - --static int ar71xx_pci_check_error(int quiet) -+static inline struct ar71xx_pci_controller * -+pci_bus_to_ar71xx_controller(struct pci_bus *bus) - { -- void __iomem *base = ar71xx_pcicfg_base; -+ struct pci_controller *hose; -+ -+ hose = (struct pci_controller *) bus->sysdata; -+ return container_of(hose, struct ar71xx_pci_controller, pci_ctrl); -+} -+ -+static int ar71xx_pci_check_error(struct ar71xx_pci_controller *apc, int quiet) -+{ -+ void __iomem *base = apc->cfg_base; - u32 pci_err; - u32 ahb_err; - -@@ -129,9 +143,10 @@ static int ar71xx_pci_check_error(int qu - return !!(ahb_err | pci_err); - } - --static inline void ar71xx_pci_local_write(int where, int size, u32 value) -+static inline void ar71xx_pci_local_write(struct ar71xx_pci_controller *apc, -+ int where, int size, u32 value) - { -- void __iomem *base = ar71xx_pcicfg_base; -+ void __iomem *base = apc->cfg_base; - u32 ad_cbe; - - value = value << (8 * (where & 3)); -@@ -147,7 +162,8 @@ static inline int ar71xx_pci_set_cfgaddr - unsigned int devfn, - int where, int size, u32 cmd) - { -- void __iomem *base = ar71xx_pcicfg_base; -+ struct ar71xx_pci_controller *apc = pci_bus_to_ar71xx_controller(bus); -+ void __iomem *base = apc->cfg_base; - u32 addr; - - addr = ar71xx_pci_bus_addr(bus, devfn, where); -@@ -156,13 +172,14 @@ static inline int ar71xx_pci_set_cfgaddr - __raw_writel(cmd | ar71xx_pci_get_ble(where, size, 0), - base + AR71XX_PCI_REG_CFG_CBE); - -- return ar71xx_pci_check_error(1); -+ return ar71xx_pci_check_error(apc, 1); - } - - static int ar71xx_pci_read_config(struct pci_bus *bus, unsigned int devfn, - int where, int size, u32 *value) - { -- void __iomem *base = ar71xx_pcicfg_base; -+ struct ar71xx_pci_controller *apc = pci_bus_to_ar71xx_controller(bus); -+ void __iomem *base = apc->cfg_base; - unsigned long flags; - u32 data; - int err; -@@ -171,7 +188,7 @@ static int ar71xx_pci_read_config(struct - ret = PCIBIOS_SUCCESSFUL; - data = ~0; - -- spin_lock_irqsave(&ar71xx_pci_lock, flags); -+ spin_lock_irqsave(&apc->lock, flags); - - err = ar71xx_pci_set_cfgaddr(bus, devfn, where, size, - AR71XX_PCI_CFG_CMD_READ); -@@ -180,7 +197,7 @@ static int ar71xx_pci_read_config(struct - else - data = __raw_readl(base + AR71XX_PCI_REG_CFG_RDDATA); - -- spin_unlock_irqrestore(&ar71xx_pci_lock, flags); -+ spin_unlock_irqrestore(&apc->lock, flags); - - *value = (data >> (8 * (where & 3))) & ar71xx_pci_read_mask[size & 7]; - -@@ -190,7 +207,8 @@ static int ar71xx_pci_read_config(struct - static int ar71xx_pci_write_config(struct pci_bus *bus, unsigned int devfn, - int where, int size, u32 value) - { -- void __iomem *base = ar71xx_pcicfg_base; -+ struct ar71xx_pci_controller *apc = pci_bus_to_ar71xx_controller(bus); -+ void __iomem *base = apc->cfg_base; - unsigned long flags; - int err; - int ret; -@@ -198,7 +216,7 @@ static int ar71xx_pci_write_config(struc - value = value << (8 * (where & 3)); - ret = PCIBIOS_SUCCESSFUL; - -- spin_lock_irqsave(&ar71xx_pci_lock, flags); -+ spin_lock_irqsave(&apc->lock, flags); - - err = ar71xx_pci_set_cfgaddr(bus, devfn, where, size, - AR71XX_PCI_CFG_CMD_WRITE); -@@ -207,7 +225,7 @@ static int ar71xx_pci_write_config(struc - else - __raw_writel(value, base + AR71XX_PCI_REG_CFG_WRDATA); - -- spin_unlock_irqrestore(&ar71xx_pci_lock, flags); -+ spin_unlock_irqrestore(&apc->lock, flags); - - return ret; - } -@@ -231,12 +249,6 @@ static struct resource ar71xx_pci_mem_re - .flags = IORESOURCE_MEM - }; - --static struct pci_controller ar71xx_pci_controller = { -- .pci_ops = &ar71xx_pci_ops, -- .mem_resource = &ar71xx_pci_mem_resource, -- .io_resource = &ar71xx_pci_io_resource, --}; -- - static void ar71xx_pci_irq_handler(unsigned int irq, struct irq_desc *desc) - { - void __iomem *base = ath79_reset_base; -@@ -294,7 +306,7 @@ static struct irq_chip ar71xx_pci_irq_ch - .irq_mask_ack = ar71xx_pci_irq_mask, - }; - --static __devinit void ar71xx_pci_irq_init(int irq) -+static __devinit void ar71xx_pci_irq_init(struct ar71xx_pci_controller *apc) - { - void __iomem *base = ath79_reset_base; - int i; -@@ -309,7 +321,7 @@ static __devinit void ar71xx_pci_irq_ini - irq_set_chip_and_handler(i, &ar71xx_pci_irq_chip, - handle_level_irq); - -- irq_set_chained_handler(irq, ar71xx_pci_irq_handler); -+ irq_set_chained_handler(apc->irq, ar71xx_pci_irq_handler); - } - - static __devinit void ar71xx_pci_reset(void) -@@ -336,20 +348,26 @@ static __devinit void ar71xx_pci_reset(v - - static int __devinit ar71xx_pci_probe(struct platform_device *pdev) - { -+ struct ar71xx_pci_controller *apc; - struct resource *res; -- int irq; - u32 t; - -+ apc = kzalloc(sizeof(struct ar71xx_pci_controller), GFP_KERNEL); -+ if (!apc) -+ return -ENOMEM; -+ -+ spin_lock_init(&apc->lock); -+ - res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "cfg_base"); - if (!res) - return -EINVAL; - -- ar71xx_pcicfg_base = devm_request_and_ioremap(&pdev->dev, res); -- if (!ar71xx_pcicfg_base) -+ apc->cfg_base = devm_request_and_ioremap(&pdev->dev, res); -+ if (!apc->cfg_base) - return -ENOMEM; - -- irq = platform_get_irq(pdev, 0); -- if (irq < 0) -+ apc->irq = platform_get_irq(pdev, 0); -+ if (apc->irq < 0) - return -EINVAL; - - ar71xx_pci_reset(); -@@ -357,14 +375,18 @@ static int __devinit ar71xx_pci_probe(st - /* setup COMMAND register */ - t = PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | PCI_COMMAND_INVALIDATE - | PCI_COMMAND_PARITY | PCI_COMMAND_SERR | PCI_COMMAND_FAST_BACK; -- ar71xx_pci_local_write(PCI_COMMAND, 4, t); -+ ar71xx_pci_local_write(apc, PCI_COMMAND, 4, t); - - /* clear bus errors */ -- ar71xx_pci_check_error(1); -+ ar71xx_pci_check_error(apc, 1); -+ -+ ar71xx_pci_irq_init(apc); - -- ar71xx_pci_irq_init(irq); -+ apc->pci_ctrl.pci_ops = &ar71xx_pci_ops; -+ apc->pci_ctrl.mem_resource = &ar71xx_pci_mem_resource; -+ apc->pci_ctrl.io_resource = &ar71xx_pci_io_resource; - -- register_pci_controller(&ar71xx_pci_controller); -+ register_pci_controller(&apc->pci_ctrl); - - return 0; - } diff --git a/target/linux/ar71xx/patches-3.3/154-MIPS-pci-ar71xx-remove-static-PCI-controller-resourc.patch b/target/linux/ar71xx/patches-3.3/154-MIPS-pci-ar71xx-remove-static-PCI-controller-resourc.patch deleted file mode 100644 index d31ba264bd..0000000000 --- a/target/linux/ar71xx/patches-3.3/154-MIPS-pci-ar71xx-remove-static-PCI-controller-resourc.patch +++ /dev/null @@ -1,70 +0,0 @@ -From 7dc3ccb5dc972b06c41b309653d132beaaedeb37 Mon Sep 17 00:00:00 2001 -From: Gabor Juhos <juhosg@openwrt.org> -Date: Mon, 25 Jun 2012 09:52:23 +0200 -Subject: [PATCH 15/34] MIPS: pci-ar71xx: remove static PCI controller resources - -Signed-off-by: Gabor Juhos <juhosg@openwrt.org> ---- - arch/mips/pci/pci-ar71xx.c | 30 ++++++++++++++---------------- - 1 files changed, 14 insertions(+), 16 deletions(-) - ---- a/arch/mips/pci/pci-ar71xx.c -+++ b/arch/mips/pci/pci-ar71xx.c -@@ -54,6 +54,8 @@ struct ar71xx_pci_controller { - spinlock_t lock; - int irq; - struct pci_controller pci_ctrl; -+ struct resource io_res; -+ struct resource mem_res; - }; - - /* Byte lane enable bits */ -@@ -235,20 +237,6 @@ static struct pci_ops ar71xx_pci_ops = { - .write = ar71xx_pci_write_config, - }; - --static struct resource ar71xx_pci_io_resource = { -- .name = "PCI IO space", -- .start = 0, -- .end = 0, -- .flags = IORESOURCE_IO, --}; -- --static struct resource ar71xx_pci_mem_resource = { -- .name = "PCI memory space", -- .start = AR71XX_PCI_MEM_BASE, -- .end = AR71XX_PCI_MEM_BASE + AR71XX_PCI_MEM_SIZE - 1, -- .flags = IORESOURCE_MEM --}; -- - static void ar71xx_pci_irq_handler(unsigned int irq, struct irq_desc *desc) - { - void __iomem *base = ath79_reset_base; -@@ -370,6 +358,16 @@ static int __devinit ar71xx_pci_probe(st - if (apc->irq < 0) - return -EINVAL; - -+ apc->io_res.name = "PCI IO space"; -+ apc->io_res.start = 0; -+ apc->io_res.end = 0; -+ apc->io_res.flags = IORESOURCE_IO; -+ -+ apc->mem_res.name = "PCI memory space"; -+ apc->mem_res.start = AR71XX_PCI_MEM_BASE; -+ apc->mem_res.end = AR71XX_PCI_MEM_BASE + AR71XX_PCI_MEM_SIZE - 1; -+ apc->mem_res.flags = IORESOURCE_MEM; -+ - ar71xx_pci_reset(); - - /* setup COMMAND register */ -@@ -383,8 +381,8 @@ static int __devinit ar71xx_pci_probe(st - ar71xx_pci_irq_init(apc); - - apc->pci_ctrl.pci_ops = &ar71xx_pci_ops; -- apc->pci_ctrl.mem_resource = &ar71xx_pci_mem_resource; -- apc->pci_ctrl.io_resource = &ar71xx_pci_io_resource; -+ apc->pci_ctrl.mem_resource = &apc->mem_res; -+ apc->pci_ctrl.io_resource = &apc->io_res; - - register_pci_controller(&apc->pci_ctrl); - diff --git a/target/linux/ar71xx/patches-3.3/160-MIPS-ath79-add-early-printk-support-for-the-QCA955X-.patch b/target/linux/ar71xx/patches-3.3/160-MIPS-ath79-add-early-printk-support-for-the-QCA955X-.patch deleted file mode 100644 index 7f1f2302f9..0000000000 --- a/target/linux/ar71xx/patches-3.3/160-MIPS-ath79-add-early-printk-support-for-the-QCA955X-.patch +++ /dev/null @@ -1,31 +0,0 @@ -From 114df1e368b8503de1fe63e97d6eea521eecfbe4 Mon Sep 17 00:00:00 2001 -From: Gabor Juhos <juhosg@openwrt.org> -Date: Sun, 24 Jun 2012 13:40:38 +0200 -Subject: [PATCH 16/34] MIPS: ath79: add early printk support for the QCA955X SoCs - -Signed-off-by: Gabor Juhos <juhosg@openwrt.org> ---- - arch/mips/ath79/early_printk.c | 1 + - arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 1 + - 2 files changed, 2 insertions(+), 0 deletions(-) - ---- a/arch/mips/ath79/early_printk.c -+++ b/arch/mips/ath79/early_printk.c -@@ -74,6 +74,7 @@ static void prom_putchar_init(void) - case REV_ID_MAJOR_AR9341: - case REV_ID_MAJOR_AR9342: - case REV_ID_MAJOR_AR9344: -+ case REV_ID_MAJOR_QCA9558: - _prom_putchar = prom_putchar_ar71xx; - break; - ---- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -@@ -370,6 +370,7 @@ - #define REV_ID_MAJOR_AR9341 0x0120 - #define REV_ID_MAJOR_AR9342 0x1120 - #define REV_ID_MAJOR_AR9344 0x2120 -+#define REV_ID_MAJOR_QCA9558 0x1130 - - #define AR71XX_REV_ID_MINOR_MASK 0x3 - #define AR71XX_REV_ID_MINOR_AR7130 0x0 diff --git a/target/linux/ar71xx/patches-3.3/161-MIPS-ath79-add-SoC-detection-code-for-the-QCA9558-So.patch b/target/linux/ar71xx/patches-3.3/161-MIPS-ath79-add-SoC-detection-code-for-the-QCA9558-So.patch deleted file mode 100644 index 1d9dd4beb4..0000000000 --- a/target/linux/ar71xx/patches-3.3/161-MIPS-ath79-add-SoC-detection-code-for-the-QCA9558-So.patch +++ /dev/null @@ -1,91 +0,0 @@ -From 3c3c0eccf63b12fea98fd0eb65d0ccf69a7c5a57 Mon Sep 17 00:00:00 2001 -From: Gabor Juhos <juhosg@openwrt.org> -Date: Sun, 24 Jun 2012 13:42:16 +0200 -Subject: [PATCH 17/34] MIPS: ath79: add SoC detection code for the QCA9558 SoC - -Signed-off-by: Gabor Juhos <juhosg@openwrt.org> ---- - arch/mips/ath79/Kconfig | 4 ++++ - arch/mips/ath79/setup.c | 12 +++++++++++- - arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 2 ++ - arch/mips/include/asm/mach-ath79/ath79.h | 11 +++++++++++ - 4 files changed, 28 insertions(+), 1 deletions(-) - ---- a/arch/mips/ath79/Kconfig -+++ b/arch/mips/ath79/Kconfig -@@ -88,6 +88,10 @@ config SOC_AR934X - select PCI_AR724X if PCI - def_bool n - -+config SOC_QCA955X -+ select USB_ARCH_HAS_EHCI -+ def_bool n -+ - config PCI_AR724X - def_bool n - ---- a/arch/mips/ath79/setup.c -+++ b/arch/mips/ath79/setup.c -@@ -164,13 +164,23 @@ static void __init ath79_detect_sys_type - rev = id & AR934X_REV_ID_REVISION_MASK; - break; - -+ case REV_ID_MAJOR_QCA9558: -+ ath79_soc = ATH79_SOC_QCA9558; -+ chip = "9558"; -+ rev = id & AR944X_REV_ID_REVISION_MASK; -+ break; -+ - default: - panic("ath79: unknown SoC, id:0x%08x", id); - } - - ath79_soc_rev = rev; - -- sprintf(ath79_sys_type, "Atheros AR%s rev %u", chip, rev); -+ if (soc_is_qca955x()) -+ sprintf(ath79_sys_type, "Qualcomm Atheros QCA%s rev %u", -+ chip, rev); -+ else -+ sprintf(ath79_sys_type, "Atheros AR%s rev %u", chip, rev); - pr_info("SoC: %s\n", ath79_sys_type); - } - ---- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -@@ -391,6 +391,8 @@ - - #define AR934X_REV_ID_REVISION_MASK 0xf - -+#define AR944X_REV_ID_REVISION_MASK 0xf -+ - /* - * SPI block - */ ---- a/arch/mips/include/asm/mach-ath79/ath79.h -+++ b/arch/mips/include/asm/mach-ath79/ath79.h -@@ -32,6 +32,7 @@ enum ath79_soc_type { - ATH79_SOC_AR9341, - ATH79_SOC_AR9342, - ATH79_SOC_AR9344, -+ ATH79_SOC_QCA9558, - }; - - extern enum ath79_soc_type ath79_soc; -@@ -98,6 +99,16 @@ static inline int soc_is_ar934x(void) - return soc_is_ar9341() || soc_is_ar9342() || soc_is_ar9344(); - } - -+static inline int soc_is_qca9558(void) -+{ -+ return ath79_soc == ATH79_SOC_QCA9558; -+} -+ -+static inline int soc_is_qca955x(void) -+{ -+ return soc_is_qca9558(); -+} -+ - extern void __iomem *ath79_ddr_base; - extern void __iomem *ath79_pll_base; - extern void __iomem *ath79_reset_base; diff --git a/target/linux/ar71xx/patches-3.3/162-MIPS-ath79-add-clock-setup-for-the-QCA955X-SoCs.patch b/target/linux/ar71xx/patches-3.3/162-MIPS-ath79-add-clock-setup-for-the-QCA955X-SoCs.patch deleted file mode 100644 index bb0924c430..0000000000 --- a/target/linux/ar71xx/patches-3.3/162-MIPS-ath79-add-clock-setup-for-the-QCA955X-SoCs.patch +++ /dev/null @@ -1,167 +0,0 @@ -From f465a16766a015a31d4e83af1ad62cc718d64f5a Mon Sep 17 00:00:00 2001 -From: Gabor Juhos <juhosg@openwrt.org> -Date: Sun, 24 Jun 2012 13:43:08 +0200 -Subject: [PATCH 18/34] MIPS: ath79: add clock setup for the QCA955X SoCs - -Signed-off-by: Gabor Juhos <juhosg@openwrt.org> ---- - arch/mips/ath79/clock.c | 78 ++++++++++++++++++++++++ - arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 39 ++++++++++++ - 2 files changed, 117 insertions(+), 0 deletions(-) - ---- a/arch/mips/ath79/clock.c -+++ b/arch/mips/ath79/clock.c -@@ -295,6 +295,82 @@ static void __init ar934x_clocks_init(vo - iounmap(dpll_base); - } - -+static void __init qca955x_clocks_init(void) -+{ -+ u32 pll, out_div, ref_div, nint, frac, clk_ctrl, postdiv; -+ u32 cpu_pll, ddr_pll; -+ u32 bootstrap; -+ -+ bootstrap = ath79_reset_rr(QCA955X_RESET_REG_BOOTSTRAP); -+ if (bootstrap & QCA955X_BOOTSTRAP_REF_CLK_40) -+ ath79_ref_clk.rate = 40 * 1000 * 1000; -+ else -+ ath79_ref_clk.rate = 25 * 1000 * 1000; -+ -+ pll = ath79_pll_rr(QCA955X_PLL_CPU_CONFIG_REG); -+ out_div = (pll >> QCA955X_PLL_CPU_CONFIG_OUTDIV_SHIFT) & -+ QCA955X_PLL_CPU_CONFIG_OUTDIV_MASK; -+ ref_div = (pll >> QCA955X_PLL_CPU_CONFIG_REFDIV_SHIFT) & -+ QCA955X_PLL_CPU_CONFIG_REFDIV_MASK; -+ nint = (pll >> QCA955X_PLL_CPU_CONFIG_NINT_SHIFT) & -+ QCA955X_PLL_CPU_CONFIG_NINT_MASK; -+ frac = (pll >> QCA955X_PLL_CPU_CONFIG_NFRAC_SHIFT) & -+ QCA955X_PLL_CPU_CONFIG_NFRAC_MASK; -+ -+ cpu_pll = nint * ath79_ref_clk.rate / ref_div; -+ cpu_pll += frac * ath79_ref_clk.rate / (ref_div * (1 << 6)); -+ cpu_pll /= (1 << out_div); -+ -+ pll = ath79_pll_rr(QCA955X_PLL_DDR_CONFIG_REG); -+ out_div = (pll >> QCA955X_PLL_DDR_CONFIG_OUTDIV_SHIFT) & -+ QCA955X_PLL_DDR_CONFIG_OUTDIV_MASK; -+ ref_div = (pll >> QCA955X_PLL_DDR_CONFIG_REFDIV_SHIFT) & -+ QCA955X_PLL_DDR_CONFIG_REFDIV_MASK; -+ nint = (pll >> QCA955X_PLL_DDR_CONFIG_NINT_SHIFT) & -+ QCA955X_PLL_DDR_CONFIG_NINT_MASK; -+ frac = (pll >> QCA955X_PLL_DDR_CONFIG_NFRAC_SHIFT) & -+ QCA955X_PLL_DDR_CONFIG_NFRAC_MASK; -+ -+ ddr_pll = nint * ath79_ref_clk.rate / ref_div; -+ ddr_pll += frac * ath79_ref_clk.rate / (ref_div * (1 << 10)); -+ ddr_pll /= (1 << out_div); -+ -+ clk_ctrl = ath79_pll_rr(QCA955X_PLL_CLK_CTRL_REG); -+ -+ postdiv = (clk_ctrl >> QCA955X_PLL_CLK_CTRL_CPU_POST_DIV_SHIFT) & -+ QCA955X_PLL_CLK_CTRL_CPU_POST_DIV_MASK; -+ -+ if (clk_ctrl & QCA955X_PLL_CLK_CTRL_CPU_PLL_BYPASS) -+ ath79_cpu_clk.rate = ath79_ref_clk.rate; -+ else if (clk_ctrl & QCA955X_PLL_CLK_CTRL_CPUCLK_FROM_CPUPLL) -+ ath79_cpu_clk.rate = ddr_pll / (postdiv + 1); -+ else -+ ath79_cpu_clk.rate = cpu_pll / (postdiv + 1); -+ -+ postdiv = (clk_ctrl >> QCA955X_PLL_CLK_CTRL_DDR_POST_DIV_SHIFT) & -+ QCA955X_PLL_CLK_CTRL_DDR_POST_DIV_MASK; -+ -+ if (clk_ctrl & QCA955X_PLL_CLK_CTRL_DDR_PLL_BYPASS) -+ ath79_ddr_clk.rate = ath79_ref_clk.rate; -+ else if (clk_ctrl & QCA955X_PLL_CLK_CTRL_DDRCLK_FROM_DDRPLL) -+ ath79_ddr_clk.rate = cpu_pll / (postdiv + 1); -+ else -+ ath79_ddr_clk.rate = ddr_pll / (postdiv + 1); -+ -+ postdiv = (clk_ctrl >> QCA955X_PLL_CLK_CTRL_AHB_POST_DIV_SHIFT) & -+ QCA955X_PLL_CLK_CTRL_AHB_POST_DIV_MASK; -+ -+ if (clk_ctrl & QCA955X_PLL_CLK_CTRL_AHB_PLL_BYPASS) -+ ath79_ahb_clk.rate = ath79_ref_clk.rate; -+ else if (clk_ctrl & QCA955X_PLL_CLK_CTRL_AHBCLK_FROM_DDRPLL) -+ ath79_ahb_clk.rate = ddr_pll / (postdiv + 1); -+ else -+ ath79_ahb_clk.rate = cpu_pll / (postdiv + 1); -+ -+ ath79_wdt_clk.rate = ath79_ref_clk.rate; -+ ath79_uart_clk.rate = ath79_ref_clk.rate; -+} -+ - void __init ath79_clocks_init(void) - { - if (soc_is_ar71xx()) -@@ -307,6 +383,8 @@ void __init ath79_clocks_init(void) - ar933x_clocks_init(); - else if (soc_is_ar934x()) - ar934x_clocks_init(); -+ else if (soc_is_qca955x()) -+ qca955x_clocks_init(); - else - BUG(); - ---- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -@@ -225,6 +225,41 @@ - #define AR934X_PLL_CPU_DDR_CLK_CTRL_DDRCLK_FROM_DDRPLL BIT(21) - #define AR934X_PLL_CPU_DDR_CLK_CTRL_AHBCLK_FROM_DDRPLL BIT(24) - -+#define QCA955X_PLL_CPU_CONFIG_REG 0x00 -+#define QCA955X_PLL_DDR_CONFIG_REG 0x04 -+#define QCA955X_PLL_CLK_CTRL_REG 0x08 -+ -+#define QCA955X_PLL_CPU_CONFIG_NFRAC_SHIFT 0 -+#define QCA955X_PLL_CPU_CONFIG_NFRAC_MASK 0x3f -+#define QCA955X_PLL_CPU_CONFIG_NINT_SHIFT 6 -+#define QCA955X_PLL_CPU_CONFIG_NINT_MASK 0x3f -+#define QCA955X_PLL_CPU_CONFIG_REFDIV_SHIFT 12 -+#define QCA955X_PLL_CPU_CONFIG_REFDIV_MASK 0x1f -+#define QCA955X_PLL_CPU_CONFIG_OUTDIV_SHIFT 19 -+#define QCA955X_PLL_CPU_CONFIG_OUTDIV_MASK 0x3 -+ -+#define QCA955X_PLL_DDR_CONFIG_NFRAC_SHIFT 0 -+#define QCA955X_PLL_DDR_CONFIG_NFRAC_MASK 0x3ff -+#define QCA955X_PLL_DDR_CONFIG_NINT_SHIFT 10 -+#define QCA955X_PLL_DDR_CONFIG_NINT_MASK 0x3f -+#define QCA955X_PLL_DDR_CONFIG_REFDIV_SHIFT 16 -+#define QCA955X_PLL_DDR_CONFIG_REFDIV_MASK 0x1f -+#define QCA955X_PLL_DDR_CONFIG_OUTDIV_SHIFT 23 -+#define QCA955X_PLL_DDR_CONFIG_OUTDIV_MASK 0x7 -+ -+#define QCA955X_PLL_CLK_CTRL_CPU_PLL_BYPASS BIT(2) -+#define QCA955X_PLL_CLK_CTRL_DDR_PLL_BYPASS BIT(3) -+#define QCA955X_PLL_CLK_CTRL_AHB_PLL_BYPASS BIT(4) -+#define QCA955X_PLL_CLK_CTRL_CPU_POST_DIV_SHIFT 5 -+#define QCA955X_PLL_CLK_CTRL_CPU_POST_DIV_MASK 0x1f -+#define QCA955X_PLL_CLK_CTRL_DDR_POST_DIV_SHIFT 10 -+#define QCA955X_PLL_CLK_CTRL_DDR_POST_DIV_MASK 0x1f -+#define QCA955X_PLL_CLK_CTRL_AHB_POST_DIV_SHIFT 15 -+#define QCA955X_PLL_CLK_CTRL_AHB_POST_DIV_MASK 0x1f -+#define QCA955X_PLL_CLK_CTRL_CPUCLK_FROM_CPUPLL BIT(20) -+#define QCA955X_PLL_CLK_CTRL_DDRCLK_FROM_DDRPLL BIT(21) -+#define QCA955X_PLL_CLK_CTRL_AHBCLK_FROM_DDRPLL BIT(24) -+ - /* - * USB_CONFIG block - */ -@@ -264,6 +299,8 @@ - #define AR934X_RESET_REG_BOOTSTRAP 0xb0 - #define AR934X_RESET_REG_PCIE_WMAC_INT_STATUS 0xac - -+#define QCA955X_RESET_REG_BOOTSTRAP 0xb0 -+ - #define MISC_INT_ETHSW BIT(12) - #define MISC_INT_TIMER4 BIT(10) - #define MISC_INT_TIMER3 BIT(9) -@@ -341,6 +378,8 @@ - #define AR934X_BOOTSTRAP_SDRAM_DISABLED BIT(1) - #define AR934X_BOOTSTRAP_DDR1 BIT(0) - -+#define QCA955X_BOOTSTRAP_REF_CLK_40 BIT(4) -+ - #define AR934X_PCIE_WMAC_INT_WMAC_MISC BIT(0) - #define AR934X_PCIE_WMAC_INT_WMAC_TX BIT(1) - #define AR934X_PCIE_WMAC_INT_WMAC_RXLP BIT(2) diff --git a/target/linux/ar71xx/patches-3.3/163-MIPS-ath79-add-IRQ-handling-code-for-the-QCA955X-SoC.patch b/target/linux/ar71xx/patches-3.3/163-MIPS-ath79-add-IRQ-handling-code-for-the-QCA955X-SoC.patch deleted file mode 100644 index 8d24c742d3..0000000000 --- a/target/linux/ar71xx/patches-3.3/163-MIPS-ath79-add-IRQ-handling-code-for-the-QCA955X-SoC.patch +++ /dev/null @@ -1,239 +0,0 @@ -From 5d0de52f8e36916485a61b820916b71b5d918e6f Mon Sep 17 00:00:00 2001 -From: Gabor Juhos <juhosg@openwrt.org> -Date: Sun, 24 Jun 2012 13:44:23 +0200 -Subject: [PATCH 19/34] MIPS: ath79: add IRQ handling code for the QCA955X SoCs - -Signed-off-by: Gabor Juhos <juhosg@openwrt.org> ---- - arch/mips/ath79/irq.c | 110 ++++++++++++++++++++++-- - arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 32 +++++++ - arch/mips/include/asm/mach-ath79/irq.h | 9 ++- - 3 files changed, 142 insertions(+), 9 deletions(-) - ---- a/arch/mips/ath79/irq.c -+++ b/arch/mips/ath79/irq.c -@@ -130,7 +130,10 @@ static void __init ath79_misc_irq_init(v - - if (soc_is_ar71xx() || soc_is_ar913x()) - ath79_misc_irq_chip.irq_mask_ack = ar71xx_misc_irq_mask; -- else if (soc_is_ar724x() || soc_is_ar933x() || soc_is_ar934x()) -+ else if (soc_is_ar724x() || -+ soc_is_ar933x() || -+ soc_is_ar934x() || -+ soc_is_qca955x()) - ath79_misc_irq_chip.irq_ack = ar724x_misc_irq_ack; - else - BUG(); -@@ -177,6 +180,88 @@ static void ar934x_ip2_irq_init(void) - irq_set_chained_handler(ATH79_CPU_IRQ_IP2, ar934x_ip2_irq_dispatch); - } - -+static void qca955x_ip2_irq_dispatch(unsigned int irq, struct irq_desc *desc) -+{ -+ u32 status; -+ -+ disable_irq_nosync(irq); -+ -+ status = ath79_reset_rr(QCA955X_RESET_REG_EXT_INT_STATUS); -+ status &= QCA955X_EXT_INT_PCIE_RC1_ALL | QCA955X_EXT_INT_WMAC_ALL; -+ -+ if (status == 0) { -+ spurious_interrupt(); -+ goto enable; -+ } -+ -+ if (status & QCA955X_EXT_INT_PCIE_RC1_ALL) { -+ /* TODO: flush DDR? */ -+ generic_handle_irq(ATH79_IP2_IRQ(0)); -+ } -+ -+ if (status & QCA955X_EXT_INT_WMAC_ALL) { -+ /* TODO: flsuh DDR? */ -+ generic_handle_irq(ATH79_IP2_IRQ(1)); -+ } -+ -+enable: -+ enable_irq(irq); -+} -+ -+static void qca955x_ip3_irq_dispatch(unsigned int irq, struct irq_desc *desc) -+{ -+ u32 status; -+ -+ disable_irq_nosync(irq); -+ -+ status = ath79_reset_rr(QCA955X_RESET_REG_EXT_INT_STATUS); -+ status &= QCA955X_EXT_INT_PCIE_RC2_ALL | -+ QCA955X_EXT_INT_USB1 | -+ QCA955X_EXT_INT_USB2; -+ -+ if (status == 0) { -+ spurious_interrupt(); -+ goto enable; -+ } -+ -+ if (status & QCA955X_EXT_INT_USB1) { -+ /* TODO: flush DDR? */ -+ generic_handle_irq(ATH79_IP3_IRQ(0)); -+ } -+ -+ if (status & QCA955X_EXT_INT_USB2) { -+ /* TODO: flsuh DDR? */ -+ generic_handle_irq(ATH79_IP3_IRQ(1)); -+ } -+ -+ if (status & QCA955X_EXT_INT_PCIE_RC2_ALL) { -+ /* TODO: flush DDR? */ -+ generic_handle_irq(ATH79_IP3_IRQ(2)); -+ } -+ -+enable: -+ enable_irq(irq); -+} -+ -+static void qca955x_irq_init(void) -+{ -+ int i; -+ -+ for (i = ATH79_IP2_IRQ_BASE; -+ i < ATH79_IP2_IRQ_BASE + ATH79_IP2_IRQ_COUNT; i++) -+ irq_set_chip_and_handler(i, &dummy_irq_chip, -+ handle_level_irq); -+ -+ irq_set_chained_handler(ATH79_CPU_IRQ_IP2, qca955x_ip2_irq_dispatch); -+ -+ for (i = ATH79_IP3_IRQ_BASE; -+ i < ATH79_IP3_IRQ_BASE + ATH79_IP3_IRQ_COUNT; i++) -+ irq_set_chip_and_handler(i, &dummy_irq_chip, -+ handle_level_irq); -+ -+ irq_set_chained_handler(ATH79_CPU_IRQ_IP3, qca955x_ip3_irq_dispatch); -+} -+ - asmlinkage void plat_irq_dispatch(void) - { - unsigned long pending; -@@ -212,6 +297,17 @@ asmlinkage void plat_irq_dispatch(void) - * Issue a flush in the handlers to ensure that the driver sees - * the update. - */ -+ -+static void ath79_default_ip2_handler(void) -+{ -+ do_IRQ(ATH79_CPU_IRQ_IP2); -+} -+ -+static void ath79_default_ip3_handler(void) -+{ -+ do_IRQ(ATH79_CPU_IRQ_USB); -+} -+ - static void ar71xx_ip2_handler(void) - { - ath79_ddr_wb_flush(AR71XX_DDR_REG_FLUSH_PCI); -@@ -236,11 +332,6 @@ static void ar933x_ip2_handler(void) - do_IRQ(ATH79_CPU_IRQ_IP2); - } - --static void ar934x_ip2_handler(void) --{ -- do_IRQ(ATH79_CPU_IRQ_IP2); --} -- - static void ar71xx_ip3_handler(void) - { - ath79_ddr_wb_flush(AR71XX_DDR_REG_FLUSH_USB); -@@ -286,8 +377,11 @@ void __init arch_init_irq(void) - ath79_ip2_handler = ar933x_ip2_handler; - ath79_ip3_handler = ar933x_ip3_handler; - } else if (soc_is_ar934x()) { -- ath79_ip2_handler = ar934x_ip2_handler; -+ ath79_ip2_handler = ath79_default_ip2_handler; - ath79_ip3_handler = ar934x_ip3_handler; -+ } else if (soc_is_qca955x()) { -+ ath79_ip2_handler = ath79_default_ip2_handler; -+ ath79_ip3_handler = ath79_default_ip3_handler; - } else { - BUG(); - } -@@ -298,4 +392,6 @@ void __init arch_init_irq(void) - - if (soc_is_ar934x()) - ar934x_ip2_irq_init(); -+ else if (soc_is_qca955x()) -+ qca955x_irq_init(); - } ---- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -@@ -300,6 +300,7 @@ - #define AR934X_RESET_REG_PCIE_WMAC_INT_STATUS 0xac - - #define QCA955X_RESET_REG_BOOTSTRAP 0xb0 -+#define QCA955X_RESET_REG_EXT_INT_STATUS 0xac - - #define MISC_INT_ETHSW BIT(12) - #define MISC_INT_TIMER4 BIT(10) -@@ -398,6 +399,37 @@ - AR934X_PCIE_WMAC_INT_PCIE_RC1 | AR934X_PCIE_WMAC_INT_PCIE_RC2 | \ - AR934X_PCIE_WMAC_INT_PCIE_RC3) - -+#define QCA955X_EXT_INT_WMAC_MISC BIT(0) -+#define QCA955X_EXT_INT_WMAC_TX BIT(1) -+#define QCA955X_EXT_INT_WMAC_RXLP BIT(2) -+#define QCA955X_EXT_INT_WMAC_RXHP BIT(3) -+#define QCA955X_EXT_INT_PCIE_RC1 BIT(4) -+#define QCA955X_EXT_INT_PCIE_RC1_INT0 BIT(5) -+#define QCA955X_EXT_INT_PCIE_RC1_INT1 BIT(6) -+#define QCA955X_EXT_INT_PCIE_RC1_INT2 BIT(7) -+#define QCA955X_EXT_INT_PCIE_RC1_INT3 BIT(8) -+#define QCA955X_EXT_INT_PCIE_RC2 BIT(12) -+#define QCA955X_EXT_INT_PCIE_RC2_INT0 BIT(13) -+#define QCA955X_EXT_INT_PCIE_RC2_INT1 BIT(14) -+#define QCA955X_EXT_INT_PCIE_RC2_INT2 BIT(15) -+#define QCA955X_EXT_INT_PCIE_RC2_INT3 BIT(16) -+#define QCA955X_EXT_INT_USB1 BIT(24) -+#define QCA955X_EXT_INT_USB2 BIT(28) -+ -+#define QCA955X_EXT_INT_WMAC_ALL \ -+ (QCA955X_EXT_INT_WMAC_MISC | QCA955X_EXT_INT_WMAC_TX | \ -+ QCA955X_EXT_INT_WMAC_RXLP | QCA955X_EXT_INT_WMAC_RXHP) -+ -+#define QCA955X_EXT_INT_PCIE_RC1_ALL \ -+ (QCA955X_EXT_INT_PCIE_RC1 | QCA955X_EXT_INT_PCIE_RC1_INT0 | \ -+ QCA955X_EXT_INT_PCIE_RC1_INT1 | QCA955X_EXT_INT_PCIE_RC1_INT2 | \ -+ QCA955X_EXT_INT_PCIE_RC1_INT3) -+ -+#define QCA955X_EXT_INT_PCIE_RC2_ALL \ -+ (QCA955X_EXT_INT_PCIE_RC2 | QCA955X_EXT_INT_PCIE_RC2_INT0 | \ -+ QCA955X_EXT_INT_PCIE_RC2_INT1 | QCA955X_EXT_INT_PCIE_RC2_INT2 | \ -+ QCA955X_EXT_INT_PCIE_RC2_INT3) -+ - #define REV_ID_MAJOR_MASK 0xfff0 - #define REV_ID_MAJOR_AR71XX 0x00a0 - #define REV_ID_MAJOR_AR913X 0x00b0 ---- a/arch/mips/include/asm/mach-ath79/irq.h -+++ b/arch/mips/include/asm/mach-ath79/irq.h -@@ -10,7 +10,7 @@ - #define __ASM_MACH_ATH79_IRQ_H - - #define MIPS_CPU_IRQ_BASE 0 --#define NR_IRQS 48 -+#define NR_IRQS 51 - - #define ATH79_MISC_IRQ_BASE 8 - #define ATH79_MISC_IRQ_COUNT 32 -@@ -23,8 +23,13 @@ - #define ATH79_IP2_IRQ_COUNT 2 - #define ATH79_IP2_IRQ(_x) (ATH79_IP2_IRQ_BASE + (_x)) - -+#define ATH79_IP3_IRQ_BASE (ATH79_IP2_IRQ_BASE + ATH79_IP2_IRQ_COUNT) -+#define ATH79_IP3_IRQ_COUNT 3 -+#define ATH79_IP3_IRQ(_x) (ATH79_IP3_IRQ_BASE + (_x)) -+ - #define ATH79_CPU_IRQ_IP2 (MIPS_CPU_IRQ_BASE + 2) --#define ATH79_CPU_IRQ_USB (MIPS_CPU_IRQ_BASE + 3) -+#define ATH79_CPU_IRQ_IP3 (MIPS_CPU_IRQ_BASE + 3) -+#define ATH79_CPU_IRQ_USB ATH79_CPU_IRQ_IP3 - #define ATH79_CPU_IRQ_GE0 (MIPS_CPU_IRQ_BASE + 4) - #define ATH79_CPU_IRQ_GE1 (MIPS_CPU_IRQ_BASE + 5) - #define ATH79_CPU_IRQ_MISC (MIPS_CPU_IRQ_BASE + 6) diff --git a/target/linux/ar71xx/patches-3.3/164-MIPS-ath79-add-GPIO-setup-code-for-the-QCA955X-SoCs.patch b/target/linux/ar71xx/patches-3.3/164-MIPS-ath79-add-GPIO-setup-code-for-the-QCA955X-SoCs.patch deleted file mode 100644 index dc4251be93..0000000000 --- a/target/linux/ar71xx/patches-3.3/164-MIPS-ath79-add-GPIO-setup-code-for-the-QCA955X-SoCs.patch +++ /dev/null @@ -1,39 +0,0 @@ -From c9a552f3007f0621b2440ae17bad816578299e52 Mon Sep 17 00:00:00 2001 -From: Gabor Juhos <juhosg@openwrt.org> -Date: Sun, 24 Jun 2012 13:45:27 +0200 -Subject: [PATCH 20/34] MIPS: ath79: add GPIO setup code for the QCA955X SoCs - -Signed-off-by: Gabor Juhos <juhosg@openwrt.org> ---- - arch/mips/ath79/gpio.c | 4 +++- - arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 1 + - 2 files changed, 4 insertions(+), 1 deletions(-) - ---- a/arch/mips/ath79/gpio.c -+++ b/arch/mips/ath79/gpio.c -@@ -196,12 +196,14 @@ void __init ath79_gpio_init(void) - ath79_gpio_count = AR933X_GPIO_COUNT; - else if (soc_is_ar934x()) - ath79_gpio_count = AR934X_GPIO_COUNT; -+ else if (soc_is_qca955x()) -+ ath79_gpio_count = QCA955X_GPIO_COUNT; - else - BUG(); - - ath79_gpio_base = ioremap_nocache(AR71XX_GPIO_BASE, AR71XX_GPIO_SIZE); - ath79_gpio_chip.ngpio = ath79_gpio_count; -- if (soc_is_ar934x()) { -+ if (soc_is_ar934x() || soc_is_qca955x()) { - ath79_gpio_chip.direction_input = ar934x_gpio_direction_input; - ath79_gpio_chip.direction_output = ar934x_gpio_direction_output; - } ---- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -@@ -506,6 +506,7 @@ - #define AR913X_GPIO_COUNT 22 - #define AR933X_GPIO_COUNT 30 - #define AR934X_GPIO_COUNT 23 -+#define QCA955X_GPIO_COUNT 24 - - /* - * SRIF block diff --git a/target/linux/ar71xx/patches-3.3/165-MIPS-ath79-add-QCA955X-specific-glue-to-ath79_device.patch b/target/linux/ar71xx/patches-3.3/165-MIPS-ath79-add-QCA955X-specific-glue-to-ath79_device.patch deleted file mode 100644 index f3e3b6eecf..0000000000 --- a/target/linux/ar71xx/patches-3.3/165-MIPS-ath79-add-QCA955X-specific-glue-to-ath79_device.patch +++ /dev/null @@ -1,31 +0,0 @@ -From 68368e80b4db83afe39664a7d43c8b5c7b8ac3b4 Mon Sep 17 00:00:00 2001 -From: Gabor Juhos <juhosg@openwrt.org> -Date: Sun, 24 Jun 2012 13:49:33 +0200 -Subject: [PATCH 21/34] MIPS: ath79: add QCA955X specific glue to ath79_device_reset_{set,clear} - ---- - arch/mips/ath79/common.c | 6 ++++-- - 1 files changed, 4 insertions(+), 2 deletions(-) - ---- a/arch/mips/ath79/common.c -+++ b/arch/mips/ath79/common.c -@@ -70,7 +70,8 @@ void ath79_device_reset_set(u32 mask) - reg = AR913X_RESET_REG_RESET_MODULE; - else if (soc_is_ar933x()) - reg = AR933X_RESET_REG_RESET_MODULE; -- else if (soc_is_ar934x()) -+ else if (soc_is_ar934x() || -+ soc_is_qca955x()) - reg = AR934X_RESET_REG_RESET_MODULE; - else - BUG(); -@@ -96,7 +97,8 @@ void ath79_device_reset_clear(u32 mask) - reg = AR913X_RESET_REG_RESET_MODULE; - else if (soc_is_ar933x()) - reg = AR933X_RESET_REG_RESET_MODULE; -- else if (soc_is_ar934x()) -+ else if (soc_is_ar934x() || -+ soc_is_qca955x()) - reg = AR934X_RESET_REG_RESET_MODULE; - else - BUG(); diff --git a/target/linux/ar71xx/patches-3.3/166-MIPS-ath79-register-UART-for-the-QCA955X-SoCs.patch b/target/linux/ar71xx/patches-3.3/166-MIPS-ath79-register-UART-for-the-QCA955X-SoCs.patch deleted file mode 100644 index aacb8bbeb0..0000000000 --- a/target/linux/ar71xx/patches-3.3/166-MIPS-ath79-register-UART-for-the-QCA955X-SoCs.patch +++ /dev/null @@ -1,22 +0,0 @@ -From f7d7b362b51c51c1ae80bb7ade2039d6f74d4070 Mon Sep 17 00:00:00 2001 -From: Gabor Juhos <juhosg@openwrt.org> -Date: Sun, 24 Jun 2012 13:46:26 +0200 -Subject: [PATCH 22/34] MIPS: ath79: register UART for the QCA955X SoCs - -Signed-off-by: Gabor Juhos <juhosg@openwrt.org> ---- - arch/mips/ath79/dev-common.c | 3 ++- - 1 files changed, 2 insertions(+), 1 deletions(-) - ---- a/arch/mips/ath79/dev-common.c -+++ b/arch/mips/ath79/dev-common.c -@@ -90,7 +90,8 @@ void __init ath79_register_uart(void) - if (soc_is_ar71xx() || - soc_is_ar724x() || - soc_is_ar913x() || -- soc_is_ar934x()) { -+ soc_is_ar934x() || -+ soc_is_qca955x()) { - ath79_uart_data[0].uartclk = clk_get_rate(clk); - platform_device_register(&ath79_uart_device); - } else if (soc_is_ar933x()) { diff --git a/target/linux/ar71xx/patches-3.3/167-MIPS-ath79-add-USB-controller-registration-code-for-.patch b/target/linux/ar71xx/patches-3.3/167-MIPS-ath79-add-USB-controller-registration-code-for-.patch deleted file mode 100644 index 5a27a9b714..0000000000 --- a/target/linux/ar71xx/patches-3.3/167-MIPS-ath79-add-USB-controller-registration-code-for-.patch +++ /dev/null @@ -1,93 +0,0 @@ -From e4ba5e2bffd1f373f57dd692233aa6b7b46ae76c Mon Sep 17 00:00:00 2001 -From: Gabor Juhos <juhosg@openwrt.org> -Date: Sun, 24 Jun 2012 13:47:35 +0200 -Subject: [PATCH 23/34] MIPS: ath79: add USB controller registration code for the QCA955X SoCs - -Signed-off-by: Gabor Juhos <juhosg@openwrt.org> ---- - arch/mips/ath79/dev-usb.c | 46 ++++++++++++++++++++++++ - arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 4 ++ - 2 files changed, 50 insertions(+), 0 deletions(-) - ---- a/arch/mips/ath79/dev-usb.c -+++ b/arch/mips/ath79/dev-usb.c -@@ -75,6 +75,8 @@ static void __init ath79_usb_init_resour - unsigned long size, - int irq) - { -+ memset(res, 0, sizeof(res)); -+ - res[0].flags = IORESOURCE_MEM; - res[0].start = base; - res[0].end = base + size - 1; -@@ -219,6 +221,48 @@ static void __init ar934x_usb_setup(void - platform_device_register(&ath79_ehci_device); - } - -+static void __init qca955x_usb_setup(void) -+{ -+ struct platform_device *pdev; -+ -+ ath79_usb_init_resource(ath79_ehci_resources, -+ QCA955X_EHCI0_BASE, QCA955X_EHCI_SIZE, -+ ATH79_IP3_IRQ(0)); -+ -+ pdev = platform_device_register_resndata(NULL, "ehci-platform", 0, -+ ath79_ehci_resources, -+ ARRAY_SIZE(ath79_ehci_resources), -+ &ath79_ehci_pdata_v2, -+ sizeof(ath79_ehci_pdata_v2)); -+ if (IS_ERR(pdev)) { -+ pr_err("Unable to register USB %d device, err=%d\n", 0, -+ (int) PTR_ERR(pdev)); -+ return; -+ } -+ -+ pdev->dev.dma_mask = &ath79_ehci_dmamask; -+ pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32); -+ -+ ath79_usb_init_resource(ath79_ehci_resources, -+ QCA955X_EHCI1_BASE, QCA955X_EHCI_SIZE, -+ ATH79_IP3_IRQ(1)); -+ -+ pdev = platform_device_register_resndata(NULL, "ehci-platform", 1, -+ ath79_ehci_resources, -+ ARRAY_SIZE(ath79_ehci_resources), -+ &ath79_ehci_pdata_v2, -+ sizeof(ath79_ehci_pdata_v2)); -+ -+ if (IS_ERR(pdev)) { -+ pr_err("Unable to register USB %d device, err=%d\n", 1, -+ (int) PTR_ERR(pdev)); -+ return; -+ } -+ -+ pdev->dev.dma_mask = &ath79_ehci_dmamask; -+ pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32); -+} -+ - void __init ath79_register_usb(void) - { - if (soc_is_ar71xx()) -@@ -233,6 +277,8 @@ void __init ath79_register_usb(void) - ar933x_usb_setup(); - else if (soc_is_ar934x()) - ar934x_usb_setup(); -+ else if (soc_is_qca955x()) -+ qca955x_usb_setup(); - else - BUG(); - } ---- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -@@ -94,6 +94,10 @@ - #define AR934X_SRIF_BASE (AR71XX_APB_BASE + 0x00116000) - #define AR934X_SRIF_SIZE 0x1000 - -+#define QCA955X_EHCI0_BASE 0x1b000000 -+#define QCA955X_EHCI1_BASE 0x1b400000 -+#define QCA955X_EHCI_SIZE 0x200 -+ - /* - * DDR_CTRL block - */ diff --git a/target/linux/ar71xx/patches-3.3/168-MIPS-ath79-add-WMAC-registration-code-for-the-QCA955.patch b/target/linux/ar71xx/patches-3.3/168-MIPS-ath79-add-WMAC-registration-code-for-the-QCA955.patch deleted file mode 100644 index efc354e9d9..0000000000 --- a/target/linux/ar71xx/patches-3.3/168-MIPS-ath79-add-WMAC-registration-code-for-the-QCA955.patch +++ /dev/null @@ -1,70 +0,0 @@ -From 0568e7f92ecf2bfd2af0a5c59b1249fef002c89f Mon Sep 17 00:00:00 2001 -From: Gabor Juhos <juhosg@openwrt.org> -Date: Tue, 3 Jul 2012 10:24:43 +0200 -Subject: [PATCH 24/34] MIPS: ath79: add WMAC registration code for the QCA955X SoCs - -Signed-off-by: Gabor Juhos <juhosg@openwrt.org> ---- - arch/mips/ath79/Kconfig | 2 +- - arch/mips/ath79/dev-wmac.c | 20 ++++++++++++++++++++ - arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 2 ++ - 3 files changed, 23 insertions(+), 1 deletions(-) - ---- a/arch/mips/ath79/Kconfig -+++ b/arch/mips/ath79/Kconfig -@@ -108,7 +108,7 @@ config ATH79_DEV_USB - def_bool n - - config ATH79_DEV_WMAC -- depends on (SOC_AR913X || SOC_AR933X || SOC_AR934X) -+ depends on (SOC_AR913X || SOC_AR933X || SOC_AR934X || SOC_QCA955X) - def_bool n - - endif ---- a/arch/mips/ath79/dev-wmac.c -+++ b/arch/mips/ath79/dev-wmac.c -@@ -116,6 +116,24 @@ static void ar934x_wmac_setup(void) - ath79_wmac_data.is_clk_25mhz = true; - } - -+static void qca955x_wmac_setup(void) -+{ -+ u32 t; -+ -+ ath79_wmac_device.name = "qca955x_wmac"; -+ -+ ath79_wmac_resources[0].start = QCA955X_WMAC_BASE; -+ ath79_wmac_resources[0].end = QCA955X_WMAC_BASE + QCA955X_WMAC_SIZE - 1; -+ ath79_wmac_resources[1].start = ATH79_IP2_IRQ(1); -+ ath79_wmac_resources[1].start = ATH79_IP2_IRQ(1); -+ -+ t = ath79_reset_rr(QCA955X_RESET_REG_BOOTSTRAP); -+ if (t & QCA955X_BOOTSTRAP_REF_CLK_40) -+ ath79_wmac_data.is_clk_25mhz = false; -+ else -+ ath79_wmac_data.is_clk_25mhz = true; -+} -+ - void __init ath79_register_wmac(u8 *cal_data) - { - if (soc_is_ar913x()) -@@ -124,6 +142,8 @@ void __init ath79_register_wmac(u8 *cal_ - ar933x_wmac_setup(); - else if (soc_is_ar934x()) - ar934x_wmac_setup(); -+ else if (soc_is_qca955x()) -+ qca955x_wmac_setup(); - else - BUG(); - ---- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -@@ -94,6 +94,8 @@ - #define AR934X_SRIF_BASE (AR71XX_APB_BASE + 0x00116000) - #define AR934X_SRIF_SIZE 0x1000 - -+#define QCA955X_WMAC_BASE (AR71XX_APB_BASE + 0x00100000) -+#define QCA955X_WMAC_SIZE 0x20000 - #define QCA955X_EHCI0_BASE 0x1b000000 - #define QCA955X_EHCI1_BASE 0x1b400000 - #define QCA955X_EHCI_SIZE 0x200 diff --git a/target/linux/ar71xx/patches-3.3/169-MIPS-ath79-allow-to-specify-bus-number-in-PCI-IRQ-ma.patch b/target/linux/ar71xx/patches-3.3/169-MIPS-ath79-allow-to-specify-bus-number-in-PCI-IRQ-ma.patch deleted file mode 100644 index bd95d718b2..0000000000 --- a/target/linux/ar71xx/patches-3.3/169-MIPS-ath79-allow-to-specify-bus-number-in-PCI-IRQ-ma.patch +++ /dev/null @@ -1,34 +0,0 @@ -From 12c68e4fccadc22a0470177141a57892a76e4a2b Mon Sep 17 00:00:00 2001 -From: Gabor Juhos <juhosg@openwrt.org> -Date: Sun, 24 Jun 2012 15:33:16 +0200 -Subject: [PATCH 25/34] MIPS: ath79: allow to specify bus number in PCI IRQ maps - -Signed-off-by: Gabor Juhos <juhosg@openwrt.org> ---- - arch/mips/ath79/pci.c | 4 +++- - arch/mips/ath79/pci.h | 1 + - 2 files changed, 4 insertions(+), 1 deletions(-) - ---- a/arch/mips/ath79/pci.c -+++ b/arch/mips/ath79/pci.c -@@ -75,7 +75,9 @@ int __init pcibios_map_irq(const struct - const struct ath79_pci_irq *entry; - - entry = &ath79_pci_irq_map[i]; -- if (entry->slot == slot && entry->pin == pin) { -+ if (entry->bus == dev->bus->number && -+ entry->slot == slot && -+ entry->pin == pin) { - irq = entry->irq; - break; - } ---- a/arch/mips/ath79/pci.h -+++ b/arch/mips/ath79/pci.h -@@ -14,6 +14,7 @@ - #define _ATH79_PCI_H - - struct ath79_pci_irq { -+ int bus; - u8 slot; - u8 pin; - int irq; diff --git a/target/linux/ar71xx/patches-3.3/170-MIPS-ath79-add-PCI-controller-registration-code-for-.patch b/target/linux/ar71xx/patches-3.3/170-MIPS-ath79-add-PCI-controller-registration-code-for-.patch deleted file mode 100644 index 0c3889fdb9..0000000000 --- a/target/linux/ar71xx/patches-3.3/170-MIPS-ath79-add-PCI-controller-registration-code-for-.patch +++ /dev/null @@ -1,103 +0,0 @@ -From 8bb54348722216a1dd6905d9d031ebdaa3a544a4 Mon Sep 17 00:00:00 2001 -From: Gabor Juhos <juhosg@openwrt.org> -Date: Sun, 24 Jun 2012 23:05:20 +0200 -Subject: [PATCH 26/34] MIPS: ath79: add PCI controller registration code for the QCA9558 SoC - ---- - arch/mips/ath79/Kconfig | 2 + - arch/mips/ath79/pci.c | 36 ++++++++++++++++++++++++ - arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 13 ++++++++ - 3 files changed, 51 insertions(+), 0 deletions(-) - ---- a/arch/mips/ath79/Kconfig -+++ b/arch/mips/ath79/Kconfig -@@ -90,6 +90,8 @@ config SOC_AR934X - - config SOC_QCA955X - select USB_ARCH_HAS_EHCI -+ select HW_HAS_PCI -+ select PCI_AR724X if PCI - def_bool n - - config PCI_AR724X ---- a/arch/mips/ath79/pci.c -+++ b/arch/mips/ath79/pci.c -@@ -49,6 +49,21 @@ static const struct ath79_pci_irq ar724x - } - }; - -+static const struct ath79_pci_irq qca955x_pci_irq_map[] __initconst = { -+ { -+ .bus = 0, -+ .slot = 0, -+ .pin = 1, -+ .irq = ATH79_PCI_IRQ(0), -+ }, -+ { -+ .bus = 1, -+ .slot = 0, -+ .pin = 1, -+ .irq = ATH79_PCI_IRQ(1), -+ }, -+}; -+ - int __init pcibios_map_irq(const struct pci_dev *dev, uint8_t slot, uint8_t pin) - { - int irq = -1; -@@ -64,6 +79,9 @@ int __init pcibios_map_irq(const struct - soc_is_ar9344()) { - ath79_pci_irq_map = ar724x_pci_irq_map; - ath79_pci_nr_irqs = ARRAY_SIZE(ar724x_pci_irq_map); -+ } else if (soc_is_qca955x()) { -+ ath79_pci_irq_map = qca955x_pci_irq_map; -+ ath79_pci_nr_irqs = ARRAY_SIZE(qca955x_pci_irq_map); - } else { - pr_crit("pci %s: invalid irq map\n", - pci_name((struct pci_dev *) dev)); -@@ -215,6 +233,24 @@ int __init ath79_register_pci(void) - AR724X_PCI_MEM_SIZE, - 0, - ATH79_IP2_IRQ(0)); -+ } else if (soc_is_qca9558()) { -+ pdev = ath79_register_pci_ar724x(0, -+ QCA955X_PCI_CFG_BASE0, -+ QCA955X_PCI_CTRL_BASE0, -+ QCA955X_PCI_CRP_BASE0, -+ QCA955X_PCI_MEM_BASE0, -+ QCA955X_PCI_MEM_SIZE, -+ 0, -+ ATH79_IP2_IRQ(0)); -+ -+ pdev = ath79_register_pci_ar724x(1, -+ QCA955X_PCI_CFG_BASE1, -+ QCA955X_PCI_CTRL_BASE1, -+ QCA955X_PCI_CRP_BASE1, -+ QCA955X_PCI_MEM_BASE1, -+ QCA955X_PCI_MEM_SIZE, -+ 1, -+ ATH79_IP3_IRQ(2)); - } else { - /* No PCI support */ - return -ENODEV; ---- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -@@ -94,6 +94,19 @@ - #define AR934X_SRIF_BASE (AR71XX_APB_BASE + 0x00116000) - #define AR934X_SRIF_SIZE 0x1000 - -+#define QCA955X_PCI_MEM_BASE0 0x10000000 -+#define QCA955X_PCI_MEM_BASE1 0x12000000 -+#define QCA955X_PCI_MEM_SIZE 0x02000000 -+#define QCA955X_PCI_CFG_BASE0 0x14000000 -+#define QCA955X_PCI_CFG_BASE1 0x16000000 -+#define QCA955X_PCI_CFG_SIZE 0x1000 -+#define QCA955X_PCI_CRP_BASE0 (AR71XX_APB_BASE + 0x000c0000) -+#define QCA955X_PCI_CRP_BASE1 (AR71XX_APB_BASE + 0x00250000) -+#define QCA955X_PCI_CRP_SIZE 0x1000 -+#define QCA955X_PCI_CTRL_BASE0 (AR71XX_APB_BASE + 0x000f0000) -+#define QCA955X_PCI_CTRL_BASE1 (AR71XX_APB_BASE + 0x00280000) -+#define QCA955X_PCI_CTRL_SIZE 0x100 -+ - #define QCA955X_WMAC_BASE (AR71XX_APB_BASE + 0x00100000) - #define QCA955X_WMAC_SIZE 0x20000 - #define QCA955X_EHCI0_BASE 0x1b000000 diff --git a/target/linux/ar71xx/patches-3.3/171-MIPS-ath79-add-support-for-the-Qualcomm-Atheros-AP13.patch b/target/linux/ar71xx/patches-3.3/171-MIPS-ath79-add-support-for-the-Qualcomm-Atheros-AP13.patch deleted file mode 100644 index dc26f9c7bc..0000000000 --- a/target/linux/ar71xx/patches-3.3/171-MIPS-ath79-add-support-for-the-Qualcomm-Atheros-AP13.patch +++ /dev/null @@ -1,213 +0,0 @@ -From a034da3e4d4960266a94d15c811d5f4529fdff44 Mon Sep 17 00:00:00 2001 -From: Gabor Juhos <juhosg@openwrt.org> -Date: Sun, 24 Jun 2012 13:52:23 +0200 -Subject: [PATCH 27/34] MIPS: ath79: add support for the Qualcomm Atheros AP136 board - -Signed-off-by: Gabor Juhos <juhosg@openwrt.org> ---- - arch/mips/ath79/Kconfig | 12 +++ - arch/mips/ath79/Makefile | 1 + - arch/mips/ath79/mach-ap136.c | 155 ++++++++++++++++++++++++++++++++++++++++++ - arch/mips/ath79/machtypes.h | 1 + - 4 files changed, 169 insertions(+), 0 deletions(-) - create mode 100644 arch/mips/ath79/mach-ap136.c - ---- a/arch/mips/ath79/Kconfig -+++ b/arch/mips/ath79/Kconfig -@@ -14,6 +14,18 @@ config ATH79_MACH_AP121 - Say 'Y' here if you want your kernel to support the - Atheros AP121 reference board. - -+config ATH79_MACH_AP136 -+ bool "Atheros AP136 reference board" -+ select SOC_QCA955X -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_SPI -+ select ATH79_DEV_USB -+ select ATH79_DEV_WMAC -+ help -+ Say 'Y' here if you want your kernel to support the -+ Atheros AP136 reference board. -+ - config ATH79_MACH_AP81 - bool "Atheros AP81 reference board" - select SOC_AR913X ---- a/arch/mips/ath79/Makefile -+++ b/arch/mips/ath79/Makefile -@@ -27,6 +27,7 @@ obj-$(CONFIG_ATH79_DEV_WMAC) += dev-wma - # Machines - # - obj-$(CONFIG_ATH79_MACH_AP121) += mach-ap121.o -+obj-$(CONFIG_ATH79_MACH_AP136) += mach-ap136.o - obj-$(CONFIG_ATH79_MACH_AP81) += mach-ap81.o - obj-$(CONFIG_ATH79_MACH_DB120) += mach-db120.o - obj-$(CONFIG_ATH79_MACH_PB44) += mach-pb44.o ---- /dev/null -+++ b/arch/mips/ath79/mach-ap136.c -@@ -0,0 +1,155 @@ -+/* -+ * Qualcomm Atheros AP136 reference board support -+ * -+ * Copyright (c) 2012 Qualcomm Atheros -+ * Copyright (c) 2012 Gabor Juhos <juhosg@openwrt.org> -+ * -+ * Permission to use, copy, modify, and/or distribute this software for any -+ * purpose with or without fee is hereby granted, provided that the above -+ * copyright notice and this permission notice appear in all copies. -+ * -+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES -+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF -+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR -+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES -+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN -+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF -+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. -+ * -+ */ -+ -+#include <linux/pci.h> -+#include <linux/ath9k_platform.h> -+ -+#include "machtypes.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-spi.h" -+#include "dev-usb.h" -+#include "dev-wmac.h" -+#include "pci.h" -+ -+#define AP136_GPIO_LED_STATUS_RED 14 -+#define AP136_GPIO_LED_STATUS_GREEN 19 -+#define AP136_GPIO_LED_USB 4 -+#define AP136_GPIO_LED_WLAN_2G 13 -+#define AP136_GPIO_LED_WLAN_5G 12 -+#define AP136_GPIO_LED_WPS_RED 15 -+#define AP136_GPIO_LED_WPS_GREEN 20 -+ -+#define AP136_GPIO_BTN_WPS 16 -+#define AP136_GPIO_BTN_RFKILL 21 -+ -+#define AP136_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define AP136_KEYS_DEBOUNCE_INTERVAL (3 * AP136_KEYS_POLL_INTERVAL) -+ -+#define AP136_WMAC_CALDATA_OFFSET 0x1000 -+#define AP136_PCIE_CALDATA_OFFSET 0x5000 -+ -+static struct gpio_led ap136_leds_gpio[] __initdata = { -+ { -+ .name = "ap136:green:status", -+ .gpio = AP136_GPIO_LED_STATUS_GREEN, -+ .active_low = 1, -+ }, -+ { -+ .name = "ap136:red:status", -+ .gpio = AP136_GPIO_LED_STATUS_RED, -+ .active_low = 1, -+ }, -+ { -+ .name = "ap136:green:wps", -+ .gpio = AP136_GPIO_LED_WPS_GREEN, -+ .active_low = 1, -+ }, -+ { -+ .name = "ap136:red:wps", -+ .gpio = AP136_GPIO_LED_WPS_RED, -+ .active_low = 1, -+ }, -+ { -+ .name = "ap136:red:wlan-2g", -+ .gpio = AP136_GPIO_LED_WLAN_2G, -+ .active_low = 1, -+ }, -+ { -+ .name = "ap136:red:usb", -+ .gpio = AP136_GPIO_LED_USB, -+ .active_low = 1, -+ } -+}; -+ -+static struct gpio_keys_button ap136_gpio_keys[] __initdata = { -+ { -+ .desc = "WPS button", -+ .type = EV_KEY, -+ .code = KEY_WPS_BUTTON, -+ .debounce_interval = AP136_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = AP136_GPIO_BTN_WPS, -+ .active_low = 1, -+ }, -+ { -+ .desc = "RFKILL button", -+ .type = EV_KEY, -+ .code = KEY_RFKILL, -+ .debounce_interval = AP136_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = AP136_GPIO_BTN_RFKILL, -+ .active_low = 1, -+ }, -+}; -+ -+static struct spi_board_info ap136_spi_info[] = { -+ { -+ .bus_num = 0, -+ .chip_select = 0, -+ .max_speed_hz = 25000000, -+ .modalias = "mx25l6405d", -+ } -+}; -+ -+static struct ath79_spi_platform_data ap136_spi_data = { -+ .bus_num = 0, -+ .num_chipselect = 1, -+}; -+ -+#ifdef CONFIG_PCI -+static struct ath9k_platform_data ap136_ath9k_data; -+ -+static int ap136_pci_plat_dev_init(struct pci_dev *dev) -+{ -+ if (dev->bus->number == 1 && (PCI_SLOT(dev->devfn)) == 0) -+ dev->dev.platform_data = &ap136_ath9k_data; -+ -+ return 0; -+} -+ -+static void __init ap136_pci_init(u8 *eeprom) -+{ -+ memcpy(ap136_ath9k_data.eeprom_data, eeprom, -+ sizeof(ap136_ath9k_data.eeprom_data)); -+ -+ ath79_pci_set_plat_dev_init(ap136_pci_plat_dev_init); -+ ath79_register_pci(); -+} -+#else -+static inline void ap136_pci_init(void) {} -+#endif /* CONFIG_PCI */ -+ -+static void __init ap136_setup(void) -+{ -+ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(ap136_leds_gpio), -+ ap136_leds_gpio); -+ ath79_register_gpio_keys_polled(-1, AP136_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(ap136_gpio_keys), -+ ap136_gpio_keys); -+ ath79_register_spi(&ap136_spi_data, ap136_spi_info, -+ ARRAY_SIZE(ap136_spi_info)); -+ ath79_register_usb(); -+ ath79_register_wmac(art + AP136_WMAC_CALDATA_OFFSET); -+ ap136_pci_init(art + AP136_PCIE_CALDATA_OFFSET); -+} -+ -+MIPS_MACHINE(ATH79_MACH_AP136, "AP136", "Atheros AP136 reference board", -+ ap136_setup); ---- a/arch/mips/ath79/machtypes.h -+++ b/arch/mips/ath79/machtypes.h -@@ -17,6 +17,7 @@ - enum ath79_mach_type { - ATH79_MACH_GENERIC = 0, - ATH79_MACH_AP121, /* Atheros AP121 reference board */ -+ ATH79_MACH_AP136, /* Atheros AP136 reference board */ - ATH79_MACH_AP81, /* Atheros AP81 reference board */ - ATH79_MACH_DB120, /* Atheros DB120 reference board */ - ATH79_MACH_PB44, /* Atheros PB44 reference board */ diff --git a/target/linux/ar71xx/patches-3.3/200-spi-ath79-add-delay-between-SCK-changes.patch b/target/linux/ar71xx/patches-3.3/200-spi-ath79-add-delay-between-SCK-changes.patch deleted file mode 100644 index 28cc1fbe93..0000000000 --- a/target/linux/ar71xx/patches-3.3/200-spi-ath79-add-delay-between-SCK-changes.patch +++ /dev/null @@ -1,122 +0,0 @@ -From cbb3ade4765bc715b5c2eae4a7b6eaf3ff7ad958 Mon Sep 17 00:00:00 2001 -From: Gabor Juhos <juhosg@openwrt.org> -Date: Wed, 11 Jan 2012 20:06:35 +0100 -Subject: [PATCH 28/34] spi/ath79: add delay between SCK changes - -The driver uses the "as fast as it can" approach -to drive the SCK signal. However this does not -work with certain low speed SPI chips (e.g. the -PCF2123 RTC chip). Add per-bit slowdowns in order -to be able to use the driver with such chips as -well. - -Signed-off-by: Gabor Juhos <juhosg@openwrt.org> ---- - drivers/spi/spi-ath79.c | 44 +++++++++++++++++++++++++++++++++++++++++++- - 1 files changed, 43 insertions(+), 1 deletions(-) - ---- a/drivers/spi/spi-ath79.c -+++ b/drivers/spi/spi-ath79.c -@@ -24,17 +24,24 @@ - #include <linux/spi/spi_bitbang.h> - #include <linux/bitops.h> - #include <linux/gpio.h> -+#include <linux/clk.h> -+#include <linux/err.h> - - #include <asm/mach-ath79/ar71xx_regs.h> - #include <asm/mach-ath79/ath79_spi_platform.h> - - #define DRV_NAME "ath79-spi" - -+#define ATH79_SPI_RRW_DELAY_FACTOR 12000 -+#define MHZ (1000 * 1000) -+ - struct ath79_spi { - struct spi_bitbang bitbang; - u32 ioc_base; - u32 reg_ctrl; - void __iomem *base; -+ struct clk *clk; -+ unsigned rrw_delay; - }; - - static inline u32 ath79_spi_rr(struct ath79_spi *sp, unsigned reg) -@@ -52,6 +59,12 @@ static inline struct ath79_spi *ath79_sp - return spi_master_get_devdata(spi->master); - } - -+static inline void ath79_spi_delay(struct ath79_spi *sp, unsigned nsecs) -+{ -+ if (nsecs > sp->rrw_delay) -+ ndelay(nsecs - sp->rrw_delay); -+} -+ - static void ath79_spi_chipselect(struct spi_device *spi, int is_active) - { - struct ath79_spi *sp = ath79_spidev_to_sp(spi); -@@ -184,7 +197,9 @@ static u32 ath79_spi_txrx_mode0(struct s - - /* setup MSB (to slave) on trailing edge */ - ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, out); -+ ath79_spi_delay(sp, nsecs); - ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, out | AR71XX_SPI_IOC_CLK); -+ ath79_spi_delay(sp, nsecs); - - word <<= 1; - } -@@ -198,6 +213,7 @@ static __devinit int ath79_spi_probe(str - struct ath79_spi *sp; - struct ath79_spi_platform_data *pdata; - struct resource *r; -+ unsigned long rate; - int ret; - - master = spi_alloc_master(&pdev->dev, sizeof(*sp)); -@@ -239,12 +255,36 @@ static __devinit int ath79_spi_probe(str - goto err_put_master; - } - -+ sp->clk = clk_get(&pdev->dev, "ahb"); -+ if (IS_ERR(sp->clk)) { -+ ret = PTR_ERR(sp->clk); -+ goto err_unmap; -+ } -+ -+ ret = clk_enable(sp->clk); -+ if (ret) -+ goto err_clk_put; -+ -+ rate = DIV_ROUND_UP(clk_get_rate(sp->clk), MHZ); -+ if (!rate) { -+ ret = -EINVAL; -+ goto err_clk_disable; -+ } -+ -+ sp->rrw_delay = ATH79_SPI_RRW_DELAY_FACTOR / rate; -+ dev_dbg(&pdev->dev, "register read/write delay is %u nsecs\n", -+ sp->rrw_delay); -+ - ret = spi_bitbang_start(&sp->bitbang); - if (ret) -- goto err_unmap; -+ goto err_clk_disable; - - return 0; - -+err_clk_disable: -+ clk_disable(sp->clk); -+err_clk_put: -+ clk_put(sp->clk); - err_unmap: - iounmap(sp->base); - err_put_master: -@@ -259,6 +299,8 @@ static __devexit int ath79_spi_remove(st - struct ath79_spi *sp = platform_get_drvdata(pdev); - - spi_bitbang_stop(&sp->bitbang); -+ clk_disable(sp->clk); -+ clk_put(sp->clk); - iounmap(sp->base); - platform_set_drvdata(pdev, NULL); - spi_master_put(sp->bitbang.master); diff --git a/target/linux/ar71xx/patches-3.3/201-spi-ath79-add-missing-HIGH-LOW-SCK-transition.patch b/target/linux/ar71xx/patches-3.3/201-spi-ath79-add-missing-HIGH-LOW-SCK-transition.patch deleted file mode 100644 index fd3d9689a2..0000000000 --- a/target/linux/ar71xx/patches-3.3/201-spi-ath79-add-missing-HIGH-LOW-SCK-transition.patch +++ /dev/null @@ -1,21 +0,0 @@ -From bcb0fdebc08f828b54d0a2eb74a9d1378701a8e0 Mon Sep 17 00:00:00 2001 -From: Gabor Juhos <juhosg@openwrt.org> -Date: Wed, 11 Jan 2012 20:33:41 +0100 -Subject: [PATCH 29/34] spi/ath79: add missing HIGH->LOW SCK transition - -Signed-off-by: Gabor Juhos <juhosg@openwrt.org> ---- - drivers/spi/spi-ath79.c | 2 ++ - 1 files changed, 2 insertions(+), 0 deletions(-) - ---- a/drivers/spi/spi-ath79.c -+++ b/drivers/spi/spi-ath79.c -@@ -200,6 +200,8 @@ static u32 ath79_spi_txrx_mode0(struct s - ath79_spi_delay(sp, nsecs); - ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, out | AR71XX_SPI_IOC_CLK); - ath79_spi_delay(sp, nsecs); -+ if (bits == 1) -+ ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, out); - - word <<= 1; - } diff --git a/target/linux/ar71xx/patches-3.3/202-spi-ath79-remove-superfluous-chip-select-code.patch b/target/linux/ar71xx/patches-3.3/202-spi-ath79-remove-superfluous-chip-select-code.patch deleted file mode 100644 index eec3293d9e..0000000000 --- a/target/linux/ar71xx/patches-3.3/202-spi-ath79-remove-superfluous-chip-select-code.patch +++ /dev/null @@ -1,30 +0,0 @@ -From 06752f9b169493cd1323f8337c147ad2dd31025c Mon Sep 17 00:00:00 2001 -From: Gabor Juhos <juhosg@openwrt.org> -Date: Mon, 9 Jan 2012 15:03:28 +0100 -Subject: [PATCH 30/34] spi/ath79: remove superfluous chip select code - -The spi_bitbang driver calls the chipselect function -of the driver from spi_bitbang_setup in order to -deselect the given SPI chip, so we don't have to -initialize the CS line here. - -Signed-off-by: Gabor Juhos <juhosg@openwrt.org> ---- - drivers/spi/spi-ath79.c | 6 ------ - 1 files changed, 0 insertions(+), 6 deletions(-) - ---- a/drivers/spi/spi-ath79.c -+++ b/drivers/spi/spi-ath79.c -@@ -128,12 +128,6 @@ static int ath79_spi_setup_cs(struct spi - gpio_free(cdata->gpio); - return status; - } -- } else { -- if (spi->mode & SPI_CS_HIGH) -- sp->ioc_base |= AR71XX_SPI_IOC_CS0; -- else -- sp->ioc_base &= ~AR71XX_SPI_IOC_CS0; -- ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, sp->ioc_base); - } - - return 0; diff --git a/target/linux/ar71xx/patches-3.3/203-spi-ath79-use-gpio_request_one.patch b/target/linux/ar71xx/patches-3.3/203-spi-ath79-use-gpio_request_one.patch deleted file mode 100644 index 12559bcae1..0000000000 --- a/target/linux/ar71xx/patches-3.3/203-spi-ath79-use-gpio_request_one.patch +++ /dev/null @@ -1,56 +0,0 @@ -From 6bd876a46b977643f27d2cc63f49e1bc84b78134 Mon Sep 17 00:00:00 2001 -From: Gabor Juhos <juhosg@openwrt.org> -Date: Mon, 9 Jan 2012 15:04:21 +0100 -Subject: [PATCH 31/34] spi/ath79: use gpio_request_one - -Use gpio_request_one() instead of multiple gpiolib calls. - -Signed-off-by: Gabor Juhos <juhosg@openwrt.org> ---- - drivers/spi/spi-ath79.c | 26 +++++++++++++------------- - 1 files changed, 13 insertions(+), 13 deletions(-) - ---- a/drivers/spi/spi-ath79.c -+++ b/drivers/spi/spi-ath79.c -@@ -100,6 +100,7 @@ static int ath79_spi_setup_cs(struct spi - { - struct ath79_spi *sp = ath79_spidev_to_sp(spi); - struct ath79_spi_controller_data *cdata; -+ int status; - - cdata = spi->controller_data; - if (spi->chip_select && !cdata) -@@ -115,22 +116,21 @@ static int ath79_spi_setup_cs(struct spi - /* TODO: setup speed? */ - ath79_spi_wr(sp, AR71XX_SPI_REG_CTRL, 0x43); - -+ status = 0; - if (spi->chip_select) { -- int status = 0; -+ unsigned long flags; - -- status = gpio_request(cdata->gpio, dev_name(&spi->dev)); -- if (status) -- return status; -- -- status = gpio_direction_output(cdata->gpio, -- spi->mode & SPI_CS_HIGH); -- if (status) { -- gpio_free(cdata->gpio); -- return status; -- } -+ flags = GPIOF_DIR_OUT; -+ if (spi->mode & SPI_CS_HIGH) -+ flags |= GPIOF_INIT_HIGH; -+ else -+ flags |= GPIOF_INIT_LOW; -+ -+ status = gpio_request_one(cdata->gpio, flags, -+ dev_name(&spi->dev)); - } - -- return 0; -+ return status; - } - - static void ath79_spi_cleanup_cs(struct spi_device *spi) diff --git a/target/linux/ar71xx/patches-3.3/204-spi-ath79-avoid-multiple-initialization-of-the-SPI-c.patch b/target/linux/ar71xx/patches-3.3/204-spi-ath79-avoid-multiple-initialization-of-the-SPI-c.patch deleted file mode 100644 index 084bd98bbe..0000000000 --- a/target/linux/ar71xx/patches-3.3/204-spi-ath79-avoid-multiple-initialization-of-the-SPI-c.patch +++ /dev/null @@ -1,108 +0,0 @@ -From e63ceaa0c4f7be0498cd452981073d3ce8e7d1f5 Mon Sep 17 00:00:00 2001 -From: Gabor Juhos <juhosg@openwrt.org> -Date: Mon, 9 Jan 2012 15:00:46 +0100 -Subject: [PATCH 32/34] spi/ath79: avoid multiple initialization of the SPI controller - -Currently we are initializing the SPI controller in -the chip select line function, and that function is -called once for each SPI device on the bus. If a -board has multiple SPI devices, the controller will -be initialized multiple times. - -Introduce ath79_spi_{en,dis}able helper functions, -and call those from probe/response in order to avoid -the mutliple initialization of the controller. - -Signed-off-by: Gabor Juhos <juhosg@openwrt.org> ---- - drivers/spi/spi-ath79.c | 41 ++++++++++++++++++++++++----------------- - 1 files changed, 24 insertions(+), 17 deletions(-) - ---- a/drivers/spi/spi-ath79.c -+++ b/drivers/spi/spi-ath79.c -@@ -96,16 +96,8 @@ static void ath79_spi_chipselect(struct - - } - --static int ath79_spi_setup_cs(struct spi_device *spi) -+static void ath79_spi_enable(struct ath79_spi *sp) - { -- struct ath79_spi *sp = ath79_spidev_to_sp(spi); -- struct ath79_spi_controller_data *cdata; -- int status; -- -- cdata = spi->controller_data; -- if (spi->chip_select && !cdata) -- return -EINVAL; -- - /* enable GPIO mode */ - ath79_spi_wr(sp, AR71XX_SPI_REG_FS, AR71XX_SPI_FS_GPIO); - -@@ -115,6 +107,24 @@ static int ath79_spi_setup_cs(struct spi - - /* TODO: setup speed? */ - ath79_spi_wr(sp, AR71XX_SPI_REG_CTRL, 0x43); -+} -+ -+static void ath79_spi_disable(struct ath79_spi *sp) -+{ -+ /* restore CTRL register */ -+ ath79_spi_wr(sp, AR71XX_SPI_REG_CTRL, sp->reg_ctrl); -+ /* disable GPIO mode */ -+ ath79_spi_wr(sp, AR71XX_SPI_REG_FS, 0); -+} -+ -+static int ath79_spi_setup_cs(struct spi_device *spi) -+{ -+ struct ath79_spi_controller_data *cdata; -+ int status; -+ -+ cdata = spi->controller_data; -+ if (spi->chip_select && !cdata) -+ return -EINVAL; - - status = 0; - if (spi->chip_select) { -@@ -135,17 +145,10 @@ static int ath79_spi_setup_cs(struct spi - - static void ath79_spi_cleanup_cs(struct spi_device *spi) - { -- struct ath79_spi *sp = ath79_spidev_to_sp(spi); -- - if (spi->chip_select) { - struct ath79_spi_controller_data *cdata = spi->controller_data; - gpio_free(cdata->gpio); - } -- -- /* restore CTRL register */ -- ath79_spi_wr(sp, AR71XX_SPI_REG_CTRL, sp->reg_ctrl); -- /* disable GPIO mode */ -- ath79_spi_wr(sp, AR71XX_SPI_REG_FS, 0); - } - - static int ath79_spi_setup(struct spi_device *spi) -@@ -271,12 +274,15 @@ static __devinit int ath79_spi_probe(str - dev_dbg(&pdev->dev, "register read/write delay is %u nsecs\n", - sp->rrw_delay); - -+ ath79_spi_enable(sp); - ret = spi_bitbang_start(&sp->bitbang); - if (ret) -- goto err_clk_disable; -+ goto err_disable; - - return 0; - -+err_disable: -+ ath79_spi_disable(sp); - err_clk_disable: - clk_disable(sp->clk); - err_clk_put: -@@ -295,6 +301,7 @@ static __devexit int ath79_spi_remove(st - struct ath79_spi *sp = platform_get_drvdata(pdev); - - spi_bitbang_stop(&sp->bitbang); -+ ath79_spi_disable(sp); - clk_disable(sp->clk); - clk_put(sp->clk); - iounmap(sp->base); diff --git a/target/linux/ar71xx/patches-3.3/205-spi-ath79-add-shutdown-handler.patch b/target/linux/ar71xx/patches-3.3/205-spi-ath79-add-shutdown-handler.patch deleted file mode 100644 index a1461ceaef..0000000000 --- a/target/linux/ar71xx/patches-3.3/205-spi-ath79-add-shutdown-handler.patch +++ /dev/null @@ -1,45 +0,0 @@ -From dab305def68a9ea28c1c0ca2fc20bba645944914 Mon Sep 17 00:00:00 2001 -From: Gabor Juhos <juhosg@openwrt.org> -Date: Wed, 11 Jan 2012 22:19:32 +0100 -Subject: [PATCH 33/34] spi/ath79: add shutdown handler - -Signed-off-by: Gabor Juhos <juhosg@openwrt.org> ---- - drivers/spi/spi-ath79.c | 12 +++++++++++- - 1 files changed, 11 insertions(+), 1 deletions(-) - ---- a/drivers/spi/spi-ath79.c -+++ b/drivers/spi/spi-ath79.c -@@ -296,7 +296,7 @@ err_put_master: - return ret; - } - --static __devexit int ath79_spi_remove(struct platform_device *pdev) -+static void __ath79_spi_remove(struct platform_device *pdev) - { - struct ath79_spi *sp = platform_get_drvdata(pdev); - -@@ -307,13 +307,23 @@ static __devexit int ath79_spi_remove(st - iounmap(sp->base); - platform_set_drvdata(pdev, NULL); - spi_master_put(sp->bitbang.master); -+} - -+static __devexit int ath79_spi_remove(struct platform_device *pdev) -+{ -+ __ath79_spi_remove(pdev); - return 0; - } - -+static void ath79_spi_shutdown(struct platform_device *pdev) -+{ -+ __ath79_spi_remove(pdev); -+} -+ - static struct platform_driver ath79_spi_driver = { - .probe = ath79_spi_probe, - .remove = __devexit_p(ath79_spi_remove), -+ .shutdown = ath79_spi_shutdown, - .driver = { - .name = DRV_NAME, - .owner = THIS_MODULE, diff --git a/target/linux/ar71xx/patches-3.3/206-spi-ath79-make-chipselect-logic-more-flexible.patch b/target/linux/ar71xx/patches-3.3/206-spi-ath79-make-chipselect-logic-more-flexible.patch deleted file mode 100644 index 5a4c0df5d4..0000000000 --- a/target/linux/ar71xx/patches-3.3/206-spi-ath79-make-chipselect-logic-more-flexible.patch +++ /dev/null @@ -1,313 +0,0 @@ -From 7008284716403237f6bc7d7590b3ed073555bd56 Mon Sep 17 00:00:00 2001 -From: Gabor Juhos <juhosg@openwrt.org> -Date: Wed, 11 Jan 2012 22:25:11 +0100 -Subject: [PATCH 34/34] spi/ath79: make chipselect logic more flexible - -Signed-off-by: Gabor Juhos <juhosg@openwrt.org> ---- - arch/mips/ath79/mach-ap121.c | 6 ++ - arch/mips/ath79/mach-ap136.c | 6 ++ - arch/mips/ath79/mach-ap81.c | 6 ++ - arch/mips/ath79/mach-db120.c | 6 ++ - arch/mips/ath79/mach-pb44.c | 6 ++ - arch/mips/ath79/mach-ubnt-xm.c | 6 ++ - .../include/asm/mach-ath79/ath79_spi_platform.h | 8 ++- - drivers/spi/spi-ath79.c | 67 +++++++++++++------- - 8 files changed, 88 insertions(+), 23 deletions(-) - ---- a/arch/mips/ath79/mach-ap121.c -+++ b/arch/mips/ath79/mach-ap121.c -@@ -58,12 +58,18 @@ static struct gpio_keys_button ap121_gpi - } - }; - -+static struct ath79_spi_controller_data ap121_spi0_data = { -+ .cs_type = ATH79_SPI_CS_TYPE_INTERNAL, -+ .cs_line = 0, -+}; -+ - static struct spi_board_info ap121_spi_info[] = { - { - .bus_num = 0, - .chip_select = 0, - .max_speed_hz = 25000000, - .modalias = "mx25l1606e", -+ .controller_data = &ap121_spi0_data, - } - }; - ---- a/arch/mips/ath79/mach-ap136.c -+++ b/arch/mips/ath79/mach-ap136.c -@@ -98,12 +98,18 @@ static struct gpio_keys_button ap136_gpi - }, - }; - -+static struct ath79_spi_controller_data ap136_spi0_data = { -+ .cs_type = ATH79_SPI_CS_TYPE_INTERNAL, -+ .cs_line = 0, -+}; -+ - static struct spi_board_info ap136_spi_info[] = { - { - .bus_num = 0, - .chip_select = 0, - .max_speed_hz = 25000000, - .modalias = "mx25l6405d", -+ .controller_data = &ap136_spi0_data, - } - }; - ---- a/arch/mips/ath79/mach-ap81.c -+++ b/arch/mips/ath79/mach-ap81.c -@@ -67,12 +67,18 @@ static struct gpio_keys_button ap81_gpio - } - }; - -+static struct ath79_spi_controller_data ap81_spi0_data = { -+ .cs_type = ATH79_SPI_CS_TYPE_INTERNAL, -+ .cs_line = 0, -+}; -+ - static struct spi_board_info ap81_spi_info[] = { - { - .bus_num = 0, - .chip_select = 0, - .max_speed_hz = 25000000, - .modalias = "m25p64", -+ .controller_data = &ap81_spi0_data, - } - }; - ---- a/arch/mips/ath79/mach-db120.c -+++ b/arch/mips/ath79/mach-db120.c -@@ -76,12 +76,18 @@ static struct gpio_keys_button db120_gpi - }, - }; - -+static struct ath79_spi_controller_data db120_spi0_data = { -+ .cs_type = ATH79_SPI_CS_TYPE_INTERNAL, -+ .cs_line = 0, -+}; -+ - static struct spi_board_info db120_spi_info[] = { - { - .bus_num = 0, - .chip_select = 0, - .max_speed_hz = 25000000, - .modalias = "s25sl064a", -+ .controller_data = &db120_spi0_data, - } - }; - ---- a/arch/mips/ath79/mach-pb44.c -+++ b/arch/mips/ath79/mach-pb44.c -@@ -87,12 +87,18 @@ static struct gpio_keys_button pb44_gpio - } - }; - -+static struct ath79_spi_controller_data pb44_spi0_data = { -+ .cs_type = ATH79_SPI_CS_TYPE_INTERNAL, -+ .cs_line = 0, -+}; -+ - static struct spi_board_info pb44_spi_info[] = { - { - .bus_num = 0, - .chip_select = 0, - .max_speed_hz = 25000000, - .modalias = "m25p64", -+ .controller_data = &pb44_spi0_data, - }, - }; - ---- a/arch/mips/ath79/mach-ubnt-xm.c -+++ b/arch/mips/ath79/mach-ubnt-xm.c -@@ -65,12 +65,18 @@ static struct gpio_keys_button ubnt_xm_g - } - }; - -+static struct ath79_spi_controller_data ubnt_xm_spi0_data = { -+ .cs_type = ATH79_SPI_CS_TYPE_INTERNAL, -+ .cs_line = 0, -+}; -+ - static struct spi_board_info ubnt_xm_spi_info[] = { - { - .bus_num = 0, - .chip_select = 0, - .max_speed_hz = 25000000, - .modalias = "mx25l6405d", -+ .controller_data = &ubnt_xm_spi0_data, - } - }; - ---- a/arch/mips/include/asm/mach-ath79/ath79_spi_platform.h -+++ b/arch/mips/include/asm/mach-ath79/ath79_spi_platform.h -@@ -16,8 +16,14 @@ struct ath79_spi_platform_data { - unsigned num_chipselect; - }; - -+enum ath79_spi_cs_type { -+ ATH79_SPI_CS_TYPE_INTERNAL, -+ ATH79_SPI_CS_TYPE_GPIO, -+}; -+ - struct ath79_spi_controller_data { -- unsigned gpio; -+ enum ath79_spi_cs_type cs_type; -+ unsigned cs_line; - }; - - #endif /* _ATH79_SPI_PLATFORM_H */ ---- a/drivers/spi/spi-ath79.c -+++ b/drivers/spi/spi-ath79.c -@@ -35,6 +35,8 @@ - #define ATH79_SPI_RRW_DELAY_FACTOR 12000 - #define MHZ (1000 * 1000) - -+#define ATH79_SPI_CS_LINE_MAX 2 -+ - struct ath79_spi { - struct spi_bitbang bitbang; - u32 ioc_base; -@@ -69,6 +71,7 @@ static void ath79_spi_chipselect(struct - { - struct ath79_spi *sp = ath79_spidev_to_sp(spi); - int cs_high = (spi->mode & SPI_CS_HIGH) ? is_active : !is_active; -+ struct ath79_spi_controller_data *cdata = spi->controller_data; - - if (is_active) { - /* set initial clock polarity */ -@@ -80,20 +83,24 @@ static void ath79_spi_chipselect(struct - ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, sp->ioc_base); - } - -- if (spi->chip_select) { -- struct ath79_spi_controller_data *cdata = spi->controller_data; -- -- /* SPI is normally active-low */ -- gpio_set_value(cdata->gpio, cs_high); -- } else { -+ switch (cdata->cs_type) { -+ case ATH79_SPI_CS_TYPE_INTERNAL: - if (cs_high) -- sp->ioc_base |= AR71XX_SPI_IOC_CS0; -+ sp->ioc_base |= AR71XX_SPI_IOC_CS(cdata->cs_line); - else -- sp->ioc_base &= ~AR71XX_SPI_IOC_CS0; -+ sp->ioc_base &= ~AR71XX_SPI_IOC_CS(cdata->cs_line); - - ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, sp->ioc_base); -- } -+ break; - -+ case ATH79_SPI_CS_TYPE_GPIO: -+ /* SPI is normally active-low */ -+ if (gpio_cansleep(cdata->cs_line)) -+ gpio_set_value_cansleep(cdata->cs_line, cs_high); -+ else -+ gpio_set_value(cdata->cs_line, cs_high); -+ break; -+ } - } - - static void ath79_spi_enable(struct ath79_spi *sp) -@@ -120,24 +127,30 @@ static void ath79_spi_disable(struct ath - static int ath79_spi_setup_cs(struct spi_device *spi) - { - struct ath79_spi_controller_data *cdata; -+ unsigned long flags; - int status; - - cdata = spi->controller_data; -- if (spi->chip_select && !cdata) -+ if (!cdata) - return -EINVAL; - - status = 0; -- if (spi->chip_select) { -- unsigned long flags; -+ switch (cdata->cs_type) { -+ case ATH79_SPI_CS_TYPE_INTERNAL: -+ if (cdata->cs_line > ATH79_SPI_CS_LINE_MAX) -+ status = -EINVAL; -+ break; - -+ case ATH79_SPI_CS_TYPE_GPIO: - flags = GPIOF_DIR_OUT; - if (spi->mode & SPI_CS_HIGH) - flags |= GPIOF_INIT_HIGH; - else - flags |= GPIOF_INIT_LOW; - -- status = gpio_request_one(cdata->gpio, flags, -+ status = gpio_request_one(cdata->cs_line, flags, - dev_name(&spi->dev)); -+ break; - } - - return status; -@@ -145,9 +158,19 @@ static int ath79_spi_setup_cs(struct spi - - static void ath79_spi_cleanup_cs(struct spi_device *spi) - { -- if (spi->chip_select) { -- struct ath79_spi_controller_data *cdata = spi->controller_data; -- gpio_free(cdata->gpio); -+ struct ath79_spi_controller_data *cdata; -+ -+ cdata = spi->controller_data; -+ if (!cdata) -+ return; -+ -+ switch (cdata->cs_type) { -+ case ATH79_SPI_CS_TYPE_INTERNAL: -+ /* nothing to do */ -+ break; -+ case ATH79_SPI_CS_TYPE_GPIO: -+ gpio_free(cdata->cs_line); -+ break; - } - } - -@@ -155,6 +178,9 @@ static int ath79_spi_setup(struct spi_de - { - int status = 0; - -+ if (spi->controller_data == NULL) -+ return -EINVAL; -+ - if (spi->bits_per_word > 32) - return -EINVAL; - -@@ -215,6 +241,10 @@ static __devinit int ath79_spi_probe(str - unsigned long rate; - int ret; - -+ pdata = pdev->dev.platform_data; -+ if (!pdata) -+ return -EINVAL; -+ - master = spi_alloc_master(&pdev->dev, sizeof(*sp)); - if (master == NULL) { - dev_err(&pdev->dev, "failed to allocate spi master\n"); -@@ -224,17 +254,10 @@ static __devinit int ath79_spi_probe(str - sp = spi_master_get_devdata(master); - platform_set_drvdata(pdev, sp); - -- pdata = pdev->dev.platform_data; -- - master->setup = ath79_spi_setup; - master->cleanup = ath79_spi_cleanup; -- if (pdata) { -- master->bus_num = pdata->bus_num; -- master->num_chipselect = pdata->num_chipselect; -- } else { -- master->bus_num = -1; -- master->num_chipselect = 1; -- } -+ master->bus_num = pdata->bus_num; -+ master->num_chipselect = pdata->num_chipselect; - - sp->bitbang.master = spi_master_get(master); - sp->bitbang.chipselect = ath79_spi_chipselect; diff --git a/target/linux/ar71xx/patches-3.3/210-MIPS-ath79-simplify-misc-irq-handling.patch b/target/linux/ar71xx/patches-3.3/210-MIPS-ath79-simplify-misc-irq-handling.patch deleted file mode 100644 index 84a8ca36fc..0000000000 --- a/target/linux/ar71xx/patches-3.3/210-MIPS-ath79-simplify-misc-irq-handling.patch +++ /dev/null @@ -1,66 +0,0 @@ ---- a/arch/mips/ath79/irq.c -+++ b/arch/mips/ath79/irq.c -@@ -35,44 +35,17 @@ static void ath79_misc_irq_handler(unsig - pending = __raw_readl(base + AR71XX_RESET_REG_MISC_INT_STATUS) & - __raw_readl(base + AR71XX_RESET_REG_MISC_INT_ENABLE); - -- if (pending & MISC_INT_UART) -- generic_handle_irq(ATH79_MISC_IRQ_UART); -- -- else if (pending & MISC_INT_DMA) -- generic_handle_irq(ATH79_MISC_IRQ_DMA); -- -- else if (pending & MISC_INT_PERFC) -- generic_handle_irq(ATH79_MISC_IRQ_PERFC); -- -- else if (pending & MISC_INT_TIMER) -- generic_handle_irq(ATH79_MISC_IRQ_TIMER); -- -- else if (pending & MISC_INT_TIMER2) -- generic_handle_irq(ATH79_MISC_IRQ_TIMER2); -- -- else if (pending & MISC_INT_TIMER3) -- generic_handle_irq(ATH79_MISC_IRQ_TIMER3); -- -- else if (pending & MISC_INT_TIMER4) -- generic_handle_irq(ATH79_MISC_IRQ_TIMER4); -- -- else if (pending & MISC_INT_OHCI) -- generic_handle_irq(ATH79_MISC_IRQ_OHCI); -- -- else if (pending & MISC_INT_ERROR) -- generic_handle_irq(ATH79_MISC_IRQ_ERROR); -- -- else if (pending & MISC_INT_GPIO) -- generic_handle_irq(ATH79_MISC_IRQ_GPIO); -- -- else if (pending & MISC_INT_WDOG) -- generic_handle_irq(ATH79_MISC_IRQ_WDOG); -+ if (!pending) { -+ spurious_interrupt(); -+ return; -+ } - -- else if (pending & MISC_INT_ETHSW) -- generic_handle_irq(ATH79_MISC_IRQ_ETHSW); -+ while (pending) { -+ int bit = __ffs(pending); - -- else -- spurious_interrupt(); -+ generic_handle_irq(ATH79_MISC_IRQ(bit)); -+ pending &= ~BIT(bit); -+ } - } - - static void ar71xx_misc_irq_unmask(struct irq_data *d) ---- a/arch/mips/include/asm/mach-ath79/irq.h -+++ b/arch/mips/include/asm/mach-ath79/irq.h -@@ -14,6 +14,7 @@ - - #define ATH79_MISC_IRQ_BASE 8 - #define ATH79_MISC_IRQ_COUNT 32 -+#define ATH79_MISC_IRQ(_x) (ATH79_MISC_IRQ_BASE + (_x)) - - #define ATH79_PCI_IRQ_BASE (ATH79_MISC_IRQ_BASE + ATH79_MISC_IRQ_COUNT) - #define ATH79_PCI_IRQ_COUNT 6 diff --git a/target/linux/ar71xx/patches-3.3/211-ar933x_uart-improve-serial-clock-calculation.patch b/target/linux/ar71xx/patches-3.3/211-ar933x_uart-improve-serial-clock-calculation.patch deleted file mode 100644 index 510b75ed0f..0000000000 --- a/target/linux/ar71xx/patches-3.3/211-ar933x_uart-improve-serial-clock-calculation.patch +++ /dev/null @@ -1,181 +0,0 @@ ---- a/drivers/tty/serial/ar933x_uart.c -+++ b/drivers/tty/serial/ar933x_uart.c -@@ -25,11 +25,19 @@ - #include <linux/io.h> - #include <linux/irq.h> - -+#include <asm/div64.h> -+ - #include <asm/mach-ath79/ar933x_uart.h> - #include <asm/mach-ath79/ar933x_uart_platform.h> - - #define DRIVER_NAME "ar933x-uart" - -+#define AR933X_UART_MAX_SCALE 0xff -+#define AR933X_UART_MAX_STEP 0xffff -+ -+#define AR933X_UART_MIN_BAUD 300 -+#define AR933X_UART_MAX_BAUD 3000000 -+ - #define AR933X_DUMMY_STATUS_RD 0x01 - - static struct uart_driver ar933x_uart_driver; -@@ -37,6 +45,8 @@ static struct uart_driver ar933x_uart_dr - struct ar933x_uart_port { - struct uart_port port; - unsigned int ier; /* shadow Interrupt Enable Register */ -+ unsigned int min_baud; -+ unsigned int max_baud; - }; - - static inline unsigned int ar933x_uart_read(struct ar933x_uart_port *up, -@@ -162,6 +172,57 @@ static void ar933x_uart_enable_ms(struct - { - } - -+/* -+ * baudrate = (clk / (scale + 1)) * (step * (1 / 2^17)) -+ */ -+static unsigned long ar933x_uart_get_baud(unsigned int clk, -+ unsigned int scale, -+ unsigned int step) -+{ -+ u64 t; -+ u32 div; -+ -+ div = (2 << 16) * (scale + 1); -+ t = clk; -+ t *= step; -+ t += (div / 2); -+ do_div(t, div); -+ -+ return t; -+} -+ -+static void ar933x_uart_get_scale_step(unsigned int clk, -+ unsigned int baud, -+ unsigned int *scale, -+ unsigned int *step) -+{ -+ unsigned int tscale; -+ long min_diff; -+ -+ *scale = 0; -+ *step = 0; -+ -+ min_diff = baud; -+ for (tscale = 0; tscale < AR933X_UART_MAX_SCALE; tscale++) { -+ u64 tstep; -+ int diff; -+ -+ tstep = baud * (tscale + 1); -+ tstep *= (2 << 16); -+ do_div(tstep, clk); -+ -+ if (tstep > AR933X_UART_MAX_STEP) -+ break; -+ -+ diff = abs(ar933x_uart_get_baud(clk, tscale, tstep) - baud); -+ if (diff < min_diff) { -+ min_diff = diff; -+ *scale = tscale; -+ *step = tstep; -+ } -+ } -+} -+ - static void ar933x_uart_set_termios(struct uart_port *port, - struct ktermios *new, - struct ktermios *old) -@@ -169,7 +230,7 @@ static void ar933x_uart_set_termios(stru - struct ar933x_uart_port *up = (struct ar933x_uart_port *) port; - unsigned int cs; - unsigned long flags; -- unsigned int baud, scale; -+ unsigned int baud, scale, step; - - /* Only CS8 is supported */ - new->c_cflag &= ~CSIZE; -@@ -191,8 +252,8 @@ static void ar933x_uart_set_termios(stru - /* Mark/space parity is not supported */ - new->c_cflag &= ~CMSPAR; - -- baud = uart_get_baud_rate(port, new, old, 0, port->uartclk / 16); -- scale = (port->uartclk / (16 * baud)) - 1; -+ baud = uart_get_baud_rate(port, new, old, up->min_baud, up->max_baud); -+ ar933x_uart_get_scale_step(port->uartclk, baud, &scale, &step); - - /* - * Ok, we're now changing the port state. Do it with -@@ -200,6 +261,10 @@ static void ar933x_uart_set_termios(stru - */ - spin_lock_irqsave(&up->port.lock, flags); - -+ /* disable the UART */ -+ ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG, -+ AR933X_UART_CS_IF_MODE_M << AR933X_UART_CS_IF_MODE_S); -+ - /* Update the per-port timeout. */ - uart_update_timeout(port, new->c_cflag, baud); - -@@ -210,7 +275,7 @@ static void ar933x_uart_set_termios(stru - up->port.ignore_status_mask |= AR933X_DUMMY_STATUS_RD; - - ar933x_uart_write(up, AR933X_UART_CLOCK_REG, -- scale << AR933X_UART_CLOCK_SCALE_S | 8192); -+ scale << AR933X_UART_CLOCK_SCALE_S | step); - - /* setup configuration register */ - ar933x_uart_rmw(up, AR933X_UART_CS_REG, AR933X_UART_CS_PARITY_M, cs); -@@ -219,6 +284,11 @@ static void ar933x_uart_set_termios(stru - ar933x_uart_rmw_set(up, AR933X_UART_CS_REG, - AR933X_UART_CS_HOST_INT_EN); - -+ /* reenable the UART */ -+ ar933x_uart_rmw(up, AR933X_UART_CS_REG, -+ AR933X_UART_CS_IF_MODE_M << AR933X_UART_CS_IF_MODE_S, -+ AR933X_UART_CS_IF_MODE_DCE << AR933X_UART_CS_IF_MODE_S); -+ - spin_unlock_irqrestore(&up->port.lock, flags); - - if (tty_termios_baud_rate(new)) -@@ -401,6 +471,8 @@ static void ar933x_uart_config_port(stru - static int ar933x_uart_verify_port(struct uart_port *port, - struct serial_struct *ser) - { -+ struct ar933x_uart_port *up = (struct ar933x_uart_port *) port; -+ - if (ser->type != PORT_UNKNOWN && - ser->type != PORT_AR933X) - return -EINVAL; -@@ -408,7 +480,8 @@ static int ar933x_uart_verify_port(struc - if (ser->irq < 0 || ser->irq >= NR_IRQS) - return -EINVAL; - -- if (ser->baud_base < 28800) -+ if (ser->baud_base < up->min_baud || -+ ser->baud_base > up->max_baud) - return -EINVAL; - - return 0; -@@ -561,6 +634,7 @@ static int __devinit ar933x_uart_probe(s - struct uart_port *port; - struct resource *mem_res; - struct resource *irq_res; -+ unsigned int baud; - int id; - int ret; - -@@ -611,6 +685,12 @@ static int __devinit ar933x_uart_probe(s - port->fifosize = AR933X_UART_FIFO_SIZE; - port->ops = &ar933x_uart_ops; - -+ baud = ar933x_uart_get_baud(port->uartclk, AR933X_UART_MAX_SCALE, 1); -+ up->min_baud = max_t(unsigned int, baud, AR933X_UART_MIN_BAUD); -+ -+ baud = ar933x_uart_get_baud(port->uartclk, 0, AR933X_UART_MAX_STEP); -+ up->max_baud = min_t(unsigned int, baud, AR933X_UART_MAX_BAUD); -+ - ar933x_uart_add_console_port(up); - - ret = uart_add_one_port(&ar933x_uart_driver, &up->port); diff --git a/target/linux/ar71xx/patches-3.3/212-MIPS-ath79-fix-GPIO-function-selection-for-AR934x-So.patch b/target/linux/ar71xx/patches-3.3/212-MIPS-ath79-fix-GPIO-function-selection-for-AR934x-So.patch deleted file mode 100644 index 9ffb398ea4..0000000000 --- a/target/linux/ar71xx/patches-3.3/212-MIPS-ath79-fix-GPIO-function-selection-for-AR934x-So.patch +++ /dev/null @@ -1,106 +0,0 @@ -From 177dc53a07e2c660d1c1a6cec4576c802325e330 Mon Sep 17 00:00:00 2001 -From: Gabor Juhos <juhosg@openwrt.org> -Date: Wed, 14 Nov 2012 09:02:01 +0100 -Subject: [PATCH] MIPS: ath79: fix GPIO function selection for AR934x SoCs - -GPIO function selection is not working on the AR934x -SoCs because the offset of the function selection -register is different on those. - -Add a helper routine which returns the correct -register address based on the SoC type, and use -that in the 'ath79_gpio_function_*' routines. - -Signed-off-by: Gabor Juhos <juhosg@openwrt.org> ---- - arch/mips/ath79/gpio.c | 38 ++++++++++++++++-------- - arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 2 ++ - 2 files changed, 28 insertions(+), 12 deletions(-) - ---- a/arch/mips/ath79/gpio.c -+++ b/arch/mips/ath79/gpio.c -@@ -137,47 +137,61 @@ static struct gpio_chip ath79_gpio_chip - .base = 0, - }; - -+static void __iomem *ath79_gpio_get_function_reg(void) -+{ -+ u32 reg = 0; -+ -+ if (soc_is_ar71xx() || -+ soc_is_ar724x() || -+ soc_is_ar913x() || -+ soc_is_ar933x()) -+ reg = AR71XX_GPIO_REG_FUNC; -+ else if (soc_is_ar934x()) -+ reg = AR934X_GPIO_REG_FUNC; -+ else -+ BUG(); -+ -+ return ath79_gpio_base + reg; -+} -+ - void ath79_gpio_function_enable(u32 mask) - { -- void __iomem *base = ath79_gpio_base; -+ void __iomem *reg = ath79_gpio_get_function_reg(); - unsigned long flags; - - spin_lock_irqsave(&ath79_gpio_lock, flags); - -- __raw_writel(__raw_readl(base + AR71XX_GPIO_REG_FUNC) | mask, -- base + AR71XX_GPIO_REG_FUNC); -+ __raw_writel(__raw_readl(reg) | mask, reg); - /* flush write */ -- __raw_readl(base + AR71XX_GPIO_REG_FUNC); -+ __raw_readl(reg); - - spin_unlock_irqrestore(&ath79_gpio_lock, flags); - } - - void ath79_gpio_function_disable(u32 mask) - { -- void __iomem *base = ath79_gpio_base; -+ void __iomem *reg = ath79_gpio_get_function_reg(); - unsigned long flags; - - spin_lock_irqsave(&ath79_gpio_lock, flags); - -- __raw_writel(__raw_readl(base + AR71XX_GPIO_REG_FUNC) & ~mask, -- base + AR71XX_GPIO_REG_FUNC); -+ __raw_writel(__raw_readl(reg) & ~mask, reg); - /* flush write */ -- __raw_readl(base + AR71XX_GPIO_REG_FUNC); -+ __raw_readl(reg); - - spin_unlock_irqrestore(&ath79_gpio_lock, flags); - } - - void ath79_gpio_function_setup(u32 set, u32 clear) - { -- void __iomem *base = ath79_gpio_base; -+ void __iomem *reg = ath79_gpio_get_function_reg(); - unsigned long flags; - - spin_lock_irqsave(&ath79_gpio_lock, flags); - -- __raw_writel((__raw_readl(base + AR71XX_GPIO_REG_FUNC) & ~clear) | set, -- base + AR71XX_GPIO_REG_FUNC); -+ __raw_writel((__raw_readl(reg) & ~clear) | set, reg); - /* flush write */ -- __raw_readl(base + AR71XX_GPIO_REG_FUNC); -+ __raw_readl(reg); - - spin_unlock_irqrestore(&ath79_gpio_lock, flags); - } ---- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -@@ -520,6 +520,8 @@ - #define AR71XX_GPIO_REG_INT_ENABLE 0x24 - #define AR71XX_GPIO_REG_FUNC 0x28 - -+#define AR934X_GPIO_REG_FUNC 0x6c -+ - #define AR71XX_GPIO_COUNT 16 - #define AR724X_GPIO_COUNT 18 - #define AR913X_GPIO_COUNT 22 diff --git a/target/linux/ar71xx/patches-3.3/310-lib-add-rle-decompression.patch b/target/linux/ar71xx/patches-3.3/310-lib-add-rle-decompression.patch deleted file mode 100644 index 0cb9462294..0000000000 --- a/target/linux/ar71xx/patches-3.3/310-lib-add-rle-decompression.patch +++ /dev/null @@ -1,114 +0,0 @@ ---- a/lib/Kconfig -+++ b/lib/Kconfig -@@ -124,6 +124,9 @@ config LZMA_COMPRESS - config LZMA_DECOMPRESS - tristate - -+config RLE_DECOMPRESS -+ tristate -+ - # - # These all provide a common interface (hence the apparent duplication with - # ZLIB_INFLATE; DECOMPRESS_GZIP is just a wrapper.) ---- a/lib/Makefile -+++ b/lib/Makefile -@@ -85,6 +85,7 @@ obj-$(CONFIG_XZ_DEC) += xz/ - obj-$(CONFIG_RAID6_PQ) += raid6/ - obj-$(CONFIG_LZMA_COMPRESS) += lzma/ - obj-$(CONFIG_LZMA_DECOMPRESS) += lzma/ -+obj-$(CONFIG_RLE_DECOMPRESS) += rle.o - - lib-$(CONFIG_DECOMPRESS_GZIP) += decompress_inflate.o - lib-$(CONFIG_DECOMPRESS_BZIP2) += decompress_bunzip2.o ---- /dev/null -+++ b/include/linux/rle.h -@@ -0,0 +1,8 @@ -+#ifndef _RLE_H_ -+#define _RLE_H_ -+ -+int rle_decode(const unsigned char *src, size_t srclen, -+ unsigned char *dst, size_t dstlen, -+ size_t *src_done, size_t *dst_done); -+ -+#endif /* _RLE_H_ */ ---- /dev/null -+++ b/lib/rle.c -@@ -0,0 +1,78 @@ -+/* -+ * RLE decoding routine -+ * -+ * Copyright (C) 2012 Gabor Juhos <juhosg@openwrt.org> -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include <linux/kernel.h> -+#include <linux/module.h> -+#include <linux/rle.h> -+ -+int rle_decode(const unsigned char *src, size_t srclen, -+ unsigned char *dst, size_t dstlen, -+ size_t *src_done, size_t *dst_done) -+{ -+ size_t srcpos, dstpos; -+ int ret; -+ -+ srcpos = 0; -+ dstpos = 0; -+ ret = -EINVAL; -+ -+ /* sanity checks */ -+ if (!src || !srclen || !dst || !dstlen) -+ goto out; -+ -+ while (1) { -+ char count; -+ -+ if (srcpos >= srclen) -+ break; -+ -+ count = (char) src[srcpos++]; -+ if (count == 0) { -+ ret = 0; -+ break; -+ } -+ -+ if (count > 0) { -+ unsigned char c; -+ -+ if (srcpos >= srclen) -+ break; -+ -+ c = src[srcpos++]; -+ -+ while (count--) { -+ if (dstpos >= dstlen) -+ break; -+ -+ dst[dstpos++] = c; -+ } -+ } else { -+ count *= -1; -+ -+ while (count--) { -+ if (srcpos >= srclen) -+ break; -+ if (dstpos >= dstlen) -+ break; -+ dst[dstpos++] = src[srcpos++]; -+ } -+ } -+ } -+ -+out: -+ if (src_done) -+ *src_done = srcpos; -+ if (dst_done) -+ *dst_done = dstpos; -+ -+ return ret; -+} -+ -+EXPORT_SYMBOL_GPL(rle_decode); diff --git a/target/linux/ar71xx/patches-3.3/401-mtd-physmap-add-lock-unlock.patch b/target/linux/ar71xx/patches-3.3/401-mtd-physmap-add-lock-unlock.patch deleted file mode 100644 index 36e30c246b..0000000000 --- a/target/linux/ar71xx/patches-3.3/401-mtd-physmap-add-lock-unlock.patch +++ /dev/null @@ -1,94 +0,0 @@ ---- a/drivers/mtd/maps/physmap.c -+++ b/drivers/mtd/maps/physmap.c -@@ -29,6 +29,66 @@ struct physmap_flash_info { - struct map_info map[MAX_RESOURCES]; - }; - -+static struct platform_device *physmap_map2pdev(struct map_info *map) -+{ -+ return (struct platform_device *) map->map_priv_1; -+} -+ -+static void physmap_lock(struct map_info *map) -+{ -+ struct platform_device *pdev; -+ struct physmap_flash_data *physmap_data; -+ -+ pdev = physmap_map2pdev(map); -+ physmap_data = pdev->dev.platform_data; -+ physmap_data->lock(pdev); -+} -+ -+static void physmap_unlock(struct map_info *map) -+{ -+ struct platform_device *pdev; -+ struct physmap_flash_data *physmap_data; -+ -+ pdev = physmap_map2pdev(map); -+ physmap_data = pdev->dev.platform_data; -+ physmap_data->unlock(pdev); -+} -+ -+static map_word physmap_flash_read_lock(struct map_info *map, unsigned long ofs) -+{ -+ map_word ret; -+ -+ physmap_lock(map); -+ ret = inline_map_read(map, ofs); -+ physmap_unlock(map); -+ -+ return ret; -+} -+ -+static void physmap_flash_write_lock(struct map_info *map, map_word d, -+ unsigned long ofs) -+{ -+ physmap_lock(map); -+ inline_map_write(map, d, ofs); -+ physmap_unlock(map); -+} -+ -+static void physmap_flash_copy_from_lock(struct map_info *map, void *to, -+ unsigned long from, ssize_t len) -+{ -+ physmap_lock(map); -+ inline_map_copy_from(map, to, from, len); -+ physmap_unlock(map); -+} -+ -+static void physmap_flash_copy_to_lock(struct map_info *map, unsigned long to, -+ const void *from, ssize_t len) -+{ -+ physmap_lock(map); -+ inline_map_copy_to(map, to, from, len); -+ physmap_unlock(map); -+} -+ - static int physmap_flash_remove(struct platform_device *dev) - { - struct physmap_flash_info *info; -@@ -141,6 +201,13 @@ static int physmap_flash_probe(struct pl - - simple_map_init(&info->map[i]); - -+ if (physmap_data->lock && physmap_data->unlock) { -+ info->map[i].read = physmap_flash_read_lock; -+ info->map[i].write = physmap_flash_write_lock; -+ info->map[i].copy_from = physmap_flash_copy_from_lock; -+ info->map[i].copy_to = physmap_flash_copy_to_lock; -+ } -+ - probe_type = rom_probe_types; - if (physmap_data->probe_type == NULL) { - for (; info->mtd[i] == NULL && *probe_type != NULL; probe_type++) ---- a/include/linux/mtd/physmap.h -+++ b/include/linux/mtd/physmap.h -@@ -26,6 +26,8 @@ struct physmap_flash_data { - unsigned int width; - int (*init)(struct platform_device *); - void (*exit)(struct platform_device *); -+ void (*lock)(struct platform_device *); -+ void (*unlock)(struct platform_device *); - void (*set_vpp)(struct platform_device *, int); - unsigned int nr_parts; - unsigned int pfow_base; diff --git a/target/linux/ar71xx/patches-3.3/402-mtd-SST39VF6401B-support.patch b/target/linux/ar71xx/patches-3.3/402-mtd-SST39VF6401B-support.patch deleted file mode 100644 index 246abd5dc0..0000000000 --- a/target/linux/ar71xx/patches-3.3/402-mtd-SST39VF6401B-support.patch +++ /dev/null @@ -1,29 +0,0 @@ ---- a/drivers/mtd/chips/jedec_probe.c -+++ b/drivers/mtd/chips/jedec_probe.c -@@ -148,6 +148,7 @@ - #define SST39LF160 0x2782 - #define SST39VF1601 0x234b - #define SST39VF3201 0x235b -+#define SST39VF6401B 0x236d - #define SST39WF1601 0x274b - #define SST39WF1602 0x274a - #define SST39LF512 0x00D4 -@@ -1568,6 +1569,18 @@ static const struct amd_flash_info jedec - ERASEINFO(0x10000,64), - } - }, { -+ .mfr_id = CFI_MFR_SST, -+ .dev_id = SST39VF6401B, -+ .name = "SST 39VF6401B", -+ .devtypes = CFI_DEVICETYPE_X16, -+ .uaddr = MTD_UADDR_0xAAAA_0x5555, -+ .dev_size = SIZE_8MiB, -+ .cmd_set = P_ID_AMD_STD, -+ .nr_regions = 1, -+ .regions = { -+ ERASEINFO(0x10000,128) -+ } -+ }, { - .mfr_id = CFI_MFR_ST, - .dev_id = M29F800AB, - .name = "ST M29F800AB", diff --git a/target/linux/ar71xx/patches-3.3/403-mtd_fix_cfi_cmdset_0002_status_check.patch b/target/linux/ar71xx/patches-3.3/403-mtd_fix_cfi_cmdset_0002_status_check.patch deleted file mode 100644 index 9ed059822b..0000000000 --- a/target/linux/ar71xx/patches-3.3/403-mtd_fix_cfi_cmdset_0002_status_check.patch +++ /dev/null @@ -1,69 +0,0 @@ ---- a/drivers/mtd/chips/cfi_cmdset_0002.c -+++ b/drivers/mtd/chips/cfi_cmdset_0002.c -@@ -1214,8 +1214,8 @@ static int __xipram do_write_oneword(str - break; - } - -- if (chip_ready(map, adr)) -- break; -+ if (chip_good(map, adr, datum)) -+ goto enable_xip; - - /* Latency issues. Drop the lock, wait a while and retry */ - UDELAY(map, chip, adr, 1); -@@ -1231,6 +1231,8 @@ static int __xipram do_write_oneword(str - - ret = -EIO; - } -+ -+ enable_xip: - xip_enable(map, chip, adr); - op_done: - chip->state = FL_READY; -@@ -1563,7 +1565,6 @@ static int cfi_amdstd_write_buffers(stru - return 0; - } - -- - /* - * Handle devices with one erase region, that only implement - * the chip erase command. -@@ -1627,8 +1628,8 @@ static int __xipram do_erase_chip(struct - chip->erase_suspended = 0; - } - -- if (chip_ready(map, adr)) -- break; -+ if (chip_good(map, adr, map_word_ff(map))) -+ goto op_done; - - if (time_after(jiffies, timeo)) { - printk(KERN_WARNING "MTD %s(): software timeout\n", -@@ -1648,6 +1649,7 @@ static int __xipram do_erase_chip(struct - ret = -EIO; - } - -+ op_done: - chip->state = FL_READY; - xip_enable(map, chip, adr); - put_chip(map, chip, adr); -@@ -1715,9 +1717,9 @@ static int __xipram do_erase_oneblock(st - chip->erase_suspended = 0; - } - -- if (chip_ready(map, adr)) { -+ if (chip_good(map, adr, map_word_ff(map))) { - xip_enable(map, chip, adr); -- break; -+ goto op_done; - } - - if (time_after(jiffies, timeo)) { -@@ -1739,6 +1741,7 @@ static int __xipram do_erase_oneblock(st - ret = -EIO; - } - -+ op_done: - chip->state = FL_READY; - put_chip(map, chip, adr); - mutex_unlock(&chip->mutex); diff --git a/target/linux/ar71xx/patches-3.3/404-mtd-wrt160nl-trx-parser.patch b/target/linux/ar71xx/patches-3.3/404-mtd-wrt160nl-trx-parser.patch deleted file mode 100644 index 75bfbc315b..0000000000 --- a/target/linux/ar71xx/patches-3.3/404-mtd-wrt160nl-trx-parser.patch +++ /dev/null @@ -1,25 +0,0 @@ ---- a/drivers/mtd/Kconfig -+++ b/drivers/mtd/Kconfig -@@ -156,6 +156,12 @@ config MTD_BCM63XX_PARTS - This provides partions parsing for BCM63xx devices with CFE - bootloaders. - -+config MTD_WRT160NL_PARTS -+ tristate "Linksys WRT160NL partitioning support" -+ depends on MTD_PARTITIONS && ATH79_MACH_WRT160NL -+ ---help--- -+ Linksys WRT160NL partitioning support -+ - config MTD_MYLOADER_PARTS - tristate "MyLoader partition parsing" - depends on ADM5120 || ATHEROS_AR231X || ATHEROS_AR71XX || ATH79 ---- a/drivers/mtd/Makefile -+++ b/drivers/mtd/Makefile -@@ -13,6 +13,7 @@ obj-$(CONFIG_MTD_AFS_PARTS) += afs.o - obj-$(CONFIG_MTD_AR7_PARTS) += ar7part.o - obj-$(CONFIG_MTD_BCM63XX_PARTS) += bcm63xxpart.o - obj-$(CONFIG_MTD_MYLOADER_PARTS) += myloader.o -+obj-$(CONFIG_MTD_WRT160NL_PARTS) += wrt160nl_part.o - - # 'Users' - code which presents functionality to userspace. - obj-$(CONFIG_MTD_CHAR) += mtdchar.o diff --git a/target/linux/ar71xx/patches-3.3/405-mtd-tp-link-partition-parser.patch b/target/linux/ar71xx/patches-3.3/405-mtd-tp-link-partition-parser.patch deleted file mode 100644 index 021491591a..0000000000 --- a/target/linux/ar71xx/patches-3.3/405-mtd-tp-link-partition-parser.patch +++ /dev/null @@ -1,34 +0,0 @@ ---- a/drivers/mtd/Kconfig -+++ b/drivers/mtd/Kconfig -@@ -158,7 +158,7 @@ config MTD_BCM63XX_PARTS - - config MTD_WRT160NL_PARTS - tristate "Linksys WRT160NL partitioning support" -- depends on MTD_PARTITIONS && ATH79_MACH_WRT160NL -+ depends on ATH79_MACH_WRT160NL - ---help--- - Linksys WRT160NL partitioning support - -@@ -178,6 +178,12 @@ config MTD_MYLOADER_PARTS - You will still need the parsing functions to be called by the driver - for your particular device. It won't happen automatically. - -+config MTD_TPLINK_PARTS -+ tristate "TP-Link AR7XXX/AR9XXX partitioning support" -+ depends on ATH79 -+ ---help--- -+ TBD. -+ - comment "User Modules And Translation Layers" - - config MTD_CHAR ---- a/drivers/mtd/Makefile -+++ b/drivers/mtd/Makefile -@@ -13,6 +13,7 @@ obj-$(CONFIG_MTD_AFS_PARTS) += afs.o - obj-$(CONFIG_MTD_AR7_PARTS) += ar7part.o - obj-$(CONFIG_MTD_BCM63XX_PARTS) += bcm63xxpart.o - obj-$(CONFIG_MTD_MYLOADER_PARTS) += myloader.o -+obj-$(CONFIG_MTD_TPLINK_PARTS) += tplinkpart.o - obj-$(CONFIG_MTD_WRT160NL_PARTS) += wrt160nl_part.o - - # 'Users' - code which presents functionality to userspace. diff --git a/target/linux/ar71xx/patches-3.3/406-mtd-m25p80-allow-to-specify-max-read-size.patch b/target/linux/ar71xx/patches-3.3/406-mtd-m25p80-allow-to-specify-max-read-size.patch deleted file mode 100644 index 8861c615fa..0000000000 --- a/target/linux/ar71xx/patches-3.3/406-mtd-m25p80-allow-to-specify-max-read-size.patch +++ /dev/null @@ -1,112 +0,0 @@ ---- a/drivers/mtd/devices/m25p80.c -+++ b/drivers/mtd/devices/m25p80.c -@@ -100,6 +100,7 @@ struct m25p { - u16 addr_width; - u8 erase_opcode; - u8 *command; -+ size_t max_read_len; - }; - - static inline struct m25p *mtd_to_m25p(struct mtd_info *mtd) -@@ -352,6 +353,7 @@ static int m25p80_read(struct mtd_info * - struct m25p *flash = mtd_to_m25p(mtd); - struct spi_transfer t[2]; - struct spi_message m; -+ loff_t ofs; - - pr_debug("%s: %s from 0x%08x, len %zd\n", dev_name(&flash->spi->dev), - __func__, (u32)from, len); -@@ -374,8 +376,6 @@ static int m25p80_read(struct mtd_info * - t[0].len = m25p_cmdsz(flash) + FAST_READ_DUMMY_BYTE; - spi_message_add_tail(&t[0], &m); - -- t[1].rx_buf = buf; -- t[1].len = len; - spi_message_add_tail(&t[1], &m); - - /* Byte count starts at zero. */ -@@ -383,13 +383,6 @@ static int m25p80_read(struct mtd_info * - - mutex_lock(&flash->lock); - -- /* Wait till previous write/erase is done. */ -- if (wait_till_ready(flash)) { -- /* REVISIT status return?? */ -- mutex_unlock(&flash->lock); -- return 1; -- } -- - /* FIXME switch to OPCODE_FAST_READ. It's required for higher - * clocks; and at this writing, every chip this driver handles - * supports that opcode. -@@ -397,11 +390,44 @@ static int m25p80_read(struct mtd_info * - - /* Set up the write data buffer. */ - flash->command[0] = OPCODE_READ; -- m25p_addr2cmd(flash, from, flash->command); - -- spi_sync(flash->spi, &m); -+ ofs = 0; -+ while (len) { -+ size_t readlen; -+ size_t done; -+ int ret; -+ -+ ret = wait_till_ready(flash); -+ if (ret) { -+ mutex_unlock(&flash->lock); -+ return 1; -+ } -+ -+ if (flash->max_read_len > 0 && -+ flash->max_read_len < len) -+ readlen = flash->max_read_len; -+ else -+ readlen = len; -+ -+ t[1].rx_buf = buf + ofs; -+ t[1].len = readlen; -+ -+ m25p_addr2cmd(flash, from + ofs, flash->command); -+ -+ spi_sync(flash->spi, &m); - -- *retlen = m.actual_length - m25p_cmdsz(flash) - FAST_READ_DUMMY_BYTE; -+ done = m.actual_length - m25p_cmdsz(flash) - -+ FAST_READ_DUMMY_BYTE; -+ if (done != readlen) { -+ mutex_unlock(&flash->lock); -+ return 1; -+ } -+ -+ ofs += done; -+ len -= done; -+ } -+ -+ *retlen = ofs; - - mutex_unlock(&flash->lock); - -@@ -925,6 +951,12 @@ static int __devinit m25p_probe(struct s - flash->mtd.erase = m25p80_erase; - flash->mtd.read = m25p80_read; - -+ if (data && data->max_read_len) { -+ flash->max_read_len = data->max_read_len; -+ dev_warn(&spi->dev, "max_read_len set to %d bytes\n", -+ flash->max_read_len); -+ } -+ - /* sst flash chips use AAI word program */ - if (JEDEC_MFR(info->jedec_id) == CFI_MFR_SST) - flash->mtd.write = sst_write; ---- a/include/linux/spi/flash.h -+++ b/include/linux/spi/flash.h -@@ -25,6 +25,7 @@ struct flash_platform_data { - - char *type; - -+ size_t max_read_len; - /* we'll likely add more ... use JEDEC IDs, etc */ - }; - diff --git a/target/linux/ar71xx/patches-3.3/407-mtd-m25p80-allow-to-pass-probe-types-via-platform-data.patch b/target/linux/ar71xx/patches-3.3/407-mtd-m25p80-allow-to-pass-probe-types-via-platform-data.patch deleted file mode 100644 index 14f2de536c..0000000000 --- a/target/linux/ar71xx/patches-3.3/407-mtd-m25p80-allow-to-pass-probe-types-via-platform-data.patch +++ /dev/null @@ -1,23 +0,0 @@ ---- a/drivers/mtd/devices/m25p80.c -+++ b/drivers/mtd/devices/m25p80.c -@@ -1018,7 +1018,9 @@ static int __devinit m25p_probe(struct s - /* partitions should match sector boundaries; and it may be good to - * use readonly partitions for writeprotected sectors (BP2..BP0). - */ -- return mtd_device_parse_register(&flash->mtd, NULL, &ppdata, -+ return mtd_device_parse_register(&flash->mtd, -+ data ? data->part_probes : NULL, -+ &ppdata, - data ? data->parts : NULL, - data ? data->nr_parts : 0); - } ---- a/include/linux/spi/flash.h -+++ b/include/linux/spi/flash.h -@@ -24,6 +24,7 @@ struct flash_platform_data { - unsigned int nr_parts; - - char *type; -+ const char **part_probes; - - size_t max_read_len; - /* we'll likely add more ... use JEDEC IDs, etc */ diff --git a/target/linux/ar71xx/patches-3.3/408-mtd-redboot_partition_scan.patch b/target/linux/ar71xx/patches-3.3/408-mtd-redboot_partition_scan.patch deleted file mode 100644 index 59c0b08783..0000000000 --- a/target/linux/ar71xx/patches-3.3/408-mtd-redboot_partition_scan.patch +++ /dev/null @@ -1,45 +0,0 @@ ---- a/drivers/mtd/redboot.c -+++ b/drivers/mtd/redboot.c -@@ -76,6 +76,11 @@ static int parse_redboot_partitions(stru - static char nullstring[] = "unallocated"; - #endif - -+ buf = vmalloc(master->erasesize); -+ if (!buf) -+ return -ENOMEM; -+ -+ restart: - if ( directory < 0 ) { - offset = master->size + directory * master->erasesize; - while (mtd_can_have_bb(master) && -@@ -83,6 +88,7 @@ static int parse_redboot_partitions(stru - if (!offset) { - nogood: - printk(KERN_NOTICE "Failed to find a non-bad block to check for RedBoot partition table\n"); -+ vfree(buf); - return -EIO; - } - offset -= master->erasesize; -@@ -96,10 +102,6 @@ static int parse_redboot_partitions(stru - goto nogood; - } - } -- buf = vmalloc(master->erasesize); -- -- if (!buf) -- return -ENOMEM; - - printk(KERN_NOTICE "Searching for RedBoot partition table in %s at offset 0x%lx\n", - master->name, offset); -@@ -172,6 +174,11 @@ static int parse_redboot_partitions(stru - } - if (i == numslots) { - /* Didn't find it */ -+ if (offset + master->erasesize < master->size) { -+ /* not at the end of the flash yet, maybe next block :) */ -+ directory++; -+ goto restart; -+ } - printk(KERN_NOTICE "No RedBoot partition table detected in %s\n", - master->name); - ret = 0; diff --git a/target/linux/ar71xx/patches-3.3/409-mtd-rb4xx_nand_driver.patch b/target/linux/ar71xx/patches-3.3/409-mtd-rb4xx_nand_driver.patch deleted file mode 100644 index e1a339890f..0000000000 --- a/target/linux/ar71xx/patches-3.3/409-mtd-rb4xx_nand_driver.patch +++ /dev/null @@ -1,21 +0,0 @@ ---- a/drivers/mtd/nand/Kconfig -+++ b/drivers/mtd/nand/Kconfig -@@ -536,4 +536,8 @@ config MTD_NAND_FSMC - Enables support for NAND Flash chips on the ST Microelectronics - Flexible Static Memory Controller (FSMC) - -+config MTD_NAND_RB4XX -+ tristate "NAND flash driver for RouterBoard 4xx series" -+ depends on MTD_NAND && ATH79_MACH_RB4XX -+ - endif # MTD_NAND ---- a/drivers/mtd/nand/Makefile -+++ b/drivers/mtd/nand/Makefile -@@ -33,6 +33,7 @@ obj-$(CONFIG_MTD_NAND_CM_X270) += cmx27 - obj-$(CONFIG_MTD_NAND_PXA3xx) += pxa3xx_nand.o - obj-$(CONFIG_MTD_NAND_TMIO) += tmio_nand.o - obj-$(CONFIG_MTD_NAND_PLATFORM) += plat_nand.o -+obj-$(CONFIG_MTD_NAND_RB4XX) += rb4xx_nand.o - obj-$(CONFIG_MTD_ALAUDA) += alauda.o - obj-$(CONFIG_MTD_NAND_PASEMI) += pasemi_nand.o - obj-$(CONFIG_MTD_NAND_ORION) += orion_nand.o diff --git a/target/linux/ar71xx/patches-3.3/410-mtd-rb750-nand-driver.patch b/target/linux/ar71xx/patches-3.3/410-mtd-rb750-nand-driver.patch deleted file mode 100644 index d67f720d69..0000000000 --- a/target/linux/ar71xx/patches-3.3/410-mtd-rb750-nand-driver.patch +++ /dev/null @@ -1,21 +0,0 @@ ---- a/drivers/mtd/nand/Kconfig -+++ b/drivers/mtd/nand/Kconfig -@@ -540,4 +540,8 @@ config MTD_NAND_RB4XX - tristate "NAND flash driver for RouterBoard 4xx series" - depends on MTD_NAND && ATH79_MACH_RB4XX - -+config MTD_NAND_RB750 -+ tristate "NAND flash driver for the RouterBoard 750" -+ depends on MTD_NAND && ATH79_MACH_RB750 -+ - endif # MTD_NAND ---- a/drivers/mtd/nand/Makefile -+++ b/drivers/mtd/nand/Makefile -@@ -34,6 +34,7 @@ obj-$(CONFIG_MTD_NAND_PXA3xx) += pxa3xx - obj-$(CONFIG_MTD_NAND_TMIO) += tmio_nand.o - obj-$(CONFIG_MTD_NAND_PLATFORM) += plat_nand.o - obj-$(CONFIG_MTD_NAND_RB4XX) += rb4xx_nand.o -+obj-$(CONFIG_MTD_NAND_RB750) += rb750_nand.o - obj-$(CONFIG_MTD_ALAUDA) += alauda.o - obj-$(CONFIG_MTD_NAND_PASEMI) += pasemi_nand.o - obj-$(CONFIG_MTD_NAND_ORION) += orion_nand.o diff --git a/target/linux/ar71xx/patches-3.3/411-mtd-cfi_cmdset_0002-force-word-write.patch b/target/linux/ar71xx/patches-3.3/411-mtd-cfi_cmdset_0002-force-word-write.patch deleted file mode 100644 index e4e879b5b9..0000000000 --- a/target/linux/ar71xx/patches-3.3/411-mtd-cfi_cmdset_0002-force-word-write.patch +++ /dev/null @@ -1,61 +0,0 @@ ---- a/drivers/mtd/chips/cfi_cmdset_0002.c -+++ b/drivers/mtd/chips/cfi_cmdset_0002.c -@@ -39,7 +39,7 @@ - #include <linux/mtd/xip.h> - - #define AMD_BOOTLOC_BUG --#define FORCE_WORD_WRITE 0 -+#define FORCE_WORD_WRITE 1 - - #define MAX_WORD_RETRIES 3 - -@@ -50,7 +50,9 @@ - - static int cfi_amdstd_read (struct mtd_info *, loff_t, size_t, size_t *, u_char *); - static int cfi_amdstd_write_words(struct mtd_info *, loff_t, size_t, size_t *, const u_char *); -+#if !FORCE_WORD_WRITE - static int cfi_amdstd_write_buffers(struct mtd_info *, loff_t, size_t, size_t *, const u_char *); -+#endif - static int cfi_amdstd_erase_chip(struct mtd_info *, struct erase_info *); - static int cfi_amdstd_erase_varsize(struct mtd_info *, struct erase_info *); - static void cfi_amdstd_sync (struct mtd_info *); -@@ -183,6 +185,7 @@ static void fixup_amd_bootblock(struct m - } - #endif - -+#if !FORCE_WORD_WRITE - static void fixup_use_write_buffers(struct mtd_info *mtd) - { - struct map_info *map = mtd->priv; -@@ -192,6 +195,7 @@ static void fixup_use_write_buffers(stru - mtd->write = cfi_amdstd_write_buffers; - } - } -+#endif /* !FORCE_WORD_WRITE */ - - /* Atmel chips don't use the same PRI format as AMD chips */ - static void fixup_convert_atmel_pri(struct mtd_info *mtd) -@@ -1374,6 +1378,7 @@ static int cfi_amdstd_write_words(struct - /* - * FIXME: interleaved mode not tested, and probably not supported! - */ -+#if !FORCE_WORD_WRITE - static int __xipram do_write_buffer(struct map_info *map, struct flchip *chip, - unsigned long adr, const u_char *buf, - int len) -@@ -1485,7 +1490,6 @@ static int __xipram do_write_buffer(stru - return ret; - } - -- - static int cfi_amdstd_write_buffers(struct mtd_info *mtd, loff_t to, size_t len, - size_t *retlen, const u_char *buf) - { -@@ -1564,6 +1568,7 @@ static int cfi_amdstd_write_buffers(stru - - return 0; - } -+#endif /* !FORCE_WORD_WRITE */ - - /* - * Handle devices with one erase region, that only implement diff --git a/target/linux/ar71xx/patches-3.3/412-mtd-m25p80-zero-partition-parser-data.patch b/target/linux/ar71xx/patches-3.3/412-mtd-m25p80-zero-partition-parser-data.patch deleted file mode 100644 index a667139d01..0000000000 --- a/target/linux/ar71xx/patches-3.3/412-mtd-m25p80-zero-partition-parser-data.patch +++ /dev/null @@ -1,10 +0,0 @@ ---- a/drivers/mtd/devices/m25p80.c -+++ b/drivers/mtd/devices/m25p80.c -@@ -978,6 +978,7 @@ static int __devinit m25p_probe(struct s - if (info->flags & M25P_NO_ERASE) - flash->mtd.flags |= MTD_NO_ERASE; - -+ memset(&ppdata, '\0', sizeof(ppdata)); - ppdata.of_node = spi->dev.of_node; - flash->mtd.dev.parent = &spi->dev; - flash->page_size = info->page_size; diff --git a/target/linux/ar71xx/patches-3.3/413-mtd-ar934x-nand-driver.patch b/target/linux/ar71xx/patches-3.3/413-mtd-ar934x-nand-driver.patch deleted file mode 100644 index 289458fbd9..0000000000 --- a/target/linux/ar71xx/patches-3.3/413-mtd-ar934x-nand-driver.patch +++ /dev/null @@ -1,21 +0,0 @@ ---- a/drivers/mtd/nand/Kconfig -+++ b/drivers/mtd/nand/Kconfig -@@ -544,4 +544,8 @@ config MTD_NAND_RB750 - tristate "NAND flash driver for the RouterBoard 750" - depends on MTD_NAND && ATH79_MACH_RB750 - -+config MTD_NAND_AR934X -+ tristate "NAND flash driver for the Atheros AR934x SoCs" -+ depends on SOC_AR934X -+ - endif # MTD_NAND ---- a/drivers/mtd/nand/Makefile -+++ b/drivers/mtd/nand/Makefile -@@ -11,6 +11,7 @@ obj-$(CONFIG_MTD_SM_COMMON) += sm_comm - obj-$(CONFIG_MTD_NAND_CAFE) += cafe_nand.o - obj-$(CONFIG_MTD_NAND_SPIA) += spia.o - obj-$(CONFIG_MTD_NAND_AMS_DELTA) += ams-delta.o -+obj-$(CONFIG_MTD_NAND_AR934X) += ar934x_nfc.o - obj-$(CONFIG_MTD_NAND_AUTCPU12) += autcpu12.o - obj-$(CONFIG_MTD_NAND_DENALI) += denali.o - obj-$(CONFIG_MTD_NAND_AU1550) += au1550nd.o diff --git a/target/linux/ar71xx/patches-3.3/420-net-ar71xx_mac_driver.patch b/target/linux/ar71xx/patches-3.3/420-net-ar71xx_mac_driver.patch deleted file mode 100644 index f117133169..0000000000 --- a/target/linux/ar71xx/patches-3.3/420-net-ar71xx_mac_driver.patch +++ /dev/null @@ -1,28 +0,0 @@ ---- a/drivers/net/ethernet/atheros/Kconfig -+++ b/drivers/net/ethernet/atheros/Kconfig -@@ -5,7 +5,7 @@ - config NET_VENDOR_ATHEROS - bool "Atheros devices" - default y -- depends on PCI -+ depends on (PCI || ATH79) - ---help--- - If you have a network (Ethernet) card belonging to this class, say Y - and read the Ethernet-HOWTO, available from -@@ -67,4 +67,6 @@ config ATL1C - To compile this driver as a module, choose M here. The module - will be called atl1c. - -+source drivers/net/ethernet/atheros/ag71xx/Kconfig -+ - endif # NET_VENDOR_ATHEROS ---- a/drivers/net/ethernet/atheros/Makefile -+++ b/drivers/net/ethernet/atheros/Makefile -@@ -2,6 +2,7 @@ - # Makefile for the Atheros network device drivers. - # - -+obj-$(CONFIG_AG71XX) += ag71xx/ - obj-$(CONFIG_ATL1) += atlx/ - obj-$(CONFIG_ATL2) += atlx/ - obj-$(CONFIG_ATL1E) += atl1e/ diff --git a/target/linux/ar71xx/patches-3.3/422-dsa-trailer-tag-validation-fix.patch b/target/linux/ar71xx/patches-3.3/422-dsa-trailer-tag-validation-fix.patch deleted file mode 100644 index 3e3902bac0..0000000000 --- a/target/linux/ar71xx/patches-3.3/422-dsa-trailer-tag-validation-fix.patch +++ /dev/null @@ -1,11 +0,0 @@ ---- a/net/dsa/tag_trailer.c -+++ b/net/dsa/tag_trailer.c -@@ -87,7 +87,7 @@ static int trailer_rcv(struct sk_buff *s - - trailer = skb_tail_pointer(skb) - 4; - if (trailer[0] != 0x80 || (trailer[1] & 0xf8) != 0x00 || -- (trailer[3] & 0xef) != 0x00 || trailer[3] != 0x00) -+ (trailer[2] & 0xef) != 0x00 || (trailer[3] & 0xfe) != 0x00) - goto out_drop; - - source_port = trailer[1] & 7; diff --git a/target/linux/ar71xx/patches-3.3/423-dsa-add-88e6063-driver.patch b/target/linux/ar71xx/patches-3.3/423-dsa-add-88e6063-driver.patch deleted file mode 100644 index bfb0b8e75c..0000000000 --- a/target/linux/ar71xx/patches-3.3/423-dsa-add-88e6063-driver.patch +++ /dev/null @@ -1,24 +0,0 @@ ---- a/drivers/net/dsa/Kconfig -+++ b/drivers/net/dsa/Kconfig -@@ -12,6 +12,13 @@ config NET_DSA_MV88E6060 - This enables support for the Marvell 88E6060 ethernet switch - chip. - -+config NET_DSA_MV88E6063 -+ bool "Marvell 88E6063 ethernet switch chip support" -+ select NET_DSA_TAG_TRAILER -+ ---help--- -+ This enables support for the Marvell 88E6063 ethernet switch -+ chip -+ - config NET_DSA_MV88E6XXX_NEED_PPU - bool - default n ---- a/drivers/net/dsa/Makefile -+++ b/drivers/net/dsa/Makefile -@@ -1,4 +1,5 @@ - obj-$(CONFIG_NET_DSA_MV88E6060) += mv88e6060.o -+obj-$(CONFIG_NET_DSA_MV88E6063) += mv88e6063.o - obj-$(CONFIG_NET_DSA_MV88E6XXX) += mv88e6xxx_drv.o - mv88e6xxx_drv-y += mv88e6xxx.o - ifdef CONFIG_NET_DSA_MV88E6123_61_65 diff --git a/target/linux/ar71xx/patches-3.3/430-drivers-link-spi-before-mtd.patch b/target/linux/ar71xx/patches-3.3/430-drivers-link-spi-before-mtd.patch deleted file mode 100644 index f54861be6c..0000000000 --- a/target/linux/ar71xx/patches-3.3/430-drivers-link-spi-before-mtd.patch +++ /dev/null @@ -1,12 +0,0 @@ ---- a/drivers/Makefile -+++ b/drivers/Makefile -@@ -52,8 +52,8 @@ obj-$(CONFIG_IDE) += ide/ - obj-$(CONFIG_SCSI) += scsi/ - obj-$(CONFIG_ATA) += ata/ - obj-$(CONFIG_TARGET_CORE) += target/ --obj-$(CONFIG_MTD) += mtd/ - obj-$(CONFIG_SPI) += spi/ -+obj-$(CONFIG_MTD) += mtd/ - obj-y += net/ - obj-$(CONFIG_ATM) += atm/ - obj-$(CONFIG_FUSION) += message/ diff --git a/target/linux/ar71xx/patches-3.3/431-spi-add-various-flags.patch b/target/linux/ar71xx/patches-3.3/431-spi-add-various-flags.patch deleted file mode 100644 index 67ba43f0cd..0000000000 --- a/target/linux/ar71xx/patches-3.3/431-spi-add-various-flags.patch +++ /dev/null @@ -1,19 +0,0 @@ ---- a/include/linux/spi/spi.h -+++ b/include/linux/spi/spi.h -@@ -503,6 +503,8 @@ struct spi_transfer { - dma_addr_t rx_dma; - - unsigned cs_change:1; -+ unsigned verify:1; -+ unsigned fast_write:1; - u8 bits_per_word; - u16 delay_usecs; - u32 speed_hz; -@@ -544,6 +546,7 @@ struct spi_message { - struct spi_device *spi; - - unsigned is_dma_mapped:1; -+ unsigned fast_read:1; - - /* REVISIT: we might want a flag affecting the behavior of the - * last transfer ... allowing things like "read 16 bit length L" diff --git a/target/linux/ar71xx/patches-3.3/432-spi-rb4xx-spi-driver.patch b/target/linux/ar71xx/patches-3.3/432-spi-rb4xx-spi-driver.patch deleted file mode 100644 index 6cfe2e832e..0000000000 --- a/target/linux/ar71xx/patches-3.3/432-spi-rb4xx-spi-driver.patch +++ /dev/null @@ -1,25 +0,0 @@ ---- a/drivers/spi/Kconfig -+++ b/drivers/spi/Kconfig -@@ -288,6 +288,12 @@ config SPI_PXA2XX - config SPI_PXA2XX_PCI - def_bool SPI_PXA2XX && X86_32 && PCI - -+config SPI_RB4XX -+ tristate "Mikrotik RB4XX SPI master" -+ depends on SPI_MASTER && ATH79_MACH_RB4XX -+ help -+ SPI controller driver for the Mikrotik RB4xx series boards. -+ - config SPI_S3C24XX - tristate "Samsung S3C24XX series SPI" - depends on ARCH_S3C2410 && EXPERIMENTAL ---- a/drivers/spi/Makefile -+++ b/drivers/spi/Makefile -@@ -45,6 +45,7 @@ obj-$(CONFIG_SPI_PL022) += spi-pl022.o - obj-$(CONFIG_SPI_PPC4xx) += spi-ppc4xx.o - obj-$(CONFIG_SPI_PXA2XX) += spi-pxa2xx.o - obj-$(CONFIG_SPI_PXA2XX_PCI) += spi-pxa2xx-pci.o -+obj-$(CONFIG_SPI_RB4XX) += spi-rb4xx.o - obj-$(CONFIG_SPI_S3C24XX) += spi-s3c24xx-hw.o - spi-s3c24xx-hw-y := spi-s3c24xx.o - spi-s3c24xx-hw-$(CONFIG_SPI_S3C24XX_FIQ) += spi-s3c24xx-fiq.o diff --git a/target/linux/ar71xx/patches-3.3/433-spi-rb4xx-cpld-driver.patch b/target/linux/ar71xx/patches-3.3/433-spi-rb4xx-cpld-driver.patch deleted file mode 100644 index 579315b3a8..0000000000 --- a/target/linux/ar71xx/patches-3.3/433-spi-rb4xx-cpld-driver.patch +++ /dev/null @@ -1,26 +0,0 @@ ---- a/drivers/spi/Kconfig -+++ b/drivers/spi/Kconfig -@@ -439,6 +439,13 @@ config SPI_TLE62X0 - sysfs interface, with each line presented as a kind of GPIO - exposing both switch control and diagnostic feedback. - -+config SPI_RB4XX_CPLD -+ tristate "MikroTik RB4XX CPLD driver" -+ depends on ATH79_MACH_RB4XX -+ help -+ SPI driver for the Xilinx CPLD chip present on the -+ MikroTik RB4xx boards. -+ - # - # Add new SPI protocol masters in alphabetical order above this line - # ---- a/drivers/spi/Makefile -+++ b/drivers/spi/Makefile -@@ -46,6 +46,7 @@ obj-$(CONFIG_SPI_PPC4xx) += spi-ppc4xx. - obj-$(CONFIG_SPI_PXA2XX) += spi-pxa2xx.o - obj-$(CONFIG_SPI_PXA2XX_PCI) += spi-pxa2xx-pci.o - obj-$(CONFIG_SPI_RB4XX) += spi-rb4xx.o -+obj-$(CONFIG_SPI_RB4XX_CPLD) += spi-rb4xx-cpld.o - obj-$(CONFIG_SPI_S3C24XX) += spi-s3c24xx-hw.o - spi-s3c24xx-hw-y := spi-s3c24xx.o - spi-s3c24xx-hw-$(CONFIG_SPI_S3C24XX_FIQ) += spi-s3c24xx-fiq.o diff --git a/target/linux/ar71xx/patches-3.3/434-spi-ap83_spi_controller.patch b/target/linux/ar71xx/patches-3.3/434-spi-ap83_spi_controller.patch deleted file mode 100644 index b4dbcd4705..0000000000 --- a/target/linux/ar71xx/patches-3.3/434-spi-ap83_spi_controller.patch +++ /dev/null @@ -1,27 +0,0 @@ ---- a/drivers/spi/Makefile -+++ b/drivers/spi/Makefile -@@ -12,6 +12,7 @@ obj-$(CONFIG_SPI_SPIDEV) += spidev.o - # SPI master controller drivers (bus) - obj-$(CONFIG_SPI_ALTERA) += spi-altera.o - obj-$(CONFIG_SPI_ATMEL) += spi-atmel.o -+obj-$(CONFIG_SPI_AP83) += spi-ap83.o - obj-$(CONFIG_SPI_ATH79) += spi-ath79.o - obj-$(CONFIG_SPI_AU1550) += spi-au1550.o - obj-$(CONFIG_SPI_BFIN) += spi-bfin5xx.o ---- a/drivers/spi/Kconfig -+++ b/drivers/spi/Kconfig -@@ -59,6 +59,14 @@ config SPI_ALTERA - help - This is the driver for the Altera SPI Controller. - -+config SPI_AP83 -+ tristate "Atheros AP83 specific SPI Controller" -+ depends on SPI_MASTER && ATH79_MACH_AP83 -+ select SPI_BITBANG -+ help -+ This is a specific SPI controller driver for the Atheros AP83 -+ reference board. -+ - config SPI_ATH79 - tristate "Atheros AR71XX/AR724X/AR913X SPI controller driver" - depends on ATH79 && GENERIC_GPIO diff --git a/target/linux/ar71xx/patches-3.3/435-spi-vsc7385_driver.patch b/target/linux/ar71xx/patches-3.3/435-spi-vsc7385_driver.patch deleted file mode 100644 index 14626879b3..0000000000 --- a/target/linux/ar71xx/patches-3.3/435-spi-vsc7385_driver.patch +++ /dev/null @@ -1,23 +0,0 @@ ---- a/drivers/spi/Kconfig -+++ b/drivers/spi/Kconfig -@@ -454,6 +454,11 @@ config SPI_RB4XX_CPLD - SPI driver for the Xilinx CPLD chip present on the - MikroTik RB4xx boards. - -+config SPI_VSC7385 -+ tristate "Vitesse VSC7385 ethernet switch driver" -+ help -+ SPI driver for the Vitesse VSC7385 ethernet switch. -+ - # - # Add new SPI protocol masters in alphabetical order above this line - # ---- a/drivers/spi/Makefile -+++ b/drivers/spi/Makefile -@@ -61,5 +61,5 @@ obj-$(CONFIG_SPI_TI_SSP) += spi-ti-ssp. - obj-$(CONFIG_SPI_TLE62X0) += spi-tle62x0.o - obj-$(CONFIG_SPI_TOPCLIFF_PCH) += spi-topcliff-pch.o - obj-$(CONFIG_SPI_TXX9) += spi-txx9.o -+obj-$(CONFIG_SPI_VSC7385) += spi-vsc7385.o - obj-$(CONFIG_SPI_XILINX) += spi-xilinx.o -- diff --git a/target/linux/ar71xx/patches-3.3/440-leds-wndr3700-usb-led-driver.patch b/target/linux/ar71xx/patches-3.3/440-leds-wndr3700-usb-led-driver.patch deleted file mode 100644 index 88d09089de..0000000000 --- a/target/linux/ar71xx/patches-3.3/440-leds-wndr3700-usb-led-driver.patch +++ /dev/null @@ -1,26 +0,0 @@ ---- a/drivers/leds/Kconfig -+++ b/drivers/leds/Kconfig -@@ -418,6 +418,13 @@ config LEDS_TRIGGERS - These triggers allow kernel events to drive the LEDs and can - be configured via sysfs. If unsure, say Y. - -+config LEDS_WNDR3700_USB -+ tristate "NETGEAR WNDR3700 USB LED driver" -+ depends on LEDS_CLASS && ATH79_MACH_WNDR3700 -+ help -+ This option enables support for the USB LED found on the -+ NETGEAR WNDR3700 board. -+ - comment "LED Triggers" - - config LEDS_TRIGGER_TIMER ---- a/drivers/leds/Makefile -+++ b/drivers/leds/Makefile -@@ -35,6 +35,7 @@ obj-$(CONFIG_LEDS_DA903X) += leds-da903 - obj-$(CONFIG_LEDS_WM831X_STATUS) += leds-wm831x-status.o - obj-$(CONFIG_LEDS_WM8350) += leds-wm8350.o - obj-$(CONFIG_LEDS_PWM) += leds-pwm.o -+obj-${CONFIG_LEDS_WNDR3700_USB} += leds-wndr3700-usb.o - obj-$(CONFIG_LEDS_REGULATOR) += leds-regulator.o - obj-$(CONFIG_LEDS_INTEL_SS4200) += leds-ss4200.o - obj-$(CONFIG_LEDS_LT3593) += leds-lt3593.o diff --git a/target/linux/ar71xx/patches-3.3/441-leds-rb750-led-driver.patch b/target/linux/ar71xx/patches-3.3/441-leds-rb750-led-driver.patch deleted file mode 100644 index e8073a2e80..0000000000 --- a/target/linux/ar71xx/patches-3.3/441-leds-rb750-led-driver.patch +++ /dev/null @@ -1,23 +0,0 @@ ---- a/drivers/leds/Kconfig -+++ b/drivers/leds/Kconfig -@@ -425,6 +425,10 @@ config LEDS_WNDR3700_USB - This option enables support for the USB LED found on the - NETGEAR WNDR3700 board. - -+config LEDS_RB750 -+ tristate "LED driver for the Mikrotik RouterBOARD 750" -+ depends on LEDS_CLASS && ATH79_MACH_RB750 -+ - comment "LED Triggers" - - config LEDS_TRIGGER_TIMER ---- a/drivers/leds/Makefile -+++ b/drivers/leds/Makefile -@@ -42,6 +42,7 @@ obj-$(CONFIG_LEDS_LT3593) += leds-lt359 - obj-$(CONFIG_LEDS_ADP5520) += leds-adp5520.o - obj-$(CONFIG_LEDS_DELL_NETBOOKS) += dell-led.o - obj-$(CONFIG_LEDS_MC13783) += leds-mc13783.o -+obj-$(CONFIG_LEDS_RB750) += leds-rb750.o - obj-$(CONFIG_LEDS_NS2) += leds-ns2.o - obj-$(CONFIG_LEDS_NETXBIG) += leds-netxbig.o - obj-$(CONFIG_LEDS_ASIC3) += leds-asic3.o diff --git a/target/linux/ar71xx/patches-3.3/450-gpio-nxp-74hc153-gpio-chip-driver.patch b/target/linux/ar71xx/patches-3.3/450-gpio-nxp-74hc153-gpio-chip-driver.patch deleted file mode 100644 index 1e67abfdd5..0000000000 --- a/target/linux/ar71xx/patches-3.3/450-gpio-nxp-74hc153-gpio-chip-driver.patch +++ /dev/null @@ -1,26 +0,0 @@ ---- a/drivers/gpio/Kconfig -+++ b/drivers/gpio/Kconfig -@@ -489,4 +489,13 @@ config GPIO_TPS65910 - help - Select this option to enable GPIO driver for the TPS65910 - chip family. -+ -+comment "Other GPIO expanders" -+ -+config GPIO_NXP_74HC153 -+ tristate "NXP 74HC153 Dual 4-input multiplexer" -+ help -+ Platform driver for NXP 74HC153 Dual 4-input Multiplexer. This -+ provides a GPIO interface supporting input mode only. -+ - endif ---- a/drivers/gpio/Makefile -+++ b/drivers/gpio/Makefile -@@ -35,6 +35,7 @@ obj-$(CONFIG_GPIO_MSM_V2) += gpio-msm-v2 - obj-$(CONFIG_GPIO_MXC) += gpio-mxc.o - obj-$(CONFIG_GPIO_MXS) += gpio-mxs.o - obj-$(CONFIG_PLAT_NOMADIK) += gpio-nomadik.o -+obj-$(CONFIG_GPIO_NXP_74HC153) += gpio-nxp-74hc153.o - obj-$(CONFIG_ARCH_OMAP) += gpio-omap.o - obj-$(CONFIG_GPIO_PCA953X) += gpio-pca953x.o - obj-$(CONFIG_GPIO_PCF857X) += gpio-pcf857x.o diff --git a/target/linux/ar71xx/patches-3.3/460-spi-bitbang-export-spi_bitbang_bufs.patch b/target/linux/ar71xx/patches-3.3/460-spi-bitbang-export-spi_bitbang_bufs.patch deleted file mode 100644 index 919b85cb77..0000000000 --- a/target/linux/ar71xx/patches-3.3/460-spi-bitbang-export-spi_bitbang_bufs.patch +++ /dev/null @@ -1,28 +0,0 @@ ---- a/drivers/spi/spi-bitbang.c -+++ b/drivers/spi/spi-bitbang.c -@@ -234,13 +234,14 @@ void spi_bitbang_cleanup(struct spi_devi - } - EXPORT_SYMBOL_GPL(spi_bitbang_cleanup); - --static int spi_bitbang_bufs(struct spi_device *spi, struct spi_transfer *t) -+int spi_bitbang_bufs(struct spi_device *spi, struct spi_transfer *t) - { - struct spi_bitbang_cs *cs = spi->controller_state; - unsigned nsecs = cs->nsecs; - - return cs->txrx_bufs(spi, cs->txrx_word, nsecs, t); - } -+EXPORT_SYMBOL_GPL(spi_bitbang_bufs); - - /*----------------------------------------------------------------------*/ - ---- a/include/linux/spi/spi_bitbang.h -+++ b/include/linux/spi/spi_bitbang.h -@@ -44,6 +44,7 @@ extern void spi_bitbang_cleanup(struct s - extern int spi_bitbang_transfer(struct spi_device *spi, struct spi_message *m); - extern int spi_bitbang_setup_transfer(struct spi_device *spi, - struct spi_transfer *t); -+extern int spi_bitbang_bufs(struct spi_device *spi, struct spi_transfer *t); - - /* start or stop queue processing */ - extern int spi_bitbang_start(struct spi_bitbang *spi); diff --git a/target/linux/ar71xx/patches-3.3/461-spi-add-type-field-to-spi_transfer.patch b/target/linux/ar71xx/patches-3.3/461-spi-add-type-field-to-spi_transfer.patch deleted file mode 100644 index 850f24a07a..0000000000 --- a/target/linux/ar71xx/patches-3.3/461-spi-add-type-field-to-spi_transfer.patch +++ /dev/null @@ -1,23 +0,0 @@ ---- a/include/linux/spi/spi.h -+++ b/include/linux/spi/spi.h -@@ -406,6 +406,12 @@ extern struct spi_master *spi_busnum_to_ - - /*---------------------------------------------------------------------------*/ - -+enum spi_transfer_type { -+ SPI_TRANSFER_GENERIC = 0, -+ SPI_TRANSFER_FLASH_READ_CMD, -+ SPI_TRANSFER_FLASH_READ_DATA, -+}; -+ - /* - * I/O INTERFACE between SPI controller and protocol drivers - * -@@ -508,6 +514,7 @@ struct spi_transfer { - u8 bits_per_word; - u16 delay_usecs; - u32 speed_hz; -+ enum spi_transfer_type type; - - struct list_head transfer_list; - }; diff --git a/target/linux/ar71xx/patches-3.3/462-mtd-m25p80-set-spi-transfer-type.patch b/target/linux/ar71xx/patches-3.3/462-mtd-m25p80-set-spi-transfer-type.patch deleted file mode 100644 index 48e69c0d69..0000000000 --- a/target/linux/ar71xx/patches-3.3/462-mtd-m25p80-set-spi-transfer-type.patch +++ /dev/null @@ -1,15 +0,0 @@ ---- a/drivers/mtd/devices/m25p80.c -+++ b/drivers/mtd/devices/m25p80.c -@@ -372,10 +372,12 @@ static int m25p80_read(struct mtd_info * - * OPCODE_FAST_READ (if available) is faster. - * Should add 1 byte DUMMY_BYTE. - */ -+ t[0].type = SPI_TRANSFER_FLASH_READ_CMD; - t[0].tx_buf = flash->command; - t[0].len = m25p_cmdsz(flash) + FAST_READ_DUMMY_BYTE; - spi_message_add_tail(&t[0], &m); - -+ t[1].type = SPI_TRANSFER_FLASH_READ_DATA; - spi_message_add_tail(&t[1], &m); - - /* Byte count starts at zero. */ diff --git a/target/linux/ar71xx/patches-3.3/463-spi-ath79-add-fast-flash-read.patch b/target/linux/ar71xx/patches-3.3/463-spi-ath79-add-fast-flash-read.patch deleted file mode 100644 index 9ccc4a45e0..0000000000 --- a/target/linux/ar71xx/patches-3.3/463-spi-ath79-add-fast-flash-read.patch +++ /dev/null @@ -1,185 +0,0 @@ ---- a/drivers/spi/spi-ath79.c -+++ b/drivers/spi/spi-ath79.c -@@ -37,6 +37,11 @@ - - #define ATH79_SPI_CS_LINE_MAX 2 - -+enum ath79_spi_state { -+ ATH79_SPI_STATE_WAIT_CMD = 0, -+ ATH79_SPI_STATE_WAIT_READ, -+}; -+ - struct ath79_spi { - struct spi_bitbang bitbang; - u32 ioc_base; -@@ -44,6 +49,11 @@ struct ath79_spi { - void __iomem *base; - struct clk *clk; - unsigned rrw_delay; -+ -+ enum ath79_spi_state state; -+ u32 clk_div; -+ unsigned long read_addr; -+ unsigned long ahb_rate; - }; - - static inline u32 ath79_spi_rr(struct ath79_spi *sp, unsigned reg) -@@ -111,9 +121,6 @@ static void ath79_spi_enable(struct ath7 - /* save CTRL register */ - sp->reg_ctrl = ath79_spi_rr(sp, AR71XX_SPI_REG_CTRL); - sp->ioc_base = ath79_spi_rr(sp, AR71XX_SPI_REG_IOC); -- -- /* TODO: setup speed? */ -- ath79_spi_wr(sp, AR71XX_SPI_REG_CTRL, 0x43); - } - - static void ath79_spi_disable(struct ath79_spi *sp) -@@ -232,6 +239,110 @@ static u32 ath79_spi_txrx_mode0(struct s - return ath79_spi_rr(sp, AR71XX_SPI_REG_RDS); - } - -+static int ath79_spi_do_read_flash_data(struct spi_device *spi, -+ struct spi_transfer *t) -+{ -+ struct ath79_spi *sp = ath79_spidev_to_sp(spi); -+ -+ /* disable GPIO mode */ -+ ath79_spi_wr(sp, AR71XX_SPI_REG_FS, 0); -+ -+ memcpy_fromio(t->rx_buf, sp->base + sp->read_addr, t->len); -+ -+ /* enable GPIO mode */ -+ ath79_spi_wr(sp, AR71XX_SPI_REG_FS, AR71XX_SPI_FS_GPIO); -+ -+ /* restore IOC register */ -+ ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, sp->ioc_base); -+ -+ return t->len; -+} -+ -+static int ath79_spi_do_read_flash_cmd(struct spi_device *spi, -+ struct spi_transfer *t) -+{ -+ struct ath79_spi *sp = ath79_spidev_to_sp(spi); -+ int len; -+ const u8 *p; -+ -+ sp->read_addr = 0; -+ -+ len = t->len - 1; -+ p = t->tx_buf; -+ -+ while (len--) { -+ p++; -+ sp->read_addr <<= 8; -+ sp->read_addr |= *p; -+ } -+ -+ return t->len; -+} -+ -+static bool ath79_spi_is_read_cmd(struct spi_device *spi, -+ struct spi_transfer *t) -+{ -+ return t->type == SPI_TRANSFER_FLASH_READ_CMD; -+} -+ -+static bool ath79_spi_is_data_read(struct spi_device *spi, -+ struct spi_transfer *t) -+{ -+ return t->type == SPI_TRANSFER_FLASH_READ_DATA; -+} -+ -+static int ath79_spi_txrx_bufs(struct spi_device *spi, struct spi_transfer *t) -+{ -+ struct ath79_spi *sp = ath79_spidev_to_sp(spi); -+ int ret; -+ -+ switch (sp->state) { -+ case ATH79_SPI_STATE_WAIT_CMD: -+ if (ath79_spi_is_read_cmd(spi, t)) { -+ ret = ath79_spi_do_read_flash_cmd(spi, t); -+ sp->state = ATH79_SPI_STATE_WAIT_READ; -+ } else { -+ ret = spi_bitbang_bufs(spi, t); -+ } -+ break; -+ -+ case ATH79_SPI_STATE_WAIT_READ: -+ if (ath79_spi_is_data_read(spi, t)) { -+ ret = ath79_spi_do_read_flash_data(spi, t); -+ } else { -+ dev_warn(&spi->dev, "flash data read expected\n"); -+ ret = -EIO; -+ } -+ sp->state = ATH79_SPI_STATE_WAIT_CMD; -+ break; -+ -+ default: -+ BUG(); -+ } -+ -+ return ret; -+} -+ -+static int ath79_spi_setup_transfer(struct spi_device *spi, -+ struct spi_transfer *t) -+{ -+ struct ath79_spi *sp = ath79_spidev_to_sp(spi); -+ struct ath79_spi_controller_data *cdata; -+ int ret; -+ -+ ret = spi_bitbang_setup_transfer(spi, t); -+ if (ret) -+ return ret; -+ -+ cdata = spi->controller_data; -+ if (cdata->is_flash) -+ sp->bitbang.txrx_bufs = ath79_spi_txrx_bufs; -+ else -+ sp->bitbang.txrx_bufs = spi_bitbang_bufs; -+ -+ return ret; -+} -+ - static __devinit int ath79_spi_probe(struct platform_device *pdev) - { - struct spi_master *master; -@@ -254,6 +365,8 @@ static __devinit int ath79_spi_probe(str - sp = spi_master_get_devdata(master); - platform_set_drvdata(pdev, sp); - -+ sp->state = ATH79_SPI_STATE_WAIT_CMD; -+ - master->setup = ath79_spi_setup; - master->cleanup = ath79_spi_cleanup; - master->bus_num = pdata->bus_num; -@@ -262,7 +375,7 @@ static __devinit int ath79_spi_probe(str - sp->bitbang.master = spi_master_get(master); - sp->bitbang.chipselect = ath79_spi_chipselect; - sp->bitbang.txrx_word[SPI_MODE_0] = ath79_spi_txrx_mode0; -- sp->bitbang.setup_transfer = spi_bitbang_setup_transfer; -+ sp->bitbang.setup_transfer = ath79_spi_setup_transfer; - sp->bitbang.flags = SPI_CS_HIGH; - - r = platform_get_resource(pdev, IORESOURCE_MEM, 0); -@@ -287,7 +400,8 @@ static __devinit int ath79_spi_probe(str - if (ret) - goto err_clk_put; - -- rate = DIV_ROUND_UP(clk_get_rate(sp->clk), MHZ); -+ sp->ahb_rate = clk_get_rate(sp->clk); -+ rate = DIV_ROUND_UP(sp->ahb_rate, MHZ); - if (!rate) { - ret = -EINVAL; - goto err_clk_disable; ---- a/arch/mips/include/asm/mach-ath79/ath79_spi_platform.h -+++ b/arch/mips/include/asm/mach-ath79/ath79_spi_platform.h -@@ -24,6 +24,7 @@ enum ath79_spi_cs_type { - struct ath79_spi_controller_data { - enum ath79_spi_cs_type cs_type; - unsigned cs_line; -+ bool is_flash; - }; - - #endif /* _ATH79_SPI_PLATFORM_H */ diff --git a/target/linux/ar71xx/patches-3.3/470-MIPS-ath79-swizzle-pci-address-for-ar71xx.patch b/target/linux/ar71xx/patches-3.3/470-MIPS-ath79-swizzle-pci-address-for-ar71xx.patch deleted file mode 100644 index 7912384d39..0000000000 --- a/target/linux/ar71xx/patches-3.3/470-MIPS-ath79-swizzle-pci-address-for-ar71xx.patch +++ /dev/null @@ -1,111 +0,0 @@ ---- /dev/null -+++ b/arch/mips/include/asm/mach-ath79/mangle-port.h -@@ -0,0 +1,37 @@ -+/* -+ * Copyright (C) 2012 Gabor Juhos <juhosg@openwrt.org> -+ * -+ * This file was derived from: inlude/asm-mips/mach-generic/mangle-port.h -+ * Copyright (C) 2003, 2004 Ralf Baechle -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#ifndef __ASM_MACH_ATH79_MANGLE_PORT_H -+#define __ASM_MACH_ATH79_MANGLE_PORT_H -+ -+#ifdef CONFIG_PCI -+extern unsigned long (ath79_pci_swizzle_b)(unsigned long port); -+extern unsigned long (ath79_pci_swizzle_w)(unsigned long port); -+#else -+#define ath79_pci_swizzle_b(port) (port) -+#define ath79_pci_swizzle_w(port) (port) -+#endif -+ -+#define __swizzle_addr_b(port) ath79_pci_swizzle_b(port) -+#define __swizzle_addr_w(port) ath79_pci_swizzle_w(port) -+#define __swizzle_addr_l(port) (port) -+#define __swizzle_addr_q(port) (port) -+ -+# define ioswabb(a, x) (x) -+# define __mem_ioswabb(a, x) (x) -+# define ioswabw(a, x) (x) -+# define __mem_ioswabw(a, x) cpu_to_le16(x) -+# define ioswabl(a, x) (x) -+# define __mem_ioswabl(a, x) cpu_to_le32(x) -+# define ioswabq(a, x) (x) -+# define __mem_ioswabq(a, x) cpu_to_le64(x) -+ -+#endif /* __ASM_MACH_ATH79_MANGLE_PORT_H */ ---- a/arch/mips/ath79/pci.c -+++ b/arch/mips/ath79/pci.c -@@ -13,6 +13,7 @@ - */ - - #include <linux/init.h> -+#include <linux/export.h> - #include <linux/pci.h> - #include <linux/resource.h> - #include <linux/platform_device.h> -@@ -25,6 +26,9 @@ static int (*ath79_pci_plat_dev_init)(st - static const struct ath79_pci_irq *ath79_pci_irq_map __initdata; - static unsigned ath79_pci_nr_irqs __initdata; - -+static unsigned long (*__ath79_pci_swizzle_b)(unsigned long port); -+static unsigned long (*__ath79_pci_swizzle_w)(unsigned long port); -+ - static const struct ath79_pci_irq ar71xx_pci_irq_map[] __initconst = { - { - .slot = 17, -@@ -202,12 +206,50 @@ ath79_register_pci_ar724x(int id, - return pdev; - } - -+static inline bool ar71xx_is_pci_addr(unsigned long port) -+{ -+ unsigned long phys = CPHYSADDR(port); -+ -+ return (phys >= AR71XX_PCI_MEM_BASE && -+ phys < AR71XX_PCI_MEM_BASE + AR71XX_PCI_MEM_SIZE); -+} -+ -+static unsigned long ar71xx_pci_swizzle_b(unsigned long port) -+{ -+ return ar71xx_is_pci_addr(port) ? port ^ 3 : port; -+} -+ -+static unsigned long ar71xx_pci_swizzle_w(unsigned long port) -+{ -+ return ar71xx_is_pci_addr(port) ? port ^ 2 : port; -+} -+ -+unsigned long ath79_pci_swizzle_b(unsigned long port) -+{ -+ if (__ath79_pci_swizzle_b) -+ return __ath79_pci_swizzle_b(port); -+ -+ return port; -+} -+EXPORT_SYMBOL(ath79_pci_swizzle_b); -+ -+unsigned long ath79_pci_swizzle_w(unsigned long port) -+{ -+ if (__ath79_pci_swizzle_w) -+ return __ath79_pci_swizzle_w(port); -+ -+ return port; -+} -+EXPORT_SYMBOL(ath79_pci_swizzle_w); -+ - int __init ath79_register_pci(void) - { - struct platform_device *pdev = NULL; - - if (soc_is_ar71xx()) { - pdev = ath79_register_pci_ar71xx(); -+ __ath79_pci_swizzle_b = ar71xx_pci_swizzle_b; -+ __ath79_pci_swizzle_w = ar71xx_pci_swizzle_w; - } else if (soc_is_ar724x()) { - pdev = ath79_register_pci_ar724x(-1, - AR724X_PCI_CFG_BASE, diff --git a/target/linux/ar71xx/patches-3.3/500-MIPS-fw-myloader.patch b/target/linux/ar71xx/patches-3.3/500-MIPS-fw-myloader.patch deleted file mode 100644 index f269763edb..0000000000 --- a/target/linux/ar71xx/patches-3.3/500-MIPS-fw-myloader.patch +++ /dev/null @@ -1,22 +0,0 @@ ---- a/arch/mips/Makefile -+++ b/arch/mips/Makefile -@@ -175,6 +175,7 @@ endif - # - libs-$(CONFIG_ARC) += arch/mips/fw/arc/ - libs-$(CONFIG_CFE) += arch/mips/fw/cfe/ -+libs-$(CONFIG_MYLOADER) += arch/mips/fw/myloader/ - libs-$(CONFIG_SNIPROM) += arch/mips/fw/sni/ - libs-y += arch/mips/fw/lib/ - ---- a/arch/mips/Kconfig -+++ b/arch/mips/Kconfig -@@ -981,6 +981,9 @@ config MIPS_NILE4 - config MIPS_DISABLE_OBSOLETE_IDE - bool - -+config MYLOADER -+ bool -+ - config SYNC_R4K - bool - diff --git a/target/linux/ar71xx/patches-3.3/501-MIPS-ath79-add-mac-argument-to-ath79_register_wmac.patch b/target/linux/ar71xx/patches-3.3/501-MIPS-ath79-add-mac-argument-to-ath79_register_wmac.patch deleted file mode 100644 index bab4f701d1..0000000000 --- a/target/linux/ar71xx/patches-3.3/501-MIPS-ath79-add-mac-argument-to-ath79_register_wmac.patch +++ /dev/null @@ -1,81 +0,0 @@ ---- a/arch/mips/ath79/dev-wmac.c -+++ b/arch/mips/ath79/dev-wmac.c -@@ -15,6 +15,7 @@ - #include <linux/init.h> - #include <linux/delay.h> - #include <linux/irq.h> -+#include <linux/etherdevice.h> - #include <linux/platform_device.h> - #include <linux/ath9k_platform.h> - -@@ -22,6 +23,7 @@ - #include <asm/mach-ath79/ar71xx_regs.h> - #include "dev-wmac.h" - -+static u8 ath79_wmac_mac[ETH_ALEN]; - static struct ath9k_platform_data ath79_wmac_data; - - static struct resource ath79_wmac_resources[] = { -@@ -134,7 +136,7 @@ static void qca955x_wmac_setup(void) - ath79_wmac_data.is_clk_25mhz = true; - } - --void __init ath79_register_wmac(u8 *cal_data) -+void __init ath79_register_wmac(u8 *cal_data, u8 *mac_addr) - { - if (soc_is_ar913x()) - ar913x_wmac_setup(); -@@ -151,5 +153,10 @@ void __init ath79_register_wmac(u8 *cal_ - memcpy(ath79_wmac_data.eeprom_data, cal_data, - sizeof(ath79_wmac_data.eeprom_data)); - -+ if (mac_addr) { -+ memcpy(ath79_wmac_mac, mac_addr, sizeof(ath79_wmac_mac)); -+ ath79_wmac_data.macaddr = ath79_wmac_mac; -+ } -+ - platform_device_register(&ath79_wmac_device); - } ---- a/arch/mips/ath79/dev-wmac.h -+++ b/arch/mips/ath79/dev-wmac.h -@@ -12,6 +12,6 @@ - #ifndef _ATH79_DEV_WMAC_H - #define _ATH79_DEV_WMAC_H - --void ath79_register_wmac(u8 *cal_data); -+void ath79_register_wmac(u8 *cal_data, u8 *mac_addr); - - #endif /* _ATH79_DEV_WMAC_H */ ---- a/arch/mips/ath79/mach-ap81.c -+++ b/arch/mips/ath79/mach-ap81.c -@@ -98,7 +98,7 @@ static void __init ap81_setup(void) - ap81_gpio_keys); - ath79_register_spi(&ap81_spi_data, ap81_spi_info, - ARRAY_SIZE(ap81_spi_info)); -- ath79_register_wmac(cal_data); -+ ath79_register_wmac(cal_data, NULL); - ath79_register_usb(); - } - ---- a/arch/mips/ath79/mach-db120.c -+++ b/arch/mips/ath79/mach-db120.c -@@ -134,7 +134,7 @@ static void __init db120_setup(void) - ath79_register_spi(&db120_spi_data, db120_spi_info, - ARRAY_SIZE(db120_spi_info)); - ath79_register_usb(); -- ath79_register_wmac(art + DB120_WMAC_CALDATA_OFFSET); -+ ath79_register_wmac(art + DB120_WMAC_CALDATA_OFFSET, NULL); - db120_pci_init(art + DB120_PCIE_CALDATA_OFFSET); - } - ---- a/arch/mips/ath79/mach-ap121.c -+++ b/arch/mips/ath79/mach-ap121.c -@@ -91,7 +91,7 @@ static void __init ap121_setup(void) - ath79_register_spi(&ap121_spi_data, ap121_spi_info, - ARRAY_SIZE(ap121_spi_info)); - ath79_register_usb(); -- ath79_register_wmac(cal_data); -+ ath79_register_wmac(cal_data, NULL); - } - - MIPS_MACHINE(ATH79_MACH_AP121, "AP121", "Atheros AP121 reference board", diff --git a/target/linux/ar71xx/patches-3.3/502-MIPS-ath79-export-ath79_gpio_base.patch b/target/linux/ar71xx/patches-3.3/502-MIPS-ath79-export-ath79_gpio_base.patch deleted file mode 100644 index 0a218a684a..0000000000 --- a/target/linux/ar71xx/patches-3.3/502-MIPS-ath79-export-ath79_gpio_base.patch +++ /dev/null @@ -1,23 +0,0 @@ ---- a/arch/mips/ath79/gpio.c -+++ b/arch/mips/ath79/gpio.c -@@ -25,7 +25,9 @@ - #include <asm/mach-ath79/ath79.h> - #include "common.h" - --static void __iomem *ath79_gpio_base; -+void __iomem *ath79_gpio_base; -+EXPORT_SYMBOL_GPL(ath79_gpio_base); -+ - static unsigned long ath79_gpio_count; - static DEFINE_SPINLOCK(ath79_gpio_lock); - ---- a/arch/mips/include/asm/mach-ath79/ath79.h -+++ b/arch/mips/include/asm/mach-ath79/ath79.h -@@ -110,6 +110,7 @@ static inline int soc_is_qca955x(void) - } - - extern void __iomem *ath79_ddr_base; -+extern void __iomem *ath79_gpio_base; - extern void __iomem *ath79_pll_base; - extern void __iomem *ath79_reset_base; - diff --git a/target/linux/ar71xx/patches-3.3/503-MIPS-ath79-add-flash-acquire-release.patch b/target/linux/ar71xx/patches-3.3/503-MIPS-ath79-add-flash-acquire-release.patch deleted file mode 100644 index 81350ca3bc..0000000000 --- a/target/linux/ar71xx/patches-3.3/503-MIPS-ath79-add-flash-acquire-release.patch +++ /dev/null @@ -1,37 +0,0 @@ ---- a/arch/mips/ath79/common.c -+++ b/arch/mips/ath79/common.c -@@ -22,6 +22,7 @@ - #include "common.h" - - static DEFINE_SPINLOCK(ath79_device_reset_lock); -+static DEFINE_MUTEX(ath79_flash_mutex); - - u32 ath79_cpu_freq; - EXPORT_SYMBOL_GPL(ath79_cpu_freq); -@@ -109,3 +110,16 @@ void ath79_device_reset_clear(u32 mask) - spin_unlock_irqrestore(&ath79_device_reset_lock, flags); - } - EXPORT_SYMBOL_GPL(ath79_device_reset_clear); -+ -+void ath79_flash_acquire(void) -+{ -+ mutex_lock(&ath79_flash_mutex); -+} -+EXPORT_SYMBOL_GPL(ath79_flash_acquire); -+ -+void ath79_flash_release(void) -+{ -+ mutex_unlock(&ath79_flash_mutex); -+} -+EXPORT_SYMBOL_GPL(ath79_flash_release); -+ ---- a/arch/mips/include/asm/mach-ath79/ath79.h -+++ b/arch/mips/include/asm/mach-ath79/ath79.h -@@ -137,4 +137,7 @@ static inline u32 ath79_reset_rr(unsigne - void ath79_device_reset_set(u32 mask); - void ath79_device_reset_clear(u32 mask); - -+void ath79_flash_acquire(void); -+void ath79_flash_release(void); -+ - #endif /* __ASM_MACH_ATH79_H */ diff --git a/target/linux/ar71xx/patches-3.3/504-MIPS-ath79-add-ath79_device_reset_get.patch b/target/linux/ar71xx/patches-3.3/504-MIPS-ath79-add-ath79_device_reset_get.patch deleted file mode 100644 index 55780996f5..0000000000 --- a/target/linux/ar71xx/patches-3.3/504-MIPS-ath79-add-ath79_device_reset_get.patch +++ /dev/null @@ -1,45 +0,0 @@ ---- a/arch/mips/include/asm/mach-ath79/ath79.h -+++ b/arch/mips/include/asm/mach-ath79/ath79.h -@@ -136,6 +136,7 @@ static inline u32 ath79_reset_rr(unsigne - - void ath79_device_reset_set(u32 mask); - void ath79_device_reset_clear(u32 mask); -+u32 ath79_device_reset_get(u32 mask); - - void ath79_flash_acquire(void); - void ath79_flash_release(void); ---- a/arch/mips/ath79/common.c -+++ b/arch/mips/ath79/common.c -@@ -111,6 +111,32 @@ void ath79_device_reset_clear(u32 mask) - } - EXPORT_SYMBOL_GPL(ath79_device_reset_clear); - -+u32 ath79_device_reset_get(u32 mask) -+{ -+ unsigned long flags; -+ u32 reg; -+ u32 ret; -+ -+ if (soc_is_ar71xx()) -+ reg = AR71XX_RESET_REG_RESET_MODULE; -+ else if (soc_is_ar724x()) -+ reg = AR724X_RESET_REG_RESET_MODULE; -+ else if (soc_is_ar913x()) -+ reg = AR913X_RESET_REG_RESET_MODULE; -+ else if (soc_is_ar933x()) -+ reg = AR933X_RESET_REG_RESET_MODULE; -+ else if (soc_is_ar934x()) -+ reg = AR934X_RESET_REG_RESET_MODULE; -+ else -+ BUG(); -+ -+ spin_lock_irqsave(&ath79_device_reset_lock, flags); -+ ret = ath79_reset_rr(reg); -+ spin_unlock_irqrestore(&ath79_device_reset_lock, flags); -+ return ret; -+} -+EXPORT_SYMBOL_GPL(ath79_device_reset_get); -+ - void ath79_flash_acquire(void) - { - mutex_lock(&ath79_flash_mutex); diff --git a/target/linux/ar71xx/patches-3.3/505-MIPS-ath79-add-ath79_gpio_function_select.patch b/target/linux/ar71xx/patches-3.3/505-MIPS-ath79-add-ath79_gpio_function_select.patch deleted file mode 100644 index 86e136f67e..0000000000 --- a/target/linux/ar71xx/patches-3.3/505-MIPS-ath79-add-ath79_gpio_function_select.patch +++ /dev/null @@ -1,47 +0,0 @@ ---- a/arch/mips/ath79/common.h -+++ b/arch/mips/ath79/common.h -@@ -26,6 +26,7 @@ void ath79_ddr_wb_flush(unsigned int reg - void ath79_gpio_function_enable(u32 mask); - void ath79_gpio_function_disable(u32 mask); - void ath79_gpio_function_setup(u32 set, u32 clear); -+void ath79_gpio_output_select(unsigned gpio, u8 val); - void ath79_gpio_init(void); - - #endif /* __ATH79_COMMON_H */ ---- a/arch/mips/ath79/gpio.c -+++ b/arch/mips/ath79/gpio.c -@@ -198,6 +198,34 @@ void ath79_gpio_function_setup(u32 set, - spin_unlock_irqrestore(&ath79_gpio_lock, flags); - } - -+void __init ath79_gpio_output_select(unsigned gpio, u8 val) -+{ -+ void __iomem *base = ath79_gpio_base; -+ unsigned long flags; -+ unsigned int reg; -+ u32 t, s; -+ -+ BUG_ON(!soc_is_ar934x()); -+ -+ if (gpio >= AR934X_GPIO_COUNT) -+ return; -+ -+ reg = AR934X_GPIO_REG_OUT_FUNC0 + 4 * (gpio / 4); -+ s = 8 * (gpio % 4); -+ -+ spin_lock_irqsave(&ath79_gpio_lock, flags); -+ -+ t = __raw_readl(base + reg); -+ t &= ~(0xff << s); -+ t |= val << s; -+ __raw_writel(t, base + reg); -+ -+ /* flush write */ -+ (void) __raw_readl(base + reg); -+ -+ spin_unlock_irqrestore(&ath79_gpio_lock, flags); -+} -+ - void __init ath79_gpio_init(void) - { - int err; diff --git a/target/linux/ar71xx/patches-3.3/506-MIPS-ath79-prom-parse-redboot-args.patch b/target/linux/ar71xx/patches-3.3/506-MIPS-ath79-prom-parse-redboot-args.patch deleted file mode 100644 index aab959b900..0000000000 --- a/target/linux/ar71xx/patches-3.3/506-MIPS-ath79-prom-parse-redboot-args.patch +++ /dev/null @@ -1,86 +0,0 @@ ---- a/arch/mips/ath79/prom.c -+++ b/arch/mips/ath79/prom.c -@@ -19,6 +19,8 @@ - - #include "common.h" - -+static char ath79_cmdline_buf[COMMAND_LINE_SIZE] __initdata; -+ - static inline int is_valid_ram_addr(void *addr) - { - if (((u32) addr > KSEG0) && -@@ -32,6 +34,41 @@ static inline int is_valid_ram_addr(void - return 0; - } - -+static void __init ath79_prom_append_cmdline(const char *name, -+ const char *value) -+{ -+ snprintf(ath79_cmdline_buf, sizeof(ath79_cmdline_buf), -+ " %s=%s", name, value); -+ strlcat(arcs_cmdline, ath79_cmdline_buf, sizeof(arcs_cmdline)); -+} -+ -+static const char * __init ath79_prom_find_env(char **envp, const char *name) -+{ -+ const char *ret = NULL; -+ int len; -+ char **p; -+ -+ if (!is_valid_ram_addr(envp)) -+ return NULL; -+ -+ len = strlen(name); -+ for (p = envp; is_valid_ram_addr(*p); p++) { -+ if (strncmp(name, *p, len) == 0 && (*p)[len] == '=') { -+ ret = *p + len + 1; -+ break; -+ } -+ -+ /* RedBoot env comes in pointer pairs - key, value */ -+ if (strncmp(name, *p, len) == 0 && (*p)[len] == 0) -+ if (is_valid_ram_addr(*(++p))) { -+ ret = *p; -+ break; -+ } -+ } -+ -+ return ret; -+} -+ - static __init void ath79_prom_init_cmdline(int argc, char **argv) - { - int i; -@@ -48,7 +85,32 @@ static __init void ath79_prom_init_cmdli - - void __init prom_init(void) - { -+ const char *env; -+ char **envp; -+ - ath79_prom_init_cmdline(fw_arg0, (char **)fw_arg1); -+ -+ envp = (char **)fw_arg2; -+ if (!strstr(arcs_cmdline, "ethaddr=")) { -+ env = ath79_prom_find_env(envp, "ethaddr"); -+ if (env) -+ ath79_prom_append_cmdline("ethaddr", env); -+ } -+ -+ if (!strstr(arcs_cmdline, "board=")) { -+ env = ath79_prom_find_env(envp, "board"); -+ if (env) { -+ /* Workaround for buggy bootloaders */ -+ if (strcmp(env, "RouterStation") == 0 || -+ strcmp(env, "Ubiquiti AR71xx-based board") == 0) -+ env = "UBNT-RS"; -+ -+ if (strcmp(env, "RouterStation PRO") == 0) -+ env = "UBNT-RSPRO"; -+ -+ ath79_prom_append_cmdline("board", env); -+ } -+ } - } - - void __init prom_free_prom_memory(void) diff --git a/target/linux/ar71xx/patches-3.3/507-MIPS-ath79-prom-add-myloader-support.patch b/target/linux/ar71xx/patches-3.3/507-MIPS-ath79-prom-add-myloader-support.patch deleted file mode 100644 index 67c1faf9b0..0000000000 --- a/target/linux/ar71xx/patches-3.3/507-MIPS-ath79-prom-add-myloader-support.patch +++ /dev/null @@ -1,58 +0,0 @@ ---- a/arch/mips/ath79/prom.c -+++ b/arch/mips/ath79/prom.c -@@ -16,6 +16,7 @@ - - #include <asm/bootinfo.h> - #include <asm/addrspace.h> -+#include <asm/fw/myloader/myloader.h> - - #include "common.h" - -@@ -69,6 +70,37 @@ static const char * __init ath79_prom_fi - return ret; - } - -+static int __init ath79_prom_init_myloader(void) -+{ -+ struct myloader_info *mylo; -+ char mac_buf[32]; -+ unsigned char *mac; -+ -+ mylo = myloader_get_info(); -+ if (!mylo) -+ return 0; -+ -+ switch (mylo->did) { -+ case DEVID_COMPEX_WP543: -+ ath79_prom_append_cmdline("board", "WP543"); -+ break; -+ case DEVID_COMPEX_WPE72: -+ ath79_prom_append_cmdline("board", "WPE72"); -+ break; -+ default: -+ pr_warn("prom: unknown device id: %x\n", mylo->did); -+ return 0; -+ } -+ -+ mac = mylo->macs[0]; -+ snprintf(mac_buf, sizeof(mac_buf), "%02x:%02x:%02x:%02x:%02x:%02x", -+ mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]); -+ -+ ath79_prom_append_cmdline("ethaddr", mac_buf); -+ -+ return 1; -+} -+ - static __init void ath79_prom_init_cmdline(int argc, char **argv) - { - int i; -@@ -88,6 +120,9 @@ void __init prom_init(void) - const char *env; - char **envp; - -+ if (ath79_prom_init_myloader()) -+ return; -+ - ath79_prom_init_cmdline(fw_arg0, (char **)fw_arg1); - - envp = (char **)fw_arg2; diff --git a/target/linux/ar71xx/patches-3.3/508-MIPS-ath79-prom-image-command-line-hack.patch b/target/linux/ar71xx/patches-3.3/508-MIPS-ath79-prom-image-command-line-hack.patch deleted file mode 100644 index 72a3b56649..0000000000 --- a/target/linux/ar71xx/patches-3.3/508-MIPS-ath79-prom-image-command-line-hack.patch +++ /dev/null @@ -1,57 +0,0 @@ ---- a/arch/mips/ath79/prom.c -+++ b/arch/mips/ath79/prom.c -@@ -70,6 +70,35 @@ static const char * __init ath79_prom_fi - return ret; - } - -+#ifdef CONFIG_IMAGE_CMDLINE_HACK -+extern char __image_cmdline[]; -+ -+static int __init ath79_use_image_cmdline(void) -+{ -+ char *p = __image_cmdline; -+ int replace = 0; -+ -+ if (*p == '-') { -+ replace = 1; -+ p++; -+ } -+ -+ if (*p == '\0') -+ return 0; -+ -+ if (replace) { -+ strlcpy(arcs_cmdline, p, sizeof(arcs_cmdline)); -+ } else { -+ strlcat(arcs_cmdline, " ", sizeof(arcs_cmdline)); -+ strlcat(arcs_cmdline, p, sizeof(arcs_cmdline)); -+ } -+ -+ return 1; -+} -+#else -+static inline int ath79_use_image_cmdline(void) { return 0; } -+#endif -+ - static int __init ath79_prom_init_myloader(void) - { - struct myloader_info *mylo; -@@ -98,6 +127,8 @@ static int __init ath79_prom_init_myload - - ath79_prom_append_cmdline("ethaddr", mac_buf); - -+ ath79_use_image_cmdline(); -+ - return 1; - } - -@@ -105,6 +136,9 @@ static __init void ath79_prom_init_cmdli - { - int i; - -+ if (ath79_use_image_cmdline()) -+ return; -+ - if (!is_valid_ram_addr(argv)) - return; - diff --git a/target/linux/ar71xx/patches-3.3/509-MIPS-ath79-process-board-kernel-option.patch b/target/linux/ar71xx/patches-3.3/509-MIPS-ath79-process-board-kernel-option.patch deleted file mode 100644 index 9236c6686d..0000000000 --- a/target/linux/ar71xx/patches-3.3/509-MIPS-ath79-process-board-kernel-option.patch +++ /dev/null @@ -1,11 +0,0 @@ ---- a/arch/mips/ath79/setup.c -+++ b/arch/mips/ath79/setup.c -@@ -225,6 +225,8 @@ void __init plat_time_init(void) - mips_hpt_frequency = clk_get_rate(clk) / 2; - } - -+__setup("board=", mips_machtype_setup); -+ - static int __init ath79_setup(void) - { - ath79_gpio_init(); diff --git a/target/linux/ar71xx/patches-3.3/510-MIPS-ath79-init-gpio-pin-of-wmac-device.patch b/target/linux/ar71xx/patches-3.3/510-MIPS-ath79-init-gpio-pin-of-wmac-device.patch deleted file mode 100644 index 2d2235e292..0000000000 --- a/target/linux/ar71xx/patches-3.3/510-MIPS-ath79-init-gpio-pin-of-wmac-device.patch +++ /dev/null @@ -1,14 +0,0 @@ ---- a/arch/mips/ath79/dev-wmac.c -+++ b/arch/mips/ath79/dev-wmac.c -@@ -24,7 +24,10 @@ - #include "dev-wmac.h" - - static u8 ath79_wmac_mac[ETH_ALEN]; --static struct ath9k_platform_data ath79_wmac_data; -+ -+static struct ath9k_platform_data ath79_wmac_data = { -+ .led_pin = -1, -+}; - - static struct resource ath79_wmac_resources[] = { - { diff --git a/target/linux/ar71xx/patches-3.3/520-MIPS-ath79-enable-UART-function.patch b/target/linux/ar71xx/patches-3.3/520-MIPS-ath79-enable-UART-function.patch deleted file mode 100644 index 1cb407f833..0000000000 --- a/target/linux/ar71xx/patches-3.3/520-MIPS-ath79-enable-UART-function.patch +++ /dev/null @@ -1,18 +0,0 @@ ---- a/arch/mips/ath79/dev-common.c -+++ b/arch/mips/ath79/dev-common.c -@@ -87,6 +87,15 @@ void __init ath79_register_uart(void) - if (IS_ERR(clk)) - panic("unable to get UART clock, err=%ld", PTR_ERR(clk)); - -+ if (soc_is_ar71xx()) -+ ath79_gpio_function_enable(AR71XX_GPIO_FUNC_UART_EN); -+ else if (soc_is_ar724x()) -+ ath79_gpio_function_enable(AR724X_GPIO_FUNC_UART_EN); -+ else if (soc_is_ar913x()) -+ ath79_gpio_function_enable(AR913X_GPIO_FUNC_UART_EN); -+ else if (soc_is_ar933x()) -+ ath79_gpio_function_enable(AR933X_GPIO_FUNC_UART_EN); -+ - if (soc_is_ar71xx() || - soc_is_ar724x() || - soc_is_ar913x() || diff --git a/target/linux/ar71xx/patches-3.3/521-MIPS-ath79-enable-UART-for-early_serial.patch b/target/linux/ar71xx/patches-3.3/521-MIPS-ath79-enable-UART-for-early_serial.patch deleted file mode 100644 index 489bc96738..0000000000 --- a/target/linux/ar71xx/patches-3.3/521-MIPS-ath79-enable-UART-for-early_serial.patch +++ /dev/null @@ -1,61 +0,0 @@ ---- a/arch/mips/ath79/early_printk.c -+++ b/arch/mips/ath79/early_printk.c -@@ -56,6 +56,46 @@ static void prom_putchar_dummy(unsigned - /* nothing to do */ - } - -+static void prom_enable_uart(u32 id) -+{ -+ void __iomem *gpio_base; -+ u32 uart_en; -+ u32 t; -+ -+ switch (id) { -+ case REV_ID_MAJOR_AR71XX: -+ uart_en = AR71XX_GPIO_FUNC_UART_EN; -+ break; -+ -+ case REV_ID_MAJOR_AR7240: -+ case REV_ID_MAJOR_AR7241: -+ case REV_ID_MAJOR_AR7242: -+ uart_en = AR724X_GPIO_FUNC_UART_EN; -+ break; -+ -+ case REV_ID_MAJOR_AR913X: -+ uart_en = AR913X_GPIO_FUNC_UART_EN; -+ break; -+ -+ case REV_ID_MAJOR_AR9330: -+ case REV_ID_MAJOR_AR9331: -+ uart_en = AR933X_GPIO_FUNC_UART_EN; -+ break; -+ -+ case REV_ID_MAJOR_AR9341: -+ case REV_ID_MAJOR_AR9342: -+ case REV_ID_MAJOR_AR9344: -+ /* TODO */ -+ default: -+ return; -+ } -+ -+ gpio_base = (void __iomem *)(KSEG1ADDR(AR71XX_GPIO_BASE)); -+ t = __raw_readl(gpio_base + AR71XX_GPIO_REG_FUNC); -+ t |= uart_en; -+ __raw_writel(t, gpio_base + AR71XX_GPIO_REG_FUNC); -+} -+ - static void prom_putchar_init(void) - { - void __iomem *base; -@@ -85,8 +125,10 @@ static void prom_putchar_init(void) - - default: - _prom_putchar = prom_putchar_dummy; -- break; -+ return; - } -+ -+ prom_enable_uart(id); - } - - void prom_putchar(unsigned char ch) diff --git a/target/linux/ar71xx/patches-3.3/522-MIPS-ath79-add-ath79_wmac_register_simple-helper.patch b/target/linux/ar71xx/patches-3.3/522-MIPS-ath79-add-ath79_wmac_register_simple-helper.patch deleted file mode 100644 index acf2a3fef6..0000000000 --- a/target/linux/ar71xx/patches-3.3/522-MIPS-ath79-add-ath79_wmac_register_simple-helper.patch +++ /dev/null @@ -1,21 +0,0 @@ ---- a/arch/mips/ath79/dev-wmac.c -+++ b/arch/mips/ath79/dev-wmac.c -@@ -163,3 +163,9 @@ void __init ath79_register_wmac(u8 *cal_ - - platform_device_register(&ath79_wmac_device); - } -+ -+void __init ath79_register_wmac_simple(void) -+{ -+ ath79_register_wmac(NULL, NULL); -+ ath79_wmac_data.eeprom_name = "soc_wmac.eeprom"; -+} ---- a/arch/mips/ath79/dev-wmac.h -+++ b/arch/mips/ath79/dev-wmac.h -@@ -13,5 +13,6 @@ - #define _ATH79_DEV_WMAC_H - - void ath79_register_wmac(u8 *cal_data, u8 *mac_addr); -+void ath79_register_wmac_simple(void); - - #endif /* _ATH79_DEV_WMAC_H */ diff --git a/target/linux/ar71xx/patches-3.3/523-MIPS-ath79-OTP-support.patch b/target/linux/ar71xx/patches-3.3/523-MIPS-ath79-OTP-support.patch deleted file mode 100644 index 5f7fd21008..0000000000 --- a/target/linux/ar71xx/patches-3.3/523-MIPS-ath79-OTP-support.patch +++ /dev/null @@ -1,166 +0,0 @@ ---- a/arch/mips/ath79/dev-wmac.c -+++ b/arch/mips/ath79/dev-wmac.c -@@ -139,6 +139,137 @@ static void qca955x_wmac_setup(void) - ath79_wmac_data.is_clk_25mhz = true; - } - -+static bool __init -+ar93xx_wmac_otp_read_word(void __iomem *base, int addr, u32 *data) -+{ -+ int timeout = 1000; -+ u32 val; -+ -+ __raw_readl(base + AR9300_OTP_BASE + (4 * addr)); -+ while (timeout--) { -+ val = __raw_readl(base + AR9300_OTP_STATUS); -+ if ((val & AR9300_OTP_STATUS_TYPE) == AR9300_OTP_STATUS_VALID) -+ break; -+ -+ udelay(10); -+ } -+ -+ if (!timeout) -+ return false; -+ -+ *data = __raw_readl(base + AR9300_OTP_READ_DATA); -+ return true; -+} -+ -+static bool __init -+ar93xx_wmac_otp_read(void __iomem *base, int addr, u8 *dest, int len) -+{ -+ u32 data; -+ int i; -+ -+ for (i = 0; i < len; i++) { -+ int offset = 8 * ((addr - i) % 4); -+ -+ if (!ar93xx_wmac_otp_read_word(base, (addr - i) / 4, &data)) -+ return false; -+ -+ dest[i] = (data >> offset) & 0xff; -+ } -+ -+ return true; -+} -+ -+static bool __init -+ar93xx_wmac_otp_uncompress(void __iomem *base, int addr, int len, u8 *dest, -+ int dest_start, int dest_len) -+{ -+ int dest_bytes = 0; -+ int offset = 0; -+ int end = addr - len; -+ u8 hdr[2]; -+ -+ while (addr > end) { -+ if (!ar93xx_wmac_otp_read(base, addr, hdr, 2)) -+ return false; -+ -+ addr -= 2; -+ offset += hdr[0]; -+ -+ if (offset <= dest_start + dest_len && -+ offset + len >= dest_start) { -+ int data_offset = 0; -+ int dest_offset = 0; -+ int copy_len; -+ -+ if (offset < dest_start) -+ data_offset = dest_start - offset; -+ else -+ dest_offset = offset - dest_start; -+ -+ copy_len = len - data_offset; -+ if (copy_len > dest_len - dest_offset) -+ copy_len = dest_len - dest_offset; -+ -+ ar93xx_wmac_otp_read(base, addr - data_offset, -+ dest + dest_offset, -+ copy_len); -+ -+ dest_bytes += copy_len; -+ } -+ addr -= hdr[1]; -+ } -+ return !!dest_bytes; -+} -+ -+bool __init ar93xx_wmac_read_mac_address(u8 *dest) -+{ -+ void __iomem *base; -+ bool ret = false; -+ int addr = 0x1ff; -+ unsigned int len; -+ u32 hdr_u32; -+ u8 *hdr = (u8 *) &hdr_u32; -+ u8 mac[6] = { 0x00, 0x02, 0x03, 0x04, 0x05, 0x06 }; -+ int mac_start = 2, mac_end = 8; -+ -+ BUG_ON(!soc_is_ar933x() && !soc_is_ar934x()); -+ base = ioremap_nocache(AR933X_WMAC_BASE, AR933X_WMAC_SIZE); -+ while (addr > sizeof(hdr)) { -+ if (!ar93xx_wmac_otp_read(base, addr, hdr, sizeof(hdr))) -+ break; -+ -+ if (hdr_u32 == 0 || hdr_u32 == ~0) -+ break; -+ -+ len = (hdr[1] << 4) | (hdr[2] >> 4); -+ addr -= 4; -+ -+ switch (hdr[0] >> 5) { -+ case 0: -+ if (len < mac_end) -+ break; -+ -+ ar93xx_wmac_otp_read(base, addr - mac_start, mac, 6); -+ ret = true; -+ break; -+ case 3: -+ ret |= ar93xx_wmac_otp_uncompress(base, addr, len, mac, -+ mac_start, 6); -+ break; -+ default: -+ break; -+ } -+ -+ addr -= len + 2; -+ } -+ -+ iounmap(base); -+ if (ret) -+ memcpy(dest, mac, 6); -+ -+ return ret; -+} -+ - void __init ath79_register_wmac(u8 *cal_data, u8 *mac_addr) - { - if (soc_is_ar913x()) ---- a/arch/mips/ath79/dev-wmac.h -+++ b/arch/mips/ath79/dev-wmac.h -@@ -14,5 +14,6 @@ - - void ath79_register_wmac(u8 *cal_data, u8 *mac_addr); - void ath79_register_wmac_simple(void); -+bool ar93xx_wmac_read_mac_address(u8 *dest); - - #endif /* _ATH79_DEV_WMAC_H */ ---- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -@@ -113,6 +113,14 @@ - #define QCA955X_EHCI1_BASE 0x1b400000 - #define QCA955X_EHCI_SIZE 0x200 - -+#define AR9300_OTP_BASE 0x14000 -+#define AR9300_OTP_STATUS 0x15f18 -+#define AR9300_OTP_STATUS_TYPE 0x7 -+#define AR9300_OTP_STATUS_VALID 0x4 -+#define AR9300_OTP_STATUS_ACCESS_BUSY 0x2 -+#define AR9300_OTP_STATUS_SM_BUSY 0x1 -+#define AR9300_OTP_READ_DATA 0x15f1c -+ - /* - * DDR_CTRL block - */ diff --git a/target/linux/ar71xx/patches-3.3/524-MIPS-ath79-add-ath79_wmac_disable_25ghz-helpers.patch b/target/linux/ar71xx/patches-3.3/524-MIPS-ath79-add-ath79_wmac_disable_25ghz-helpers.patch deleted file mode 100644 index bada5a8976..0000000000 --- a/target/linux/ar71xx/patches-3.3/524-MIPS-ath79-add-ath79_wmac_disable_25ghz-helpers.patch +++ /dev/null @@ -1,31 +0,0 @@ ---- a/arch/mips/ath79/dev-wmac.c -+++ b/arch/mips/ath79/dev-wmac.c -@@ -270,6 +270,16 @@ bool __init ar93xx_wmac_read_mac_address - return ret; - } - -+void __init ath79_wmac_disable_2ghz(void) -+{ -+ ath79_wmac_data.disable_2ghz = true; -+} -+ -+void __init ath79_wmac_disable_5ghz(void) -+{ -+ ath79_wmac_data.disable_5ghz = true; -+} -+ - void __init ath79_register_wmac(u8 *cal_data, u8 *mac_addr) - { - if (soc_is_ar913x()) ---- a/arch/mips/ath79/dev-wmac.h -+++ b/arch/mips/ath79/dev-wmac.h -@@ -14,6 +14,9 @@ - - void ath79_register_wmac(u8 *cal_data, u8 *mac_addr); - void ath79_register_wmac_simple(void); -+void ath79_wmac_disable_2ghz(void); -+void ath79_wmac_disable_5ghz(void); -+ - bool ar93xx_wmac_read_mac_address(u8 *dest); - - #endif /* _ATH79_DEV_WMAC_H */ diff --git a/target/linux/ar71xx/patches-3.3/601-MIPS-ath79-add-more-register-defines.patch b/target/linux/ar71xx/patches-3.3/601-MIPS-ath79-add-more-register-defines.patch deleted file mode 100644 index 7ca7dfc049..0000000000 --- a/target/linux/ar71xx/patches-3.3/601-MIPS-ath79-add-more-register-defines.patch +++ /dev/null @@ -1,302 +0,0 @@ ---- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -@@ -21,6 +21,10 @@ - #include <linux/bitops.h> - - #define AR71XX_APB_BASE 0x18000000 -+#define AR71XX_GE0_BASE 0x19000000 -+#define AR71XX_GE0_SIZE 0x10000 -+#define AR71XX_GE1_BASE 0x1a000000 -+#define AR71XX_GE1_SIZE 0x10000 - #define AR71XX_EHCI_BASE 0x1b000000 - #define AR71XX_EHCI_SIZE 0x1000 - #define AR71XX_OHCI_BASE 0x1c000000 -@@ -40,6 +44,8 @@ - #define AR71XX_PLL_SIZE 0x100 - #define AR71XX_RESET_BASE (AR71XX_APB_BASE + 0x00060000) - #define AR71XX_RESET_SIZE 0x100 -+#define AR71XX_MII_BASE (AR71XX_APB_BASE + 0x00070000) -+#define AR71XX_MII_SIZE 0x100 - - #define AR71XX_PCI_MEM_BASE 0x10000000 - #define AR71XX_PCI_MEM_SIZE 0x07000000 -@@ -82,17 +88,23 @@ - - #define AR933X_UART_BASE (AR71XX_APB_BASE + 0x00020000) - #define AR933X_UART_SIZE 0x14 -+#define AR933X_GMAC_BASE (AR71XX_APB_BASE + 0x00070000) -+#define AR933X_GMAC_SIZE 0x04 - #define AR933X_WMAC_BASE (AR71XX_APB_BASE + 0x00100000) - #define AR933X_WMAC_SIZE 0x20000 - #define AR933X_EHCI_BASE 0x1b000000 - #define AR933X_EHCI_SIZE 0x1000 - -+#define AR934X_GMAC_BASE (AR71XX_APB_BASE + 0x00070000) -+#define AR934X_GMAC_SIZE 0x14 - #define AR934X_WMAC_BASE (AR71XX_APB_BASE + 0x00100000) - #define AR934X_WMAC_SIZE 0x20000 - #define AR934X_EHCI_BASE 0x1b000000 - #define AR934X_EHCI_SIZE 0x200 - #define AR934X_SRIF_BASE (AR71XX_APB_BASE + 0x00116000) - #define AR934X_SRIF_SIZE 0x1000 -+#define AR934X_NFC_BASE 0x1b000200 -+#define AR934X_NFC_SIZE 0xb8 - - #define QCA955X_PCI_MEM_BASE0 0x10000000 - #define QCA955X_PCI_MEM_BASE1 0x12000000 -@@ -112,6 +124,10 @@ - #define QCA955X_EHCI0_BASE 0x1b000000 - #define QCA955X_EHCI1_BASE 0x1b400000 - #define QCA955X_EHCI_SIZE 0x200 -+#define QCA955X_GMAC_BASE (AR71XX_APB_BASE + 0x00070000) -+#define QCA955X_GMAC_SIZE 0x40 -+#define QCA955X_NFC_BASE 0x1b000200 -+#define QCA955X_NFC_SIZE 0xb8 - - #define AR9300_OTP_BASE 0x14000 - #define AR9300_OTP_STATUS 0x15f18 -@@ -175,6 +191,9 @@ - #define AR71XX_AHB_DIV_SHIFT 20 - #define AR71XX_AHB_DIV_MASK 0x7 - -+#define AR71XX_ETH0_PLL_SHIFT 17 -+#define AR71XX_ETH1_PLL_SHIFT 19 -+ - #define AR724X_PLL_REG_CPU_CONFIG 0x00 - #define AR724X_PLL_REG_PCIE_CONFIG 0x18 - -@@ -187,6 +206,8 @@ - #define AR724X_DDR_DIV_SHIFT 22 - #define AR724X_DDR_DIV_MASK 0x3 - -+#define AR7242_PLL_REG_ETH0_INT_CLOCK 0x2c -+ - #define AR913X_PLL_REG_CPU_CONFIG 0x00 - #define AR913X_PLL_REG_ETH_CONFIG 0x04 - #define AR913X_PLL_REG_ETH0_INT_CLOCK 0x14 -@@ -199,6 +220,9 @@ - #define AR913X_AHB_DIV_SHIFT 19 - #define AR913X_AHB_DIV_MASK 0x1 - -+#define AR913X_ETH0_PLL_SHIFT 20 -+#define AR913X_ETH1_PLL_SHIFT 22 -+ - #define AR933X_PLL_CPU_CONFIG_REG 0x00 - #define AR933X_PLL_CLOCK_CTRL_REG 0x08 - -@@ -220,6 +244,8 @@ - #define AR934X_PLL_CPU_CONFIG_REG 0x00 - #define AR934X_PLL_DDR_CONFIG_REG 0x04 - #define AR934X_PLL_CPU_DDR_CLK_CTRL_REG 0x08 -+#define AR934X_PLL_SWITCH_CLOCK_CONTROL_REG 0x24 -+#define AR934X_PLL_ETH_XMII_CONTROL_REG 0x2c - - #define AR934X_PLL_CPU_CONFIG_NFRAC_SHIFT 0 - #define AR934X_PLL_CPU_CONFIG_NFRAC_MASK 0x3f -@@ -252,6 +278,8 @@ - #define AR934X_PLL_CPU_DDR_CLK_CTRL_DDRCLK_FROM_DDRPLL BIT(21) - #define AR934X_PLL_CPU_DDR_CLK_CTRL_AHBCLK_FROM_DDRPLL BIT(24) - -+#define AR934X_PLL_SWITCH_CLOCK_CONTROL_MDIO_CLK_SEL BIT(6) -+ - #define QCA955X_PLL_CPU_CONFIG_REG 0x00 - #define QCA955X_PLL_DDR_CONFIG_REG 0x04 - #define QCA955X_PLL_CLK_CTRL_REG 0x08 -@@ -378,16 +406,50 @@ - #define AR913X_RESET_USB_HOST BIT(5) - #define AR913X_RESET_USB_PHY BIT(4) - -+#define AR933X_RESET_GE1_MDIO BIT(23) -+#define AR933X_RESET_GE0_MDIO BIT(22) -+#define AR933X_RESET_GE1_MAC BIT(13) - #define AR933X_RESET_WMAC BIT(11) -+#define AR933X_RESET_GE0_MAC BIT(9) - #define AR933X_RESET_USB_HOST BIT(5) - #define AR933X_RESET_USB_PHY BIT(4) - #define AR933X_RESET_USBSUS_OVERRIDE BIT(3) - -+#define AR934X_RESET_HOST BIT(31) -+#define AR934X_RESET_SLIC BIT(30) -+#define AR934X_RESET_HDMA BIT(29) -+#define AR934X_RESET_EXTERNAL BIT(28) -+#define AR934X_RESET_RTC BIT(27) -+#define AR934X_RESET_PCIE_EP_INT BIT(26) -+#define AR934X_RESET_CHKSUM_ACC BIT(25) -+#define AR934X_RESET_FULL_CHIP BIT(24) -+#define AR934X_RESET_GE1_MDIO BIT(23) -+#define AR934X_RESET_GE0_MDIO BIT(22) -+#define AR934X_RESET_CPU_NMI BIT(21) -+#define AR934X_RESET_CPU_COLD BIT(20) -+#define AR934X_RESET_HOST_RESET_INT BIT(19) -+#define AR934X_RESET_PCIE_EP BIT(18) -+#define AR934X_RESET_UART1 BIT(17) -+#define AR934X_RESET_DDR BIT(16) -+#define AR934X_RESET_USB_PHY_PLL_PWD_EXT BIT(15) -+#define AR934X_RESET_NANDF BIT(14) -+#define AR934X_RESET_GE1_MAC BIT(13) -+#define AR934X_RESET_ETH_SWITCH_ANALOG BIT(12) - #define AR934X_RESET_USB_PHY_ANALOG BIT(11) -+#define AR934X_RESET_HOST_DMA_INT BIT(10) -+#define AR934X_RESET_GE0_MAC BIT(9) -+#define AR934X_RESET_ETH_SWITCH BIT(8) -+#define AR934X_RESET_PCIE_PHY BIT(7) -+#define AR934X_RESET_PCIE BIT(6) - #define AR934X_RESET_USB_HOST BIT(5) - #define AR934X_RESET_USB_PHY BIT(4) - #define AR934X_RESET_USBSUS_OVERRIDE BIT(3) -+#define AR934X_RESET_LUT BIT(2) -+#define AR934X_RESET_MBOX BIT(1) -+#define AR934X_RESET_I2S BIT(0) - -+#define AR933X_BOOTSTRAP_MDIO_GPIO_EN BIT(18) -+#define AR933X_BOOTSTRAP_EEPBUSY BIT(4) - #define AR933X_BOOTSTRAP_REF_CLK_40 BIT(0) - - #define AR934X_BOOTSTRAP_SW_OPTION8 BIT(23) -@@ -528,6 +590,12 @@ - #define AR71XX_GPIO_REG_INT_ENABLE 0x24 - #define AR71XX_GPIO_REG_FUNC 0x28 - -+#define AR934X_GPIO_REG_OUT_FUNC0 0x2c -+#define AR934X_GPIO_REG_OUT_FUNC1 0x30 -+#define AR934X_GPIO_REG_OUT_FUNC2 0x34 -+#define AR934X_GPIO_REG_OUT_FUNC3 0x38 -+#define AR934X_GPIO_REG_OUT_FUNC4 0x3c -+#define AR934X_GPIO_REG_OUT_FUNC5 0x40 - #define AR934X_GPIO_REG_FUNC 0x6c - - #define AR71XX_GPIO_COUNT 16 -@@ -558,4 +626,133 @@ - #define AR934X_SRIF_DPLL2_OUTDIV_SHIFT 13 - #define AR934X_SRIF_DPLL2_OUTDIV_MASK 0x7 - -+#define AR71XX_GPIO_FUNC_STEREO_EN BIT(17) -+#define AR71XX_GPIO_FUNC_SLIC_EN BIT(16) -+#define AR71XX_GPIO_FUNC_SPI_CS2_EN BIT(13) -+#define AR71XX_GPIO_FUNC_SPI_CS1_EN BIT(12) -+#define AR71XX_GPIO_FUNC_UART_EN BIT(8) -+#define AR71XX_GPIO_FUNC_USB_OC_EN BIT(4) -+#define AR71XX_GPIO_FUNC_USB_CLK_EN BIT(0) -+ -+#define AR724X_GPIO_FUNC_GE0_MII_CLK_EN BIT(19) -+#define AR724X_GPIO_FUNC_SPI_EN BIT(18) -+#define AR724X_GPIO_FUNC_SPI_CS_EN2 BIT(14) -+#define AR724X_GPIO_FUNC_SPI_CS_EN1 BIT(13) -+#define AR724X_GPIO_FUNC_CLK_OBS5_EN BIT(12) -+#define AR724X_GPIO_FUNC_CLK_OBS4_EN BIT(11) -+#define AR724X_GPIO_FUNC_CLK_OBS3_EN BIT(10) -+#define AR724X_GPIO_FUNC_CLK_OBS2_EN BIT(9) -+#define AR724X_GPIO_FUNC_CLK_OBS1_EN BIT(8) -+#define AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN BIT(7) -+#define AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN BIT(6) -+#define AR724X_GPIO_FUNC_ETH_SWITCH_LED2_EN BIT(5) -+#define AR724X_GPIO_FUNC_ETH_SWITCH_LED1_EN BIT(4) -+#define AR724X_GPIO_FUNC_ETH_SWITCH_LED0_EN BIT(3) -+#define AR724X_GPIO_FUNC_UART_RTS_CTS_EN BIT(2) -+#define AR724X_GPIO_FUNC_UART_EN BIT(1) -+#define AR724X_GPIO_FUNC_JTAG_DISABLE BIT(0) -+ -+#define AR913X_GPIO_FUNC_WMAC_LED_EN BIT(22) -+#define AR913X_GPIO_FUNC_EXP_PORT_CS_EN BIT(21) -+#define AR913X_GPIO_FUNC_I2S_REFCLKEN BIT(20) -+#define AR913X_GPIO_FUNC_I2S_MCKEN BIT(19) -+#define AR913X_GPIO_FUNC_I2S1_EN BIT(18) -+#define AR913X_GPIO_FUNC_I2S0_EN BIT(17) -+#define AR913X_GPIO_FUNC_SLIC_EN BIT(16) -+#define AR913X_GPIO_FUNC_UART_RTSCTS_EN BIT(9) -+#define AR913X_GPIO_FUNC_UART_EN BIT(8) -+#define AR913X_GPIO_FUNC_USB_CLK_EN BIT(4) -+ -+#define AR933X_GPIO_FUNC_SPDIF2TCK BIT(31) -+#define AR933X_GPIO_FUNC_SPDIF_EN BIT(30) -+#define AR933X_GPIO_FUNC_I2SO_22_18_EN BIT(29) -+#define AR933X_GPIO_FUNC_I2S_MCK_EN BIT(27) -+#define AR933X_GPIO_FUNC_I2SO_EN BIT(26) -+#define AR933X_GPIO_FUNC_ETH_SWITCH_LED_DUPL BIT(25) -+#define AR933X_GPIO_FUNC_ETH_SWITCH_LED_COLL BIT(24) -+#define AR933X_GPIO_FUNC_ETH_SWITCH_LED_ACT BIT(23) -+#define AR933X_GPIO_FUNC_SPI_EN BIT(18) -+#define AR933X_GPIO_FUNC_SPI_CS_EN2 BIT(14) -+#define AR933X_GPIO_FUNC_SPI_CS_EN1 BIT(13) -+#define AR933X_GPIO_FUNC_ETH_SWITCH_LED4_EN BIT(7) -+#define AR933X_GPIO_FUNC_ETH_SWITCH_LED3_EN BIT(6) -+#define AR933X_GPIO_FUNC_ETH_SWITCH_LED2_EN BIT(5) -+#define AR933X_GPIO_FUNC_ETH_SWITCH_LED1_EN BIT(4) -+#define AR933X_GPIO_FUNC_ETH_SWITCH_LED0_EN BIT(3) -+#define AR933X_GPIO_FUNC_UART_RTS_CTS_EN BIT(2) -+#define AR933X_GPIO_FUNC_UART_EN BIT(1) -+#define AR933X_GPIO_FUNC_JTAG_DISABLE BIT(0) -+ -+#define AR934X_GPIO_FUNC_DDR_DQOE_EN BIT(17) -+#define AR934X_GPIO_FUNC_SPI_CS_1_EN BIT(14) -+#define AR934X_GPIO_FUNC_SPI_CS_0_EN BIT(13) -+ -+#define AR934X_GPIO_OUT_GPIO 0x00 -+ -+/* -+ * MII_CTRL block -+ */ -+#define AR71XX_MII_REG_MII0_CTRL 0x00 -+#define AR71XX_MII_REG_MII1_CTRL 0x04 -+ -+#define AR71XX_MII_CTRL_IF_MASK 3 -+#define AR71XX_MII_CTRL_SPEED_SHIFT 4 -+#define AR71XX_MII_CTRL_SPEED_MASK 3 -+#define AR71XX_MII_CTRL_SPEED_10 0 -+#define AR71XX_MII_CTRL_SPEED_100 1 -+#define AR71XX_MII_CTRL_SPEED_1000 2 -+ -+#define AR71XX_MII0_CTRL_IF_GMII 0 -+#define AR71XX_MII0_CTRL_IF_MII 1 -+#define AR71XX_MII0_CTRL_IF_RGMII 2 -+#define AR71XX_MII0_CTRL_IF_RMII 3 -+ -+#define AR71XX_MII1_CTRL_IF_RGMII 0 -+#define AR71XX_MII1_CTRL_IF_RMII 1 -+ -+/* -+ * AR933X GMAC interface -+ */ -+#define AR933X_GMAC_REG_ETH_CFG 0x00 -+ -+#define AR933X_ETH_CFG_RGMII_GE0 BIT(0) -+#define AR933X_ETH_CFG_MII_GE0 BIT(1) -+#define AR933X_ETH_CFG_GMII_GE0 BIT(2) -+#define AR933X_ETH_CFG_MII_GE0_MASTER BIT(3) -+#define AR933X_ETH_CFG_MII_GE0_SLAVE BIT(4) -+#define AR933X_ETH_CFG_MII_GE0_ERR_EN BIT(5) -+#define AR933X_ETH_CFG_SW_PHY_SWAP BIT(7) -+#define AR933X_ETH_CFG_SW_PHY_ADDR_SWAP BIT(8) -+#define AR933X_ETH_CFG_RMII_GE0 BIT(9) -+#define AR933X_ETH_CFG_RMII_GE0_SPD_10 0 -+#define AR933X_ETH_CFG_RMII_GE0_SPD_100 BIT(10) -+ -+/* -+ * AR934X GMAC Interface -+ */ -+#define AR934X_GMAC_REG_ETH_CFG 0x00 -+ -+#define AR934X_ETH_CFG_RGMII_GMAC0 BIT(0) -+#define AR934X_ETH_CFG_MII_GMAC0 BIT(1) -+#define AR934X_ETH_CFG_GMII_GMAC0 BIT(2) -+#define AR934X_ETH_CFG_MII_GMAC0_MASTER BIT(3) -+#define AR934X_ETH_CFG_MII_GMAC0_SLAVE BIT(4) -+#define AR934X_ETH_CFG_MII_GMAC0_ERR_EN BIT(5) -+#define AR934X_ETH_CFG_SW_ONLY_MODE BIT(6) -+#define AR934X_ETH_CFG_SW_PHY_SWAP BIT(7) -+#define AR934X_ETH_CFG_SW_APB_ACCESS BIT(9) -+#define AR934X_ETH_CFG_RMII_GMAC0 BIT(10) -+#define AR933X_ETH_CFG_MII_CNTL_SPEED BIT(11) -+#define AR934X_ETH_CFG_RMII_GMAC0_MASTER BIT(12) -+#define AR933X_ETH_CFG_SW_ACC_MSB_FIRST BIT(13) -+ -+/* -+ * QCA955X GMAC Interface -+ */ -+ -+#define QCA955X_GMAC_REG_ETH_CFG 0x00 -+ -+#define QCA955X_ETH_CFG_RGMII_GMAC0 BIT(0) -+#define QCA955X_ETH_CFG_SGMII_GMAC0 BIT(6) -+ - #endif /* __ASM_MACH_AR71XX_REGS_H */ diff --git a/target/linux/ar71xx/patches-3.3/602-MIPS-ath79-add-openwrt-stuff.patch b/target/linux/ar71xx/patches-3.3/602-MIPS-ath79-add-openwrt-stuff.patch deleted file mode 100644 index e61496fcd4..0000000000 --- a/target/linux/ar71xx/patches-3.3/602-MIPS-ath79-add-openwrt-stuff.patch +++ /dev/null @@ -1,76 +0,0 @@ ---- a/arch/mips/ath79/Kconfig -+++ b/arch/mips/ath79/Kconfig -@@ -106,6 +106,20 @@ config SOC_QCA955X - select PCI_AR724X if PCI - def_bool n - -+config ATH79_DEV_M25P80 -+ select ATH79_DEV_SPI -+ def_bool n -+ -+config ATH79_DEV_AP9X_PCI -+ select ATH79_PCI_ATH9K_FIXUP -+ def_bool n -+ -+config ATH79_DEV_DSA -+ def_bool n -+ -+config ATH79_DEV_ETH -+ def_bool n -+ - config PCI_AR724X - def_bool n - -@@ -115,6 +129,10 @@ config ATH79_DEV_GPIO_BUTTONS - config ATH79_DEV_LEDS_GPIO - def_bool n - -+config ATH79_DEV_NFC -+ depends on (SOC_AR934X) -+ def_bool n -+ - config ATH79_DEV_SPI - def_bool n - -@@ -125,4 +143,13 @@ config ATH79_DEV_WMAC - depends on (SOC_AR913X || SOC_AR933X || SOC_AR934X || SOC_QCA955X) - def_bool n - -+config ATH79_NVRAM -+ def_bool n -+ -+config ATH79_PCI_ATH9K_FIXUP -+ def_bool n -+ -+config ATH79_ROUTERBOOT -+ def_bool n -+ - endif ---- a/arch/mips/ath79/Makefile -+++ b/arch/mips/ath79/Makefile -@@ -17,13 +17,25 @@ obj-$(CONFIG_PCI) += pci.o - # Devices - # - obj-y += dev-common.o -+obj-$(CONFIG_ATH79_DEV_AP9X_PCI) += dev-ap9x-pci.o -+obj-$(CONFIG_ATH79_DEV_DSA) += dev-dsa.o -+obj-$(CONFIG_ATH79_DEV_ETH) += dev-eth.o - obj-$(CONFIG_ATH79_DEV_GPIO_BUTTONS) += dev-gpio-buttons.o - obj-$(CONFIG_ATH79_DEV_LEDS_GPIO) += dev-leds-gpio.o -+obj-$(CONFIG_ATH79_DEV_M25P80) += dev-m25p80.o -+obj-$(CONFIG_ATH79_DEV_NFC) += dev-nfc.o - obj-$(CONFIG_ATH79_DEV_SPI) += dev-spi.o - obj-$(CONFIG_ATH79_DEV_USB) += dev-usb.o - obj-$(CONFIG_ATH79_DEV_WMAC) += dev-wmac.o - - # -+# Miscellaneous objects -+# -+obj-$(CONFIG_ATH79_NVRAM) += nvram.o -+obj-$(CONFIG_ATH79_PCI_ATH9K_FIXUP) += pci-ath9k-fixup.o -+obj-$(CONFIG_ATH79_ROUTERBOOT) += routerboot.o -+ -+# - # Machines - # - obj-$(CONFIG_ATH79_MACH_AP121) += mach-ap121.o diff --git a/target/linux/ar71xx/patches-3.3/603-MIPS-ath79-ap121-fixes.patch b/target/linux/ar71xx/patches-3.3/603-MIPS-ath79-ap121-fixes.patch deleted file mode 100644 index 1cacde6046..0000000000 --- a/target/linux/ar71xx/patches-3.3/603-MIPS-ath79-ap121-fixes.patch +++ /dev/null @@ -1,163 +0,0 @@ ---- a/arch/mips/ath79/mach-ap121.c -+++ b/arch/mips/ath79/mach-ap121.c -@@ -1,19 +1,21 @@ - /* - * Atheros AP121 board support - * -- * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org> -+ * Copyright (C) 2011-2012 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - --#include "machtypes.h" -+#include "dev-eth.h" - #include "dev-gpio-buttons.h" - #include "dev-leds-gpio.h" -+#include "dev-m25p80.h" - #include "dev-spi.h" - #include "dev-usb.h" - #include "dev-wmac.h" -+#include "machtypes.h" - - #define AP121_GPIO_LED_WLAN 0 - #define AP121_GPIO_LED_USB 1 -@@ -24,7 +26,14 @@ - #define AP121_KEYS_POLL_INTERVAL 20 /* msecs */ - #define AP121_KEYS_DEBOUNCE_INTERVAL (3 * AP121_KEYS_POLL_INTERVAL) - --#define AP121_CAL_DATA_ADDR 0x1fff1000 -+#define AP121_MAC0_OFFSET 0x0000 -+#define AP121_MAC1_OFFSET 0x0006 -+#define AP121_CALDATA_OFFSET 0x1000 -+#define AP121_WMAC_MAC_OFFSET 0x1002 -+ -+#define AP121_MINI_GPIO_LED_WLAN 0 -+#define AP121_MINI_GPIO_BTN_JUMPSTART 12 -+#define AP121_MINI_GPIO_BTN_RESET 11 - - static struct gpio_led ap121_leds_gpio[] __initdata = { - { -@@ -58,41 +67,78 @@ static struct gpio_keys_button ap121_gpi - } - }; - --static struct ath79_spi_controller_data ap121_spi0_data = { -- .cs_type = ATH79_SPI_CS_TYPE_INTERNAL, -- .cs_line = 0, -+static struct gpio_led ap121_mini_leds_gpio[] __initdata = { -+ { -+ .name = "ap121:green:wlan", -+ .gpio = AP121_MINI_GPIO_LED_WLAN, -+ .active_low = 0, -+ }, - }; - --static struct spi_board_info ap121_spi_info[] = { -+static struct gpio_keys_button ap121_mini_gpio_keys[] __initdata = { - { -- .bus_num = 0, -- .chip_select = 0, -- .max_speed_hz = 25000000, -- .modalias = "mx25l1606e", -- .controller_data = &ap121_spi0_data, -+ .desc = "jumpstart button", -+ .type = EV_KEY, -+ .code = KEY_WPS_BUTTON, -+ .debounce_interval = AP121_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = AP121_MINI_GPIO_BTN_JUMPSTART, -+ .active_low = 1, -+ }, -+ { -+ .desc = "reset button", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = AP121_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = AP121_MINI_GPIO_BTN_RESET, -+ .active_low = 1, - } - }; - --static struct ath79_spi_platform_data ap121_spi_data = { -- .bus_num = 0, -- .num_chipselect = 1, --}; -+static void __init ap121_common_setup(void) -+{ -+ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); -+ -+ ath79_register_m25p80(NULL); -+ ath79_register_wmac(art + AP121_CALDATA_OFFSET, -+ art + AP121_WMAC_MAC_OFFSET); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, art + AP121_MAC0_OFFSET, 0); -+ ath79_init_mac(ath79_eth1_data.mac_addr, art + AP121_MAC1_OFFSET, 0); -+ -+ ath79_register_mdio(0, 0x0); -+ -+ /* LAN ports */ -+ ath79_register_eth(1); -+ -+ /* WAN port */ -+ ath79_register_eth(0); -+} - - static void __init ap121_setup(void) - { -- u8 *cal_data = (u8 *) KSEG1ADDR(AP121_CAL_DATA_ADDR); -+ ap121_common_setup(); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(ap121_leds_gpio), - ap121_leds_gpio); - ath79_register_gpio_keys_polled(-1, AP121_KEYS_POLL_INTERVAL, - ARRAY_SIZE(ap121_gpio_keys), - ap121_gpio_keys); -- -- ath79_register_spi(&ap121_spi_data, ap121_spi_info, -- ARRAY_SIZE(ap121_spi_info)); - ath79_register_usb(); -- ath79_register_wmac(cal_data, NULL); - } - - MIPS_MACHINE(ATH79_MACH_AP121, "AP121", "Atheros AP121 reference board", - ap121_setup); -+ -+static void __init ap121_mini_setup(void) -+{ -+ ap121_common_setup(); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(ap121_mini_leds_gpio), -+ ap121_mini_leds_gpio); -+ ath79_register_gpio_keys_polled(-1, AP121_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(ap121_mini_gpio_keys), -+ ap121_mini_gpio_keys); -+} -+ -+MIPS_MACHINE(ATH79_MACH_AP121_MINI, "AP121-MINI", "Atheros AP121-MINI", -+ ap121_mini_setup); ---- a/arch/mips/ath79/Kconfig -+++ b/arch/mips/ath79/Kconfig -@@ -5,9 +5,10 @@ menu "Atheros AR71XX/AR724X/AR913X machi - config ATH79_MACH_AP121 - bool "Atheros AP121 reference board" - select SOC_AR933X -+ select ATH79_DEV_ETH - select ATH79_DEV_GPIO_BUTTONS - select ATH79_DEV_LEDS_GPIO -- select ATH79_DEV_SPI -+ select ATH79_DEV_M25P80 - select ATH79_DEV_USB - select ATH79_DEV_WMAC - help ---- a/arch/mips/ath79/machtypes.h -+++ b/arch/mips/ath79/machtypes.h -@@ -17,6 +17,7 @@ - enum ath79_mach_type { - ATH79_MACH_GENERIC = 0, - ATH79_MACH_AP121, /* Atheros AP121 reference board */ -+ ATH79_MACH_AP121_MINI, /* Atheros AP121-MINI reference board */ - ATH79_MACH_AP136, /* Atheros AP136 reference board */ - ATH79_MACH_AP81, /* Atheros AP81 reference board */ - ATH79_MACH_DB120, /* Atheros DB120 reference board */ diff --git a/target/linux/ar71xx/patches-3.3/604-MIPS-ath79-ap81-fixes.patch b/target/linux/ar71xx/patches-3.3/604-MIPS-ath79-ap81-fixes.patch deleted file mode 100644 index 3cc012d1a0..0000000000 --- a/target/linux/ar71xx/patches-3.3/604-MIPS-ath79-ap81-fixes.patch +++ /dev/null @@ -1,128 +0,0 @@ ---- a/arch/mips/ath79/mach-ap81.c -+++ b/arch/mips/ath79/mach-ap81.c -@@ -9,12 +9,16 @@ - * by the Free Software Foundation. - */ - --#include "machtypes.h" --#include "dev-wmac.h" -+#include <linux/mtd/mtd.h> -+#include <linux/mtd/partitions.h> -+ -+#include "dev-eth.h" - #include "dev-gpio-buttons.h" - #include "dev-leds-gpio.h" --#include "dev-spi.h" -+#include "dev-m25p80.h" - #include "dev-usb.h" -+#include "dev-wmac.h" -+#include "machtypes.h" - - #define AP81_GPIO_LED_STATUS 1 - #define AP81_GPIO_LED_AOSS 3 -@@ -29,6 +33,37 @@ - - #define AP81_CAL_DATA_ADDR 0x1fff1000 - -+static struct mtd_partition ap81_partitions[] = { -+ { -+ .name = "u-boot", -+ .offset = 0, -+ .size = 0x040000, -+ .mask_flags = MTD_WRITEABLE, -+ }, { -+ .name = "u-boot-env", -+ .offset = 0x040000, -+ .size = 0x010000, -+ }, { -+ .name = "rootfs", -+ .offset = 0x050000, -+ .size = 0x500000, -+ }, { -+ .name = "uImage", -+ .offset = 0x550000, -+ .size = 0x100000, -+ }, { -+ .name = "ART", -+ .offset = 0x650000, -+ .size = 0x1b0000, -+ .mask_flags = MTD_WRITEABLE, -+ } -+}; -+ -+static struct flash_platform_data ap81_flash_data = { -+ .parts = ap81_partitions, -+ .nr_parts = ARRAY_SIZE(ap81_partitions), -+}; -+ - static struct gpio_led ap81_leds_gpio[] __initdata = { - { - .name = "ap81:green:status", -@@ -67,26 +102,6 @@ static struct gpio_keys_button ap81_gpio - } - }; - --static struct ath79_spi_controller_data ap81_spi0_data = { -- .cs_type = ATH79_SPI_CS_TYPE_INTERNAL, -- .cs_line = 0, --}; -- --static struct spi_board_info ap81_spi_info[] = { -- { -- .bus_num = 0, -- .chip_select = 0, -- .max_speed_hz = 25000000, -- .modalias = "m25p64", -- .controller_data = &ap81_spi0_data, -- } --}; -- --static struct ath79_spi_platform_data ap81_spi_data = { -- .bus_num = 0, -- .num_chipselect = 1, --}; -- - static void __init ap81_setup(void) - { - u8 *cal_data = (u8 *) KSEG1ADDR(AP81_CAL_DATA_ADDR); -@@ -96,10 +111,24 @@ static void __init ap81_setup(void) - ath79_register_gpio_keys_polled(-1, AP81_KEYS_POLL_INTERVAL, - ARRAY_SIZE(ap81_gpio_keys), - ap81_gpio_keys); -- ath79_register_spi(&ap81_spi_data, ap81_spi_info, -- ARRAY_SIZE(ap81_spi_info)); -+ ath79_register_m25p80(&ap81_flash_data); - ath79_register_wmac(cal_data, NULL); - ath79_register_usb(); -+ -+ ath79_register_mdio(0, 0x0); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, cal_data, 0); -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; -+ ath79_eth0_data.speed = SPEED_100; -+ ath79_eth0_data.duplex = DUPLEX_FULL; -+ ath79_eth0_data.has_ar8216 = 1; -+ -+ ath79_init_mac(ath79_eth1_data.mac_addr, cal_data, 1); -+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; -+ ath79_eth1_data.phy_mask = 0x10; -+ -+ ath79_register_eth(0); -+ ath79_register_eth(1); - } - - MIPS_MACHINE(ATH79_MACH_AP81, "AP81", "Atheros AP81 reference board", ---- a/arch/mips/ath79/Kconfig -+++ b/arch/mips/ath79/Kconfig -@@ -30,9 +30,10 @@ config ATH79_MACH_AP136 - config ATH79_MACH_AP81 - bool "Atheros AP81 reference board" - select SOC_AR913X -+ select ATH79_DEV_ETH - select ATH79_DEV_GPIO_BUTTONS - select ATH79_DEV_LEDS_GPIO -- select ATH79_DEV_SPI -+ select ATH79_DEV_M25P80 - select ATH79_DEV_USB - select ATH79_DEV_WMAC - help diff --git a/target/linux/ar71xx/patches-3.3/605-MIPS-ath79-db120-fixes.patch b/target/linux/ar71xx/patches-3.3/605-MIPS-ath79-db120-fixes.patch deleted file mode 100644 index 97d8b539bb..0000000000 --- a/target/linux/ar71xx/patches-3.3/605-MIPS-ath79-db120-fixes.patch +++ /dev/null @@ -1,209 +0,0 @@ ---- a/arch/mips/ath79/mach-db120.c -+++ b/arch/mips/ath79/mach-db120.c -@@ -2,7 +2,7 @@ - * Atheros DB120 reference board support - * - * Copyright (c) 2011 Qualcomm Atheros -- * Copyright (c) 2011 Gabor Juhos <juhosg@openwrt.org> -+ * Copyright (c) 2011-2012 Gabor Juhos <juhosg@openwrt.org> - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above -@@ -19,16 +19,26 @@ - */ - - #include <linux/pci.h> -+#include <linux/phy.h> -+#include <linux/platform_device.h> - #include <linux/ath9k_platform.h> -+#include <linux/ar8216_platform.h> - --#include "machtypes.h" -+#include <asm/mach-ath79/ar71xx_regs.h> -+ -+#include "common.h" -+#include "dev-ap9x-pci.h" -+#include "dev-eth.h" - #include "dev-gpio-buttons.h" - #include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-nfc.h" - #include "dev-spi.h" - #include "dev-usb.h" - #include "dev-wmac.h" --#include "pci.h" -+#include "machtypes.h" - -+#define DB120_GPIO_LED_USB 11 - #define DB120_GPIO_LED_WLAN_5G 12 - #define DB120_GPIO_LED_WLAN_2G 13 - #define DB120_GPIO_LED_STATUS 14 -@@ -39,8 +49,10 @@ - #define DB120_KEYS_POLL_INTERVAL 20 /* msecs */ - #define DB120_KEYS_DEBOUNCE_INTERVAL (3 * DB120_KEYS_POLL_INTERVAL) - --#define DB120_WMAC_CALDATA_OFFSET 0x1000 --#define DB120_PCIE_CALDATA_OFFSET 0x5000 -+#define DB120_MAC0_OFFSET 0 -+#define DB120_MAC1_OFFSET 6 -+#define DB120_WMAC_CALDATA_OFFSET 0x1000 -+#define DB120_PCIE_CALDATA_OFFSET 0x5000 - - static struct gpio_led db120_leds_gpio[] __initdata = { - { -@@ -63,6 +75,11 @@ static struct gpio_led db120_leds_gpio[] - .gpio = DB120_GPIO_LED_WLAN_2G, - .active_low = 1, - }, -+ { -+ .name = "db120:green:usb", -+ .gpio = DB120_GPIO_LED_USB, -+ .active_low = 1, -+ } - }; - - static struct gpio_keys_button db120_gpio_keys[] __initdata = { -@@ -76,66 +93,85 @@ static struct gpio_keys_button db120_gpi - }, - }; - --static struct ath79_spi_controller_data db120_spi0_data = { -- .cs_type = ATH79_SPI_CS_TYPE_INTERNAL, -- .cs_line = 0, -+static struct ar8327_pad_cfg db120_ar8327_pad0_cfg = { -+ .mode = AR8327_PAD_MAC_RGMII, -+ .txclk_delay_en = true, -+ .rxclk_delay_en = true, -+ .txclk_delay_sel = AR8327_CLK_DELAY_SEL1, -+ .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2, - }; - --static struct spi_board_info db120_spi_info[] = { -- { -- .bus_num = 0, -- .chip_select = 0, -- .max_speed_hz = 25000000, -- .modalias = "s25sl064a", -- .controller_data = &db120_spi0_data, -- } -+static struct ar8327_led_cfg db120_ar8327_led_cfg = { -+ .led_ctrl0 = 0x00000000, -+ .led_ctrl1 = 0xc737c737, -+ .led_ctrl2 = 0x00000000, -+ .led_ctrl3 = 0x00c30c00, -+ .open_drain = true, - }; - --static struct ath79_spi_platform_data db120_spi_data = { -- .bus_num = 0, -- .num_chipselect = 1, -+static struct ar8327_platform_data db120_ar8327_data = { -+ .pad0_cfg = &db120_ar8327_pad0_cfg, -+ .cpuport_cfg = { -+ .force_link = 1, -+ .speed = AR8327_PORT_SPEED_1000, -+ .duplex = 1, -+ .txpause = 1, -+ .rxpause = 1, -+ }, -+ .led_cfg = &db120_ar8327_led_cfg, - }; - --#ifdef CONFIG_PCI --static struct ath9k_platform_data db120_ath9k_data; -- --static int db120_pci_plat_dev_init(struct pci_dev *dev) --{ -- switch (PCI_SLOT(dev->devfn)) { -- case 0: -- dev->dev.platform_data = &db120_ath9k_data; -- break; -- } -- -- return 0; --} -- --static void __init db120_pci_init(u8 *eeprom) --{ -- memcpy(db120_ath9k_data.eeprom_data, eeprom, -- sizeof(db120_ath9k_data.eeprom_data)); -- -- ath79_pci_set_plat_dev_init(db120_pci_plat_dev_init); -- ath79_register_pci(); --} --#else --static inline void db120_pci_init(void) {} --#endif /* CONFIG_PCI */ -+static struct mdio_board_info db120_mdio0_info[] = { -+ { -+ .bus_id = "ag71xx-mdio.0", -+ .phy_addr = 0, -+ .platform_data = &db120_ar8327_data, -+ }, -+}; - - static void __init db120_setup(void) - { - u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); - -+ ath79_gpio_output_select(DB120_GPIO_LED_USB, AR934X_GPIO_OUT_GPIO); -+ ath79_register_m25p80(NULL); -+ - ath79_register_leds_gpio(-1, ARRAY_SIZE(db120_leds_gpio), - db120_leds_gpio); - ath79_register_gpio_keys_polled(-1, DB120_KEYS_POLL_INTERVAL, - ARRAY_SIZE(db120_gpio_keys), - db120_gpio_keys); -- ath79_register_spi(&db120_spi_data, db120_spi_info, -- ARRAY_SIZE(db120_spi_info)); - ath79_register_usb(); - ath79_register_wmac(art + DB120_WMAC_CALDATA_OFFSET, NULL); -- db120_pci_init(art + DB120_PCIE_CALDATA_OFFSET); -+ ap91_pci_init(art + DB120_PCIE_CALDATA_OFFSET, NULL); -+ -+ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0 | -+ AR934X_ETH_CFG_SW_ONLY_MODE); -+ -+ ath79_register_mdio(1, 0x0); -+ ath79_register_mdio(0, 0x0); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, art + DB120_MAC0_OFFSET, 0); -+ -+ mdiobus_register_board_info(db120_mdio0_info, -+ ARRAY_SIZE(db120_mdio0_info)); -+ -+ /* GMAC0 is connected to an AR8327 switch */ -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; -+ ath79_eth0_data.phy_mask = BIT(0); -+ ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; -+ ath79_eth0_pll_data.pll_1000 = 0x06000000; -+ ath79_register_eth(0); -+ -+ /* GMAC1 is connected to the internal switch */ -+ ath79_init_mac(ath79_eth1_data.mac_addr, art + DB120_MAC1_OFFSET, 0); -+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; -+ ath79_eth1_data.speed = SPEED_1000; -+ ath79_eth1_data.duplex = DUPLEX_FULL; -+ -+ ath79_register_eth(1); -+ -+ ath79_register_nfc(); - } - - MIPS_MACHINE(ATH79_MACH_DB120, "DB120", "Atheros DB120 reference board", ---- a/arch/mips/ath79/Kconfig -+++ b/arch/mips/ath79/Kconfig -@@ -43,9 +43,12 @@ config ATH79_MACH_AP81 - config ATH79_MACH_DB120 - bool "Atheros DB120 reference board" - select SOC_AR934X -+ select ATH79_DEV_AP9X_PCI if PCI -+ select ATH79_DEV_ETH - select ATH79_DEV_GPIO_BUTTONS - select ATH79_DEV_LEDS_GPIO -- select ATH79_DEV_SPI -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_NFC - select ATH79_DEV_USB - select ATH79_DEV_WMAC - help diff --git a/target/linux/ar71xx/patches-3.3/606-MIPS-ath79-pb44-fixes.patch b/target/linux/ar71xx/patches-3.3/606-MIPS-ath79-pb44-fixes.patch deleted file mode 100644 index f9ec7753f1..0000000000 --- a/target/linux/ar71xx/patches-3.3/606-MIPS-ath79-pb44-fixes.patch +++ /dev/null @@ -1,153 +0,0 @@ ---- a/arch/mips/ath79/mach-pb44.c -+++ b/arch/mips/ath79/mach-pb44.c -@@ -8,23 +8,48 @@ - * by the Free Software Foundation. - */ - -+#include <linux/delay.h> - #include <linux/init.h> - #include <linux/platform_device.h> - #include <linux/i2c.h> - #include <linux/i2c-gpio.h> - #include <linux/i2c/pcf857x.h> -+#include <linux/i2c/pcf857x.h> -+#include <linux/spi/flash.h> -+#include <linux/spi/vsc7385.h> - --#include "machtypes.h" -+#include <asm/mach-ath79/ar71xx_regs.h> -+#include <asm/mach-ath79/ath79.h> -+ -+#include "dev-eth.h" - #include "dev-gpio-buttons.h" - #include "dev-leds-gpio.h" - #include "dev-spi.h" - #include "dev-usb.h" -+#include "machtypes.h" - #include "pci.h" - - #define PB44_GPIO_I2C_SCL 0 - #define PB44_GPIO_I2C_SDA 1 - -+#define PB44_PCF8757_VSC7395_CS 0 -+#define PB44_PCF8757_STEREO_CS 1 -+#define PB44_PCF8757_SLIC_CS0 2 -+#define PB44_PCF8757_SLIC_TEST 3 -+#define PB44_PCF8757_SLIC_INT0 4 -+#define PB44_PCF8757_SLIC_INT1 5 -+#define PB44_PCF8757_SW_RESET 6 -+#define PB44_PCF8757_SW_JUMP 8 -+#define PB44_PCF8757_LED_JUMP1 9 -+#define PB44_PCF8757_LED_JUMP2 10 -+#define PB44_PCF8757_TP24 11 -+#define PB44_PCF8757_TP25 12 -+#define PB44_PCF8757_TP26 13 -+#define PB44_PCF8757_TP27 14 -+#define PB44_PCF8757_TP28 15 -+ - #define PB44_GPIO_EXP_BASE 16 -+#define PB44_GPIO_VSC7395_CS (PB44_GPIO_EXP_BASE + PB44_PCF8757_VSC7395_CS) - #define PB44_GPIO_SW_RESET (PB44_GPIO_EXP_BASE + 6) - #define PB44_GPIO_SW_JUMP (PB44_GPIO_EXP_BASE + 8) - #define PB44_GPIO_LED_JUMP1 (PB44_GPIO_EXP_BASE + 9) -@@ -92,21 +117,66 @@ static struct ath79_spi_controller_data - .cs_line = 0, - }; - -+static struct ath79_spi_controller_data pb44_spi1_data = { -+ .cs_type = ATH79_SPI_CS_TYPE_GPIO, -+ .cs_line = PB44_GPIO_VSC7395_CS, -+}; -+ -+static void pb44_vsc7395_reset(void) -+{ -+ ath79_device_reset_set(AR71XX_RESET_GE1_PHY); -+ udelay(10); -+ ath79_device_reset_clear(AR71XX_RESET_GE1_PHY); -+ mdelay(50); -+} -+ -+static struct vsc7385_platform_data pb44_vsc7395_data = { -+ .reset = pb44_vsc7395_reset, -+ .ucode_name = "vsc7395_ucode_pb44.bin", -+ .mac_cfg = { -+ .tx_ipg = 6, -+ .bit2 = 1, -+ .clk_sel = 0, -+ }, -+}; -+ -+static const char *pb44_part_probes[] = { -+ "RedBoot", -+ NULL, -+}; -+ -+static struct flash_platform_data pb44_flash_data = { -+ .part_probes = pb44_part_probes, -+}; -+ - static struct spi_board_info pb44_spi_info[] = { - { - .bus_num = 0, - .chip_select = 0, - .max_speed_hz = 25000000, - .modalias = "m25p64", -+ .platform_data = &pb44_flash_data, - .controller_data = &pb44_spi0_data, - }, -+ { -+ .bus_num = 0, -+ .chip_select = 1, -+ .max_speed_hz = 25000000, -+ .modalias = "spi-vsc7385", -+ .platform_data = &pb44_vsc7395_data, -+ .controller_data = &pb44_spi1_data, -+ } - }; - - static struct ath79_spi_platform_data pb44_spi_data = { - .bus_num = 0, -- .num_chipselect = 1, -+ .num_chipselect = 2, - }; - -+#define PB44_WAN_PHYMASK BIT(0) -+#define PB44_LAN_PHYMASK 0 -+#define PB44_MDIO_PHYMASK (PB44_LAN_PHYMASK | PB44_WAN_PHYMASK) -+ - static void __init pb44_init(void) - { - i2c_register_board_info(0, pb44_i2c_board_info, -@@ -122,6 +192,22 @@ static void __init pb44_init(void) - ARRAY_SIZE(pb44_spi_info)); - ath79_register_usb(); - ath79_register_pci(); -+ -+ ath79_register_mdio(0, ~PB44_MDIO_PHYMASK); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; -+ ath79_eth0_data.phy_mask = PB44_WAN_PHYMASK; -+ -+ ath79_register_eth(0); -+ -+ ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 1); -+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; -+ ath79_eth1_data.speed = SPEED_1000; -+ ath79_eth1_data.duplex = DUPLEX_FULL; -+ ath79_eth1_pll_data.pll_1000 = 0x110000; -+ -+ ath79_register_eth(1); - } - - MIPS_MACHINE(ATH79_MACH_PB44, "PB44", "Atheros PB44 reference board", ---- a/arch/mips/ath79/Kconfig -+++ b/arch/mips/ath79/Kconfig -@@ -58,6 +58,7 @@ config ATH79_MACH_DB120 - config ATH79_MACH_PB44 - bool "Atheros PB44 reference board" - select SOC_AR71XX -+ select ATH79_DEV_ETH - select ATH79_DEV_GPIO_BUTTONS - select ATH79_DEV_LEDS_GPIO - select ATH79_DEV_SPI diff --git a/target/linux/ar71xx/patches-3.3/607-MIPS-ath79-ubnt-xm-fixes.patch b/target/linux/ar71xx/patches-3.3/607-MIPS-ath79-ubnt-xm-fixes.patch deleted file mode 100644 index cbbe20b49c..0000000000 --- a/target/linux/ar71xx/patches-3.3/607-MIPS-ath79-ubnt-xm-fixes.patch +++ /dev/null @@ -1,109 +0,0 @@ ---- a/arch/mips/ath79/Kconfig -+++ b/arch/mips/ath79/Kconfig -@@ -70,9 +70,10 @@ config ATH79_MACH_PB44 - config ATH79_MACH_UBNT_XM - bool "Ubiquiti Networks XM (rev 1.0) board" - select SOC_AR724X -+ select ATH79_DEV_AP9X_PCI if PCI - select ATH79_DEV_GPIO_BUTTONS - select ATH79_DEV_LEDS_GPIO -- select ATH79_DEV_SPI -+ select ATH79_DEV_M25P80 - help - Say 'Y' here if you want your kernel to support the - Ubiquiti Networks XM (rev 1.0) board. ---- a/arch/mips/ath79/mach-ubnt-xm.c -+++ b/arch/mips/ath79/mach-ubnt-xm.c -@@ -16,10 +16,11 @@ - - #include <asm/mach-ath79/irq.h> - --#include "machtypes.h" -+#include "dev-ap9x-pci.h" - #include "dev-gpio-buttons.h" - #include "dev-leds-gpio.h" --#include "dev-spi.h" -+#include "dev-m25p80.h" -+#include "machtypes.h" - #include "pci.h" - - #define UBNT_XM_GPIO_LED_L1 0 -@@ -32,7 +33,7 @@ - #define UBNT_XM_KEYS_POLL_INTERVAL 20 - #define UBNT_XM_KEYS_DEBOUNCE_INTERVAL (3 * UBNT_XM_KEYS_POLL_INTERVAL) - --#define UBNT_XM_EEPROM_ADDR (u8 *) KSEG1ADDR(0x1fff1000) -+#define UBNT_XM_EEPROM_ADDR 0x1fff1000 - - static struct gpio_led ubnt_xm_leds_gpio[] __initdata = { - { -@@ -65,54 +66,10 @@ static struct gpio_keys_button ubnt_xm_g - } - }; - --static struct ath79_spi_controller_data ubnt_xm_spi0_data = { -- .cs_type = ATH79_SPI_CS_TYPE_INTERNAL, -- .cs_line = 0, --}; -- --static struct spi_board_info ubnt_xm_spi_info[] = { -- { -- .bus_num = 0, -- .chip_select = 0, -- .max_speed_hz = 25000000, -- .modalias = "mx25l6405d", -- .controller_data = &ubnt_xm_spi0_data, -- } --}; -- --static struct ath79_spi_platform_data ubnt_xm_spi_data = { -- .bus_num = 0, -- .num_chipselect = 1, --}; -- --#ifdef CONFIG_PCI --static struct ath9k_platform_data ubnt_xm_eeprom_data; -- --static int ubnt_xm_pci_plat_dev_init(struct pci_dev *dev) --{ -- switch (PCI_SLOT(dev->devfn)) { -- case 0: -- dev->dev.platform_data = &ubnt_xm_eeprom_data; -- break; -- } -- -- return 0; --} -- --static void __init ubnt_xm_pci_init(void) --{ -- memcpy(ubnt_xm_eeprom_data.eeprom_data, UBNT_XM_EEPROM_ADDR, -- sizeof(ubnt_xm_eeprom_data.eeprom_data)); -- -- ath79_pci_set_plat_dev_init(ubnt_xm_pci_plat_dev_init); -- ath79_register_pci(); --} --#else --static inline void ubnt_xm_pci_init(void) {} --#endif /* CONFIG_PCI */ -- - static void __init ubnt_xm_init(void) - { -+ u8 *eeprom = (u8 *) KSEG1ADDR(UBNT_XM_EEPROM_ADDR); -+ - ath79_register_leds_gpio(-1, ARRAY_SIZE(ubnt_xm_leds_gpio), - ubnt_xm_leds_gpio); - -@@ -120,10 +77,8 @@ static void __init ubnt_xm_init(void) - ARRAY_SIZE(ubnt_xm_gpio_keys), - ubnt_xm_gpio_keys); - -- ath79_register_spi(&ubnt_xm_spi_data, ubnt_xm_spi_info, -- ARRAY_SIZE(ubnt_xm_spi_info)); -- -- ubnt_xm_pci_init(); -+ ath79_register_m25p80(NULL); -+ ap91_pci_init(eeprom, NULL); - } - - MIPS_MACHINE(ATH79_MACH_UBNT_XM, diff --git a/target/linux/ar71xx/patches-3.3/608-MIPS-ath79-ubnt-xm-add-more-boards.patch b/target/linux/ar71xx/patches-3.3/608-MIPS-ath79-ubnt-xm-add-more-boards.patch deleted file mode 100644 index 65576b652a..0000000000 --- a/target/linux/ar71xx/patches-3.3/608-MIPS-ath79-ubnt-xm-add-more-boards.patch +++ /dev/null @@ -1,343 +0,0 @@ ---- a/arch/mips/ath79/mach-ubnt-xm.c -+++ b/arch/mips/ath79/mach-ubnt-xm.c -@@ -12,16 +12,22 @@ - - #include <linux/init.h> - #include <linux/pci.h> -+#include <linux/platform_device.h> - #include <linux/ath9k_platform.h> -+#include <linux/etherdevice.h> -+#include <linux/ar8216_platform.h> - - #include <asm/mach-ath79/irq.h> -+#include <asm/mach-ath79/ar71xx_regs.h> - - #include "dev-ap9x-pci.h" -+#include "dev-eth.h" - #include "dev-gpio-buttons.h" - #include "dev-leds-gpio.h" - #include "dev-m25p80.h" -+#include "dev-usb.h" -+#include "dev-wmac.h" - #include "machtypes.h" --#include "pci.h" - - #define UBNT_XM_GPIO_LED_L1 0 - #define UBNT_XM_GPIO_LED_L2 1 -@@ -37,19 +43,19 @@ - - static struct gpio_led ubnt_xm_leds_gpio[] __initdata = { - { -- .name = "ubnt-xm:red:link1", -+ .name = "ubnt:red:link1", - .gpio = UBNT_XM_GPIO_LED_L1, - .active_low = 0, - }, { -- .name = "ubnt-xm:orange:link2", -+ .name = "ubnt:orange:link2", - .gpio = UBNT_XM_GPIO_LED_L2, - .active_low = 0, - }, { -- .name = "ubnt-xm:green:link3", -+ .name = "ubnt:green:link3", - .gpio = UBNT_XM_GPIO_LED_L3, - .active_low = 0, - }, { -- .name = "ubnt-xm:green:link4", -+ .name = "ubnt:green:link4", - .gpio = UBNT_XM_GPIO_LED_L4, - .active_low = 0, - }, -@@ -66,9 +72,13 @@ static struct gpio_keys_button ubnt_xm_g - } - }; - -+#define UBNT_M_WAN_PHYMASK BIT(4) -+ - static void __init ubnt_xm_init(void) - { - u8 *eeprom = (u8 *) KSEG1ADDR(UBNT_XM_EEPROM_ADDR); -+ u8 *mac1 = (u8 *) KSEG1ADDR(0x1fff0000); -+ u8 *mac2 = (u8 *) KSEG1ADDR(0x1fff0000 + ETH_ALEN); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(ubnt_xm_leds_gpio), - ubnt_xm_leds_gpio); -@@ -79,9 +89,242 @@ static void __init ubnt_xm_init(void) - - ath79_register_m25p80(NULL); - ap91_pci_init(eeprom, NULL); -+ -+ ath79_register_mdio(0, ~UBNT_M_WAN_PHYMASK); -+ ath79_init_mac(ath79_eth0_data.mac_addr, mac1, 0); -+ ath79_init_mac(ath79_eth1_data.mac_addr, mac2, 0); -+ ath79_register_eth(0); - } - - MIPS_MACHINE(ATH79_MACH_UBNT_XM, - "UBNT-XM", - "Ubiquiti Networks XM (rev 1.0) board", - ubnt_xm_init); -+ -+MIPS_MACHINE(ATH79_MACH_UBNT_BULLET_M, "UBNT-BM", "Ubiquiti Bullet M", -+ ubnt_xm_init); -+ -+static void __init ubnt_rocket_m_setup(void) -+{ -+ ubnt_xm_init(); -+ ath79_register_usb(); -+} -+ -+MIPS_MACHINE(ATH79_MACH_UBNT_ROCKET_M, "UBNT-RM", "Ubiquiti Rocket M", -+ ubnt_rocket_m_setup); -+ -+static void __init ubnt_nano_m_setup(void) -+{ -+ ubnt_xm_init(); -+ ath79_register_eth(1); -+} -+ -+MIPS_MACHINE(ATH79_MACH_UBNT_NANO_M, "UBNT-NM", "Ubiquiti Nanostation M", -+ ubnt_nano_m_setup); -+ -+static struct gpio_led ubnt_airrouter_leds_gpio[] __initdata = { -+ { -+ .name = "ubnt:green:globe", -+ .gpio = 0, -+ .active_low = 1, -+ }, { -+ .name = "ubnt:green:power", -+ .gpio = 11, -+ .active_low = 1, -+ .default_state = LEDS_GPIO_DEFSTATE_ON, -+ } -+}; -+ -+static void __init ubnt_airrouter_setup(void) -+{ -+ u8 *mac1 = (u8 *) KSEG1ADDR(0x1fff0000); -+ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); -+ -+ ath79_register_m25p80(NULL); -+ ath79_register_mdio(0, ~UBNT_M_WAN_PHYMASK); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, mac1, 0); -+ ath79_init_local_mac(ath79_eth1_data.mac_addr, mac1); -+ -+ ath79_register_eth(1); -+ ath79_register_eth(0); -+ ath79_register_usb(); -+ -+ ap91_pci_init(ee, NULL); -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(ubnt_airrouter_leds_gpio), -+ ubnt_airrouter_leds_gpio); -+ -+ ath79_register_gpio_keys_polled(-1, UBNT_XM_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(ubnt_xm_gpio_keys), -+ ubnt_xm_gpio_keys); -+} -+ -+MIPS_MACHINE(ATH79_MACH_UBNT_AIRROUTER, "UBNT-AR", "Ubiquiti AirRouter", -+ ubnt_airrouter_setup); -+ -+static struct gpio_led ubnt_unifi_leds_gpio[] __initdata = { -+ { -+ .name = "ubnt:orange:dome", -+ .gpio = 1, -+ .active_low = 0, -+ }, { -+ .name = "ubnt:green:dome", -+ .gpio = 0, -+ .active_low = 0, -+ } -+}; -+ -+static struct gpio_led ubnt_unifi_outdoor_leds_gpio[] __initdata = { -+ { -+ .name = "ubnt:orange:front", -+ .gpio = 1, -+ .active_low = 0, -+ }, { -+ .name = "ubnt:green:front", -+ .gpio = 0, -+ .active_low = 0, -+ } -+}; -+ -+static void __init ubnt_unifi_setup(void) -+{ -+ u8 *mac = (u8 *) KSEG1ADDR(0x1fff0000); -+ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); -+ -+ ath79_register_m25p80(NULL); -+ -+ ath79_register_mdio(0, ~UBNT_M_WAN_PHYMASK); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); -+ ath79_register_eth(0); -+ -+ ap91_pci_init(ee, NULL); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(ubnt_unifi_leds_gpio), -+ ubnt_unifi_leds_gpio); -+ -+ ath79_register_gpio_keys_polled(-1, UBNT_XM_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(ubnt_xm_gpio_keys), -+ ubnt_xm_gpio_keys); -+} -+ -+MIPS_MACHINE(ATH79_MACH_UBNT_UNIFI, "UBNT-UF", "Ubiquiti UniFi", -+ ubnt_unifi_setup); -+ -+ -+#define UBNT_UNIFIOD_PRI_PHYMASK BIT(4) -+#define UBNT_UNIFIOD_2ND_PHYMASK (BIT(0) | BIT(1) | BIT(2) | BIT(3)) -+ -+static void __init ubnt_unifi_outdoor_setup(void) -+{ -+ u8 *mac1 = (u8 *) KSEG1ADDR(0x1fff0000); -+ u8 *mac2 = (u8 *) KSEG1ADDR(0x1fff0000 + ETH_ALEN); -+ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); -+ -+ ath79_register_m25p80(NULL); -+ -+ ath79_register_mdio(0, ~(UBNT_UNIFIOD_PRI_PHYMASK | -+ UBNT_UNIFIOD_2ND_PHYMASK)); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, mac1, 0); -+ ath79_init_mac(ath79_eth1_data.mac_addr, mac2, 0); -+ ath79_register_eth(0); -+ ath79_register_eth(1); -+ -+ ap91_pci_init(ee, NULL); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(ubnt_unifi_outdoor_leds_gpio), -+ ubnt_unifi_outdoor_leds_gpio); -+} -+ -+MIPS_MACHINE(ATH79_MACH_UBNT_UNIFI_OUTDOOR, "UBNT-U20", -+ "Ubiquiti UniFiAP Outdoor", -+ ubnt_unifi_outdoor_setup); -+ -+static struct gpio_led ubnt_uap_pro_gpio_leds[] __initdata = { -+ { -+ .name = "ubnt:white:dome", -+ .gpio = 12, -+ }, { -+ .name = "ubnt:blue:dome", -+ .gpio = 13, -+ } -+}; -+ -+static struct gpio_keys_button uap_pro_gpio_keys[] __initdata = { -+ { -+ .desc = "reset", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = UBNT_XM_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = 17, -+ .active_low = 1, -+ } -+}; -+ -+static struct ar8327_pad_cfg uap_pro_ar8327_pad0_cfg = { -+ .mode = AR8327_PAD_MAC_RGMII, -+ .txclk_delay_en = true, -+ .rxclk_delay_en = true, -+ .txclk_delay_sel = AR8327_CLK_DELAY_SEL1, -+ .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2, -+}; -+ -+static struct ar8327_platform_data uap_pro_ar8327_data = { -+ .pad0_cfg = &uap_pro_ar8327_pad0_cfg, -+ .cpuport_cfg = { -+ .force_link = 1, -+ .speed = AR8327_PORT_SPEED_1000, -+ .duplex = 1, -+ .txpause = 1, -+ .rxpause = 1, -+ }, -+}; -+ -+static struct mdio_board_info uap_pro_mdio0_info[] = { -+ { -+ .bus_id = "ag71xx-mdio.0", -+ .phy_addr = 0, -+ .platform_data = &uap_pro_ar8327_data, -+ }, -+}; -+ -+#define UAP_PRO_MAC0_OFFSET 0x0000 -+#define UAP_PRO_MAC1_OFFSET 0x0006 -+#define UAP_PRO_WMAC_CALDATA_OFFSET 0x1000 -+#define UAP_PRO_PCI_CALDATA_OFFSET 0x5000 -+ -+static void __init ubnt_uap_pro_setup(void) -+{ -+ u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff0000); -+ -+ ath79_register_m25p80(NULL); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(ubnt_uap_pro_gpio_leds), -+ ubnt_uap_pro_gpio_leds); -+ ath79_register_gpio_keys_polled(-1, UBNT_XM_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(uap_pro_gpio_keys), -+ uap_pro_gpio_keys); -+ -+ ath79_register_wmac(eeprom + UAP_PRO_WMAC_CALDATA_OFFSET, NULL); -+ ap91_pci_init(eeprom + UAP_PRO_PCI_CALDATA_OFFSET, NULL); -+ -+ ath79_register_mdio(0, 0x0); -+ mdiobus_register_board_info(uap_pro_mdio0_info, -+ ARRAY_SIZE(uap_pro_mdio0_info)); -+ -+ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0); -+ ath79_init_mac(ath79_eth0_data.mac_addr, -+ eeprom + UAP_PRO_MAC0_OFFSET, 0); -+ -+ /* GMAC0 is connected to an AR8327 switch */ -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; -+ ath79_eth0_data.phy_mask = BIT(0); -+ ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; -+ ath79_eth0_pll_data.pll_1000 = 0x06000000; -+ ath79_register_eth(0); -+} -+ -+MIPS_MACHINE(ATH79_MACH_UBNT_UAP_PRO, "UAP-PRO", "Ubiquiti UniFi AP Pro", -+ ubnt_uap_pro_setup); -+ ---- a/arch/mips/ath79/Kconfig -+++ b/arch/mips/ath79/Kconfig -@@ -68,12 +68,16 @@ config ATH79_MACH_PB44 - Atheros PB44 reference board. - - config ATH79_MACH_UBNT_XM -- bool "Ubiquiti Networks XM (rev 1.0) board" -+ bool "Ubiquiti Networks XM/UniFi boards" - select SOC_AR724X -+ select SOC_AR934X - select ATH79_DEV_AP9X_PCI if PCI -+ select ATH79_DEV_ETH - select ATH79_DEV_GPIO_BUTTONS - select ATH79_DEV_LEDS_GPIO - select ATH79_DEV_M25P80 -+ select ATH79_DEV_USB -+ select ATH79_DEV_WMAC - help - Say 'Y' here if you want your kernel to support the - Ubiquiti Networks XM (rev 1.0) board. ---- a/arch/mips/ath79/machtypes.h -+++ b/arch/mips/ath79/machtypes.h -@@ -22,6 +22,13 @@ enum ath79_mach_type { - ATH79_MACH_AP81, /* Atheros AP81 reference board */ - ATH79_MACH_DB120, /* Atheros DB120 reference board */ - ATH79_MACH_PB44, /* Atheros PB44 reference board */ -+ ATH79_MACH_UBNT_AIRROUTER, /* Ubiquiti AirRouter */ -+ ATH79_MACH_UBNT_BULLET_M, /* Ubiquiti Bullet M */ -+ ATH79_MACH_UBNT_NANO_M, /* Ubiquiti NanoStation M */ -+ ATH79_MACH_UBNT_ROCKET_M, /* Ubiquiti Rocket M */ -+ ATH79_MACH_UBNT_UAP_PRO, /* Ubiquiti UniFi AP Pro */ -+ ATH79_MACH_UBNT_UNIFI, /* Ubiquiti Unifi */ -+ ATH79_MACH_UBNT_UNIFI_OUTDOOR, /* Ubiquiti UnifiAP Outdoor */ - ATH79_MACH_UBNT_XM, /* Ubiquiti Networks XM board rev 1.0 */ - }; - diff --git a/target/linux/ar71xx/patches-3.3/609-MIPS-ath79-ap136-fixes.patch b/target/linux/ar71xx/patches-3.3/609-MIPS-ath79-ap136-fixes.patch deleted file mode 100644 index b378888bfd..0000000000 --- a/target/linux/ar71xx/patches-3.3/609-MIPS-ath79-ap136-fixes.patch +++ /dev/null @@ -1,184 +0,0 @@ ---- a/arch/mips/ath79/mach-ap136.c -+++ b/arch/mips/ath79/mach-ap136.c -@@ -1,5 +1,5 @@ - /* -- * Qualcomm Atheros AP136 reference board support -+ * Atheros AP136 reference board support - * - * Copyright (c) 2012 Qualcomm Atheros - * Copyright (c) 2012 Gabor Juhos <juhosg@openwrt.org> -@@ -18,23 +18,27 @@ - * - */ - --#include <linux/pci.h> --#include <linux/ath9k_platform.h> -+#include <linux/platform_device.h> -+#include <linux/ar8216_platform.h> - --#include "machtypes.h" -+#include <asm/mach-ath79/ar71xx_regs.h> -+ -+#include "common.h" -+#include "dev-ap9x-pci.h" - #include "dev-gpio-buttons.h" -+#include "dev-eth.h" - #include "dev-leds-gpio.h" --#include "dev-spi.h" -+#include "dev-m25p80.h" - #include "dev-usb.h" - #include "dev-wmac.h" --#include "pci.h" -+#include "machtypes.h" - --#define AP136_GPIO_LED_STATUS_RED 14 --#define AP136_GPIO_LED_STATUS_GREEN 19 - #define AP136_GPIO_LED_USB 4 --#define AP136_GPIO_LED_WLAN_2G 13 - #define AP136_GPIO_LED_WLAN_5G 12 -+#define AP136_GPIO_LED_WLAN_2G 13 -+#define AP136_GPIO_LED_STATUS_RED 14 - #define AP136_GPIO_LED_WPS_RED 15 -+#define AP136_GPIO_LED_STATUS_GREEN 19 - #define AP136_GPIO_LED_WPS_GREEN 20 - - #define AP136_GPIO_BTN_WPS 16 -@@ -43,8 +47,10 @@ - #define AP136_KEYS_POLL_INTERVAL 20 /* msecs */ - #define AP136_KEYS_DEBOUNCE_INTERVAL (3 * AP136_KEYS_POLL_INTERVAL) - --#define AP136_WMAC_CALDATA_OFFSET 0x1000 --#define AP136_PCIE_CALDATA_OFFSET 0x5000 -+#define AP136_MAC0_OFFSET 0 -+#define AP136_MAC1_OFFSET 6 -+#define AP136_WMAC_CALDATA_OFFSET 0x1000 -+#define AP136_PCIE_CALDATA_OFFSET 0x5000 - - static struct gpio_led ap136_leds_gpio[] __initdata = { - { -@@ -98,63 +104,91 @@ static struct gpio_keys_button ap136_gpi - }, - }; - --static struct ath79_spi_controller_data ap136_spi0_data = { -- .cs_type = ATH79_SPI_CS_TYPE_INTERNAL, -- .cs_line = 0, -+static struct ar8327_pad_cfg ap136_ar8327_pad0_cfg = { -+ .mode = AR8327_PAD_MAC_RGMII, -+ .txclk_delay_en = true, -+ .rxclk_delay_en = true, -+ .txclk_delay_sel = AR8327_CLK_DELAY_SEL1, -+ .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2, - }; - --static struct spi_board_info ap136_spi_info[] = { -- { -- .bus_num = 0, -- .chip_select = 0, -- .max_speed_hz = 25000000, -- .modalias = "mx25l6405d", -- .controller_data = &ap136_spi0_data, -- } -+static struct ar8327_pad_cfg ap136_ar8327_pad6_cfg = { -+ .mode = AR8327_PAD_MAC_SGMII, -+ .txclk_delay_en = false, -+ .rxclk_delay_en = true, -+ .txclk_delay_sel = AR8327_CLK_DELAY_SEL0, -+ .rxclk_delay_sel = AR8327_CLK_DELAY_SEL0, - }; - --static struct ath79_spi_platform_data ap136_spi_data = { -- .bus_num = 0, -- .num_chipselect = 1, -+static struct ar8327_platform_data ap136_ar8327_data = { -+ .pad0_cfg = &ap136_ar8327_pad0_cfg, -+ .pad6_cfg = &ap136_ar8327_pad6_cfg, -+ .cpuport_cfg = { -+ .force_link = 1, -+ .speed = AR8327_PORT_SPEED_1000, -+ .duplex = 1, -+ .txpause = 1, -+ .rxpause = 1, -+ } - }; - --#ifdef CONFIG_PCI --static struct ath9k_platform_data ap136_ath9k_data; -+static struct mdio_board_info ap136_mdio0_info[] = { -+ { -+ .bus_id = "ag71xx-mdio.0", -+ .phy_addr = 0, -+ .platform_data = &ap136_ar8327_data, -+ }, -+}; - --static int ap136_pci_plat_dev_init(struct pci_dev *dev) -+static void __init ap136_gmac_setup(void) - { -- if (dev->bus->number == 1 && (PCI_SLOT(dev->devfn)) == 0) -- dev->dev.platform_data = &ap136_ath9k_data; -+ void __iomem *base; -+ u32 t; - -- return 0; --} -+ base = ioremap(QCA955X_GMAC_BASE, QCA955X_GMAC_SIZE); - --static void __init ap136_pci_init(u8 *eeprom) --{ -- memcpy(ap136_ath9k_data.eeprom_data, eeprom, -- sizeof(ap136_ath9k_data.eeprom_data)); -+ t = __raw_readl(base + QCA955X_GMAC_REG_ETH_CFG); -+ -+ t &= ~(QCA955X_ETH_CFG_RGMII_GMAC0 | QCA955X_ETH_CFG_SGMII_GMAC0); -+ t |= QCA955X_ETH_CFG_RGMII_GMAC0; - -- ath79_pci_set_plat_dev_init(ap136_pci_plat_dev_init); -- ath79_register_pci(); -+ __raw_writel(t, base + QCA955X_GMAC_REG_ETH_CFG); -+ -+ iounmap(base); - } --#else --static inline void ap136_pci_init(void) {} --#endif /* CONFIG_PCI */ - - static void __init ap136_setup(void) - { - u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); - -+ ath79_register_m25p80(NULL); -+ - ath79_register_leds_gpio(-1, ARRAY_SIZE(ap136_leds_gpio), - ap136_leds_gpio); - ath79_register_gpio_keys_polled(-1, AP136_KEYS_POLL_INTERVAL, - ARRAY_SIZE(ap136_gpio_keys), - ap136_gpio_keys); -- ath79_register_spi(&ap136_spi_data, ap136_spi_info, -- ARRAY_SIZE(ap136_spi_info)); -+ - ath79_register_usb(); -- ath79_register_wmac(art + AP136_WMAC_CALDATA_OFFSET); -- ap136_pci_init(art + AP136_PCIE_CALDATA_OFFSET); -+ ath79_register_wmac(art + AP136_WMAC_CALDATA_OFFSET, NULL); -+ ap91_pci_init(art + AP136_PCIE_CALDATA_OFFSET, NULL); -+ -+ ap136_gmac_setup(); -+ -+ ath79_register_mdio(0, 0x0); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, art + AP136_MAC0_OFFSET, 0); -+ -+ mdiobus_register_board_info(ap136_mdio0_info, -+ ARRAY_SIZE(ap136_mdio0_info)); -+ -+ /* GMAC0 is connected to an AR8327 switch */ -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; -+ ath79_eth0_data.phy_mask = BIT(0); -+ ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; -+ ath79_eth0_pll_data.pll_1000 = 0xa6000000; -+ -+ ath79_register_eth(0); - } - - MIPS_MACHINE(ATH79_MACH_AP136, "AP136", "Atheros AP136 reference board", diff --git a/target/linux/ar71xx/patches-3.3/610-MIPS-ath79-openwrt-machines.patch b/target/linux/ar71xx/patches-3.3/610-MIPS-ath79-openwrt-machines.patch deleted file mode 100644 index eba0cbd4fe..0000000000 --- a/target/linux/ar71xx/patches-3.3/610-MIPS-ath79-openwrt-machines.patch +++ /dev/null @@ -1,811 +0,0 @@ ---- a/arch/mips/ath79/machtypes.h -+++ b/arch/mips/ath79/machtypes.h -@@ -16,20 +16,104 @@ - - enum ath79_mach_type { - ATH79_MACH_GENERIC = 0, -+ ATH79_MACH_ALFA_AP96, /* ALFA Network AP96 board */ -+ ATH79_MACH_ALFA_NX, /* ALFA Network N2/N5 board */ -+ ATH79_MACH_ALL0258N, /* Allnet ALL0258N */ -+ ATH79_MACH_ALL0305, /* Allnet ALL0305 */ -+ ATH79_MACH_ALL0315N, /* Allnet ALL0315N */ -+ ATH79_MACH_AP113, /* Atheros AP113 reference board */ - ATH79_MACH_AP121, /* Atheros AP121 reference board */ - ATH79_MACH_AP121_MINI, /* Atheros AP121-MINI reference board */ - ATH79_MACH_AP136, /* Atheros AP136 reference board */ - ATH79_MACH_AP81, /* Atheros AP81 reference board */ -+ ATH79_MACH_AP83, /* Atheros AP83 */ -+ ATH79_MACH_AP96, /* Atheros AP96 */ -+ ATH79_MACH_AW_NR580, /* AzureWave AW-NR580 */ - ATH79_MACH_DB120, /* Atheros DB120 reference board */ - ATH79_MACH_PB44, /* Atheros PB44 reference board */ -+ ATH79_MACH_DIR_600_A1, /* D-Link DIR-600 rev. A1 */ -+ ATH79_MACH_DIR_615_C1, /* D-Link DIR-615 rev. C1 */ -+ ATH79_MACH_DIR_615_E4, /* D-Link DIR-615 rev. E4 */ -+ ATH79_MACH_DIR_825_B1, /* D-Link DIR-825 rev. B1 */ -+ ATH79_MACH_EW_DORIN, /* embedded wireless Dorin Platform */ -+ ATH79_MACH_EW_DORIN_ROUTER, /* embedded wireless Dorin Router Platform */ -+ ATH79_MACH_EAP7660D, /* Senao EAP7660D */ -+ ATH79_MACH_JA76PF, /* jjPlus JA76PF */ -+ ATH79_MACH_JA76PF2, /* jjPlus JA76PF2 */ -+ ATH79_MACH_JWAP003, /* jjPlus JWAP003 */ -+ ATH79_MACH_HORNET_UB, /* ALFA Networks Hornet-UB */ -+ ATH79_MACH_MZK_W04NU, /* Planex MZK-W04NU */ -+ ATH79_MACH_MZK_W300NH, /* Planex MZK-W300NH */ -+ ATH79_MACH_NBG460N, /* Zyxel NBG460N/550N/550NH */ -+ ATH79_MACH_OM2P_HS, /* OpenMesh OM2P-HS */ -+ ATH79_MACH_OM2P_LC, /* OpenMesh OM2P-LC */ -+ ATH79_MACH_OM2P, /* OpenMesh OM2P */ -+ ATH79_MACH_PB42, /* Atheros PB42 */ -+ ATH79_MACH_PB92, /* Atheros PB92 */ -+ ATH79_MACH_RB_411, /* MikroTik RouterBOARD 411/411A/411AH */ -+ ATH79_MACH_RB_411U, /* MikroTik RouterBOARD 411U */ -+ ATH79_MACH_RB_433, /* MikroTik RouterBOARD 433/433AH */ -+ ATH79_MACH_RB_433U, /* MikroTik RouterBOARD 433UAH */ -+ ATH79_MACH_RB_450G, /* MikroTik RouterBOARD 450G */ -+ ATH79_MACH_RB_450, /* MikroTik RouterBOARD 450 */ -+ ATH79_MACH_RB_493, /* Mikrotik RouterBOARD 493/493AH */ -+ ATH79_MACH_RB_493G, /* Mikrotik RouterBOARD 493G */ -+ ATH79_MACH_RB_750, /* MikroTik RouterBOARD 750 */ -+ ATH79_MACH_RB_750G_R3, /* MikroTik RouterBOARD 750GL */ -+ ATH79_MACH_RB_751, /* MikroTik RouterBOARD 751 */ -+ ATH79_MACH_RB_751G, /* Mikrotik RouterBOARD 751G */ -+ ATH79_MACH_RB_2011G, /* Mikrotik RouterBOARD 2011UAS-2HnD */ -+ ATH79_MACH_RB_2011L, /* Mikrotik RouterBOARD 2011L */ -+ ATH79_MACH_RW2458N, /* Redwave RW2458N */ -+ ATH79_MACH_TEW_632BRP, /* TRENDnet TEW-632BRP */ -+ ATH79_MACH_TEW_673GRU, /* TRENDnet TEW-673GRU */ -+ ATH79_MACH_TEW_712BR, /* TRENDnet TEW-712BR */ -+ ATH79_MACH_TL_MR11U, /* TP-LINK TL-MR11U */ -+ ATH79_MACH_TL_MR3020, /* TP-LINK TL-MR3020 */ -+ ATH79_MACH_TL_MR3040, /* TP-LINK TL-MR3040 */ -+ ATH79_MACH_TL_MR3220, /* TP-LINK TL-MR3220 */ -+ ATH79_MACH_TL_MR3420, /* TP-LINK TL-MR3420 */ -+ ATH79_MACH_TL_WA901ND, /* TP-LINK TL-WA901ND */ -+ ATH79_MACH_TL_WA901ND_V2, /* TP-LINK TL-WA901ND v2 */ -+ ATH79_MACH_TL_WDR4300, /* TP-LINK TL-WDR4300 */ -+ ATH79_MACH_TL_WR1041N_V2, /* TP-LINK TL-WR1041N v2 */ -+ ATH79_MACH_TL_WR1043ND, /* TP-LINK TL-WR1043ND */ -+ ATH79_MACH_TL_WR2543N, /* TP-LINK TL-WR2543N/ND */ -+ ATH79_MACH_TL_WR703N, /* TP-LINK TL-WR703N */ -+ ATH79_MACH_TL_WR741ND, /* TP-LINK TL-WR741ND */ -+ ATH79_MACH_TL_WR741ND_V4, /* TP-LINK TL-WR741ND v4*/ -+ ATH79_MACH_TL_WR841N_V1, /* TP-LINK TL-WR841N v1 */ -+ ATH79_MACH_TL_WR841N_V7, /* TP-LINK TL-WR841N/ND v7 */ -+ ATH79_MACH_TL_WR841N_V8, /* TP-LINK TL-WR841N/ND v8 */ -+ ATH79_MACH_TL_WR941ND, /* TP-LINK TL-WR941ND */ - ATH79_MACH_UBNT_AIRROUTER, /* Ubiquiti AirRouter */ - ATH79_MACH_UBNT_BULLET_M, /* Ubiquiti Bullet M */ -+ ATH79_MACH_UBNT_LSSR71, /* Ubiquiti LS-SR71 */ -+ ATH79_MACH_UBNT_LSX, /* Ubiquiti LSX */ - ATH79_MACH_UBNT_NANO_M, /* Ubiquiti NanoStation M */ - ATH79_MACH_UBNT_ROCKET_M, /* Ubiquiti Rocket M */ -+ ATH79_MACH_UBNT_RSPRO, /* Ubiquiti RouterStation Pro */ -+ ATH79_MACH_UBNT_RS, /* Ubiquiti RouterStation */ - ATH79_MACH_UBNT_UAP_PRO, /* Ubiquiti UniFi AP Pro */ - ATH79_MACH_UBNT_UNIFI, /* Ubiquiti Unifi */ - ATH79_MACH_UBNT_UNIFI_OUTDOOR, /* Ubiquiti UnifiAP Outdoor */ - ATH79_MACH_UBNT_XM, /* Ubiquiti Networks XM board rev 1.0 */ -+ ATH79_MACH_WHR_G301N, /* Buffalo WHR-G301N */ -+ ATH79_MACH_WHR_HP_G300N, /* Buffalo WHR-HP-G300N */ -+ ATH79_MACH_WHR_HP_GN, /* Buffalo WHR-HP-GN */ -+ ATH79_MACH_WLAE_AG300N, /* Buffalo WLAE-AG300N */ -+ ATH79_MACH_WNDR3700, /* NETGEAR WNDR3700/WNDR3800/WNDRMAC */ -+ ATH79_MACH_WNR2000, /* NETGEAR WNR2000 */ -+ ATH79_MACH_WP543, /* Compex WP543 */ -+ ATH79_MACH_WPE72, /* Compex WPE72 */ -+ ATH79_MACH_WRT160NL, /* Linksys WRT160NL */ -+ ATH79_MACH_WRT400N, /* Linksys WRT400N */ -+ ATH79_MACH_WZR_HP_AG300H, /* Buffalo WZR-HP-AG300H */ -+ ATH79_MACH_WZR_HP_G300NH, /* Buffalo WZR-HP-G300NH */ -+ ATH79_MACH_WZR_HP_G300NH2, /* Buffalo WZR-HP-G300NH2 */ -+ ATH79_MACH_WZR_HP_G450H, /* Buffalo WZR-HP-G450H */ -+ ATH79_MACH_ZCN_1523H_2, /* Zcomax ZCN-1523H-2-xx */ -+ ATH79_MACH_ZCN_1523H_5, /* Zcomax ZCN-1523H-5-xx */ - }; - - #endif /* _ATH79_MACHTYPE_H */ ---- a/arch/mips/ath79/Kconfig -+++ b/arch/mips/ath79/Kconfig -@@ -2,6 +2,61 @@ if ATH79 - - menu "Atheros AR71XX/AR724X/AR913X machine selection" - -+config ATH79_MACH_ALFA_AP96 -+ bool "ALFA Network AP96 board support" -+ select SOC_AR71XX -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_SPI -+ select ATH79_DEV_USB -+ -+config ATH79_MACH_HORNET_UB -+ bool "ALFA Network Hornet-UB board support" -+ select SOC_AR933X -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_USB -+ select ATH79_DEV_WMAC -+ -+config ATH79_MACH_ALFA_NX -+ bool "ALFA Network N2/N5 board support" -+ select SOC_AR724X -+ select ATH79_DEV_AP9X_PCI if PCI -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ -+config ATH79_MACH_ALL0258N -+ bool "Allnet ALL0258N support" -+ select SOC_AR724X -+ select ATH79_DEV_AP9X_PCI if PCI -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ -+config ATH79_MACH_ALL0315N -+ bool "Allnet ALL0315N support" -+ select SOC_AR724X -+ select ATH79_DEV_AP9X_PCI if PCI -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ -+config ATH79_MACH_AP113 -+ bool "Atheros AP113 board support" -+ select SOC_AR724X -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_PB9X_PCI if PCI -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_USB -+ select ATH79_DEV_ETH -+ - config ATH79_MACH_AP121 - bool "Atheros AP121 reference board" - select SOC_AR933X -@@ -40,6 +95,24 @@ config ATH79_MACH_AP81 - Say 'Y' here if you want your kernel to support the - Atheros AP81 reference board. - -+config ATH79_MACH_AP83 -+ bool "Atheros AP83 board support" -+ select SOC_AR913X -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_USB -+ select ATH79_DEV_WMAC -+ -+config ATH79_MACH_AP96 -+ bool "Atheros AP96 board support" -+ select SOC_AR71XX -+ select ATH79_DEV_ETH -+ select ATH79_DEV_AP9X_PCI if PCI -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_USB -+ - config ATH79_MACH_DB120 - bool "Atheros DB120 reference board" - select SOC_AR934X -@@ -55,6 +128,13 @@ config ATH79_MACH_DB120 - Say 'Y' here if you want your kernel to support the - Atheros DB120 reference board. - -+config ATH79_MACH_PB42 -+ bool "Atheros PB42 board support" -+ select SOC_AR71XX -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_M25P80 -+ - config ATH79_MACH_PB44 - bool "Atheros PB44 reference board" - select SOC_AR71XX -@@ -67,6 +147,456 @@ config ATH79_MACH_PB44 - Say 'Y' here if you want your kernel to support the - Atheros PB44 reference board. - -+config ATH79_MACH_PB92 -+ bool "Atheros PB92 board support" -+ select SOC_AR724X -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_PB9X_PCI if PCI -+ select ATH79_DEV_USB -+ -+config ATH79_MACH_AW_NR580 -+ bool "AzureWave AW-NR580 board support" -+ select SOC_AR71XX -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ -+config ATH79_MACH_WHR_HP_G300N -+ bool "Buffalo WHR-HP-G300N board support" -+ select SOC_AR724X -+ select ATH79_DEV_ETH -+ select ATH79_DEV_AP9X_PCI if PCI -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ -+config ATH79_MACH_WLAE_AG300N -+ bool "Buffalo WLAE-AG300N board support" -+ select SOC_AR71XX -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ -+config ATH79_MACH_WZR_HP_AG300H -+ bool "Buffalo WZR-HP-AG300H board support" -+ select SOC_AR71XX -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_USB -+ -+config ATH79_MACH_WZR_HP_G300NH -+ bool "Buffalo WZR-HP-G300NH board support" -+ select SOC_AR913X -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_USB -+ select ATH79_DEV_WMAC -+ select RTL8366_SMI -+ -+config ATH79_MACH_WZR_HP_G300NH2 -+ bool "Buffalo WZR-HP-G300NH2 board support" -+ select SOC_AR724X -+ select ATH79_DEV_AP9X_PCI if PCI -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_USB -+ -+config ATH79_MACH_WZR_HP_G450H -+ bool "Buffalo WZR-HP-G450H board support" -+ select SOC_AR724X -+ select ATH79_DEV_ETH -+ select ATH79_DEV_AP9X_PCI if PCI -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_USB -+ -+config ATH79_MACH_WP543 -+ bool "Compex WP543/WPJ543 board support" -+ select SOC_AR71XX -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_USB -+ select MYLOADER -+ -+config ATH79_MACH_WPE72 -+ bool "Compex WPE72/WPE72NX board support" -+ select SOC_AR724X -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_USB -+ select MYLOADER -+ -+config ATH79_MACH_DIR_600_A1 -+ bool "D-Link DIR-600 A1/DIR-615 E4 support" -+ select SOC_AR724X -+ select ATH79_DEV_AP9X_PCI if PCI -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_NVRAM -+ -+config ATH79_MACH_DIR_615_C1 -+ bool "D-Link DIR-615 rev. C1 support" -+ select SOC_AR913X -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_WMAC -+ select ATH79_NVRAM -+ -+config ATH79_MACH_DIR_825_B1 -+ bool "D-Link DIR-825 rev. B1 board support" -+ select SOC_AR71XX -+ select ATH79_DEV_ETH -+ select ATH79_DEV_AP9X_PCI if PCI -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_USB -+ -+config ATH79_MACH_EW_DORIN -+ bool "embedded wireless Dorin Platform support" -+ select SOC_AR933X -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_WMAC -+ select ATH79_DEV_ETH -+ help -+ Say 'Y' here if you want your kernel to support the -+ Dorin Platform from www.80211.de . -+ -+config ATH79_MACH_JA76PF -+ bool "jjPlus JA76PF board support" -+ select SOC_AR71XX -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_USB -+ -+config ATH79_MACH_JWAP003 -+ bool "jjPlus JWAP003 board support" -+ select SOC_AR71XX -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_USB -+ -+config ATH79_MACH_WRT160NL -+ bool "Linksys WRT160NL board support" -+ select SOC_AR913X -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_USB -+ select ATH79_DEV_WMAC -+ select ATH79_NVRAM -+ -+config ATH79_MACH_WRT400N -+ bool "Linksys WRT400N board support" -+ select SOC_AR71XX -+ select ATH79_DEV_ETH -+ select ATH79_DEV_AP9X_PCI if PCI -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ -+config ATH79_MACH_RB4XX -+ bool "MikroTik RouterBOARD 4xx series support" -+ select SOC_AR71XX -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_USB -+ -+config ATH79_MACH_RB750 -+ bool "MikroTik RouterBOARD 750 support" -+ select SOC_AR724X -+ select ATH79_DEV_ETH -+ select ATH79_DEV_AP9X_PCI if PCI -+ select ATH79_DEV_USB -+ select ATH79_ROUTERBOOT -+ select RLE_DECOMPRESS -+ -+config ATH79_MACH_RB2011 -+ bool "MikroTik RouterBOARD 2011 support" -+ select SOC_AR934x -+ select ATH79_DEV_ETH -+ select ATH79_DEV_NFC -+ select ATH79_DEV_WMAC -+ select ATH79_ROUTERBOOT -+ -+config ATH79_MACH_WNDR3700 -+ bool "NETGEAR WNDR3700 board support" -+ select SOC_AR71XX -+ select ATH79_DEV_AP9X_PCI if PCI -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_USB -+ -+config ATH79_MACH_WNR2000 -+ bool "NETGEAR WNR2000 board support" -+ select SOC_AR913X -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_WMAC -+ -+config ATH79_MACH_OM2P -+ bool "OpenMesh OM2P board support" -+ select SOC_AR724X -+ select SOC_AR933X -+ select ATH79_DEV_AP9X_PCI if PCI -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_WMAC -+ -+config ATH79_MACH_MZK_W04NU -+ bool "Planex MZK-W04NU board support" -+ select SOC_AR913X -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_USB -+ select ATH79_DEV_WMAC -+ -+config ATH79_MACH_MZK_W300NH -+ bool "Planex MZK-W300NH board support" -+ select SOC_AR913X -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_WMAC -+ -+config ATH79_MACH_RW2458N -+ bool "Redwave RW2458N board support" -+ select SOC_AR724X -+ select ATH79_DEV_ETH -+ select ATH79_DEV_AP9X_PCI if PCI -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_USB -+ -+config ATH79_MACH_EAP7660D -+ bool "Senao EAP7660D support" -+ select SOC_AR71XX -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ -+config ATH79_MACH_TL_MR11U -+ bool "TP-LINK TL-MR11U/TL-MR3040 support" -+ select SOC_AR933X -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_USB -+ select ATH79_DEV_WMAC -+ -+config ATH79_MACH_TL_MR3020 -+ bool "TP-LINK TL-MR3020 support" -+ select SOC_AR933X -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_USB -+ select ATH79_DEV_WMAC -+ -+config ATH79_MACH_TL_MR3X20 -+ bool "TP-LINK TL-MR3220/3420 support" -+ select SOC_AR724X -+ select ATH79_DEV_AP9X_PCI if PCI -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_USB -+ -+config ATH79_MACH_TL_WA901ND -+ bool "TP-LINK TL-WA901ND support" -+ select SOC_AR724X -+ select ATH79_DEV_AP9X_PCI if PCI -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ -+config ATH79_MACH_TL_WA901ND_V2 -+ bool "TP-LINK TL-WA901ND v2 support" -+ select SOC_AR913X -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_WMAC -+ -+config ATH79_MACH_TL_WDR4300 -+ bool "TP-LINK TL-WDR3600/4300/4310 board support" -+ select SOC_AR934X -+ select ATH79_DEV_AP9X_PCI if PCI -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_USB -+ select ATH79_DEV_WMAC -+ -+config ATH79_MACH_TL_WR703N -+ bool "TP-LINK TL-WR703N support" -+ select SOC_AR933X -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_USB -+ select ATH79_DEV_WMAC -+ -+config ATH79_MACH_TL_WR741ND -+ bool "TP-LINK TL-WR741ND support" -+ select SOC_AR724X -+ select ATH79_DEV_AP9X_PCI if PCI -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ -+config ATH79_MACH_TL_WR741ND_V4 -+ bool "TP-LINK TL-WR741ND v4 support" -+ select SOC_AR933X -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_WMAC -+ -+config ATH79_MACH_TL_WR841N_V1 -+ bool "TP-LINK TL-WR841N v1 support" -+ select SOC_AR71XX -+ select ATH79_DEV_DSA -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ -+config ATH79_MACH_TL_WR841N_V8 -+ bool "TP-LINK TL-WR841N/ND v8 support" -+ select SOC_AR934X -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_WMAC -+ -+config ATH79_MACH_TL_WR941ND -+ bool "TP-LINK TL-WR941ND support" -+ select SOC_AR913X -+ select ATH79_DEV_DSA -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_WMAC -+ -+config ATH79_MACH_TL_WR1041N_V2 -+ bool "TP-LINK TL-WR1041N v2 support" -+ select SOC_AR934X -+ select ATH79_DEV_AP9X_PCI if PCI -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_USB -+ select ATH79_DEV_WMAC -+ -+config ATH79_MACH_TL_WR1043ND -+ bool "TP-LINK TL-WR1043ND support" -+ select SOC_AR913X -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_USB -+ select ATH79_DEV_WMAC -+ -+config ATH79_MACH_TL_WR2543N -+ bool "TP-LINK TL-WR2543N/ND support" -+ select SOC_AR724X -+ select ATH79_DEV_AP9X_PCI if PCI -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_USB -+ -+config ATH79_MACH_TEW_632BRP -+ bool "TRENDnet TEW-632BRP support" -+ select SOC_AR913X -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_WMAC -+ select ATH79_NVRAM -+ -+config ATH79_MACH_TEW_673GRU -+ bool "TRENDnet TEW-673GRU support" -+ select SOC_AR71XX -+ select ATH79_DEV_AP9X_PCI if PCI -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_USB -+ select ATH79_NVRAM -+ -+config ATH79_MACH_TEW_712BR -+ bool "TRENDnet TEW-712BR support" -+ select SOC_AR933X -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_WMAC -+ select ATH79_NVRAM -+ -+config ATH79_MACH_UBNT -+ bool "Ubiquiti AR71xx based boards support" -+ select SOC_AR71XX -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_USB -+ - config ATH79_MACH_UBNT_XM - bool "Ubiquiti Networks XM/UniFi boards" - select SOC_AR724X -@@ -82,6 +612,24 @@ config ATH79_MACH_UBNT_XM - Say 'Y' here if you want your kernel to support the - Ubiquiti Networks XM (rev 1.0) board. - -+config ATH79_MACH_ZCN_1523H -+ bool "Zcomax ZCN-1523H support" -+ select SOC_AR724X -+ select ATH79_DEV_AP9X_PCI if PCI -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ -+config ATH79_MACH_NBG460N -+ bool "Zyxel NBG460N/550N/550NH board support" -+ select SOC_AR913X -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_WMAC -+ - endmenu - - config SOC_AR71XX -@@ -117,10 +665,6 @@ config SOC_QCA955X - select PCI_AR724X if PCI - def_bool n - --config ATH79_DEV_M25P80 -- select ATH79_DEV_SPI -- def_bool n -- - config ATH79_DEV_AP9X_PCI - select ATH79_PCI_ATH9K_FIXUP - def_bool n -@@ -131,7 +675,14 @@ config ATH79_DEV_DSA - config ATH79_DEV_ETH - def_bool n - --config PCI_AR724X -+config ATH79_DEV_M25P80 -+ select ATH79_DEV_SPI -+ def_bool n -+ -+config ATH79_DEV_DSA -+ def_bool n -+ -+config ATH79_DEV_ETH - def_bool n - - config ATH79_DEV_GPIO_BUTTONS -@@ -163,4 +714,7 @@ config ATH79_PCI_ATH9K_FIXUP - config ATH79_ROUTERBOOT - def_bool n - -+config PCI_AR724X -+ def_bool n -+ - endif ---- a/arch/mips/ath79/Makefile -+++ b/arch/mips/ath79/Makefile -@@ -38,9 +38,68 @@ obj-$(CONFIG_ATH79_ROUTERBOOT) += route - # - # Machines - # -+obj-$(CONFIG_ATH79_MACH_ALFA_AP96) += mach-alfa-ap96.o -+obj-$(CONFIG_ATH79_MACH_ALFA_NX) += mach-alfa-nx.o -+obj-$(CONFIG_ATH79_MACH_ALL0258N) += mach-all0258n.o -+obj-$(CONFIG_ATH79_MACH_ALL0315N) += mach-all0315n.o -+obj-$(CONFIG_ATH79_MACH_AP113) += mach-ap113.o - obj-$(CONFIG_ATH79_MACH_AP121) += mach-ap121.o - obj-$(CONFIG_ATH79_MACH_AP136) += mach-ap136.o - obj-$(CONFIG_ATH79_MACH_AP81) += mach-ap81.o -+obj-$(CONFIG_ATH79_MACH_AP83) += mach-ap83.o -+obj-$(CONFIG_ATH79_MACH_AP96) += mach-ap96.o -+obj-$(CONFIG_ATH79_MACH_AW_NR580) += mach-aw-nr580.o - obj-$(CONFIG_ATH79_MACH_DB120) += mach-db120.o -+obj-$(CONFIG_ATH79_MACH_DIR_600_A1) += mach-dir-600-a1.o -+obj-$(CONFIG_ATH79_MACH_DIR_615_C1) += mach-dir-615-c1.o -+obj-$(CONFIG_ATH79_MACH_DIR_825_B1) += mach-dir-825-b1.o -+obj-$(CONFIG_ATH79_MACH_EW_DORIN) += mach-ew-dorin.o -+obj-$(CONFIG_ATH79_MACH_EAP7660D) += mach-eap7660d.o -+obj-$(CONFIG_ATH79_MACH_JA76PF) += mach-ja76pf.o -+obj-$(CONFIG_ATH79_MACH_JWAP003) += mach-jwap003.o -+obj-$(CONFIG_ATH79_MACH_HORNET_UB) += mach-hornet-ub.o -+obj-$(CONFIG_ATH79_MACH_MZK_W04NU) += mach-mzk-w04nu.o -+obj-$(CONFIG_ATH79_MACH_MZK_W300NH) += mach-mzk-w300nh.o -+obj-$(CONFIG_ATH79_MACH_NBG460N) += mach-nbg460n.o -+obj-$(CONFIG_ATH79_MACH_OM2P) += mach-om2p.o -+obj-$(CONFIG_ATH79_MACH_PB42) += mach-pb42.o - obj-$(CONFIG_ATH79_MACH_PB44) += mach-pb44.o -+obj-$(CONFIG_ATH79_MACH_PB92) += mach-pb92.o -+obj-$(CONFIG_ATH79_MACH_RB4XX) += mach-rb4xx.o -+obj-$(CONFIG_ATH79_MACH_RB750) += mach-rb750.o -+obj-$(CONFIG_ATH79_MACH_RB2011) += mach-rb2011.o -+obj-$(CONFIG_ATH79_MACH_RW2458N) += mach-rw2458n.o -+obj-$(CONFIG_ATH79_MACH_TEW_632BRP) += mach-tew-632brp.o -+obj-$(CONFIG_ATH79_MACH_TEW_673GRU) += mach-tew-673gru.o -+obj-$(CONFIG_ATH79_MACH_TEW_712BR) += mach-tew-712br.o -+obj-$(CONFIG_ATH79_MACH_TL_MR11U) += mach-tl-mr11u.o -+obj-$(CONFIG_ATH79_MACH_TL_MR3020) += mach-tl-mr3020.o -+obj-$(CONFIG_ATH79_MACH_TL_MR3X20) += mach-tl-mr3x20.o -+obj-$(CONFIG_ATH79_MACH_TL_WA901ND) += mach-tl-wa901nd.o -+obj-$(CONFIG_ATH79_MACH_TL_WA901ND_V2) += mach-tl-wa901nd-v2.o -+obj-$(CONFIG_ATH79_MACH_TL_WDR4300) += mach-tl-wdr4300.o -+obj-$(CONFIG_ATH79_MACH_TL_WR741ND) += mach-tl-wr741nd.o -+obj-$(CONFIG_ATH79_MACH_TL_WR741ND_V4) += mach-tl-wr741nd-v4.o -+obj-$(CONFIG_ATH79_MACH_TL_WR841N_V1) += mach-tl-wr841n.o -+obj-$(CONFIG_ATH79_MACH_TL_WR841N_V8) += mach-tl-wr841n-v8.o -+obj-$(CONFIG_ATH79_MACH_TL_WR941ND) += mach-tl-wr941nd.o -+obj-$(CONFIG_ATH79_MACH_TL_WR1041N_V2) += mach-tl-wr1041n-v2.o -+obj-$(CONFIG_ATH79_MACH_TL_WR1043ND) += mach-tl-wr1043nd.o -+obj-$(CONFIG_ATH79_MACH_TL_WR2543N) += mach-tl-wr2543n.o -+obj-$(CONFIG_ATH79_MACH_TL_WR703N) += mach-tl-wr703n.o -+obj-$(CONFIG_ATH79_MACH_UBNT) += mach-ubnt.o - obj-$(CONFIG_ATH79_MACH_UBNT_XM) += mach-ubnt-xm.o -+obj-$(CONFIG_ATH79_MACH_WHR_HP_G300N) += mach-whr-hp-g300n.o -+obj-$(CONFIG_ATH79_MACH_WLAE_AG300N) += mach-wlae-ag300n.o -+obj-$(CONFIG_ATH79_MACH_WNDR3700) += mach-wndr3700.o -+obj-$(CONFIG_ATH79_MACH_WNR2000) += mach-wnr2000.o -+obj-$(CONFIG_ATH79_MACH_WP543) += mach-wp543.o -+obj-$(CONFIG_ATH79_MACH_WPE72) += mach-wpe72.o -+obj-$(CONFIG_ATH79_MACH_WRT160NL) += mach-wrt160nl.o -+obj-$(CONFIG_ATH79_MACH_WRT400N) += mach-wrt400n.o -+obj-$(CONFIG_ATH79_MACH_WZR_HP_G300NH) += mach-wzr-hp-g300nh.o -+obj-$(CONFIG_ATH79_MACH_WZR_HP_G300NH2) += mach-wzr-hp-g300nh2.o -+obj-$(CONFIG_ATH79_MACH_WZR_HP_AG300H) += mach-wzr-hp-ag300h.o -+obj-$(CONFIG_ATH79_MACH_WZR_HP_G450H) += mach-wzr-hp-g450h.o -+obj-$(CONFIG_ATH79_MACH_ZCN_1523H) += mach-zcn-1523h.o -+ ---- a/arch/mips/ath79/prom.c -+++ b/arch/mips/ath79/prom.c -@@ -180,6 +180,10 @@ void __init prom_init(void) - ath79_prom_append_cmdline("board", env); - } - } -+ -+ if (strstr(arcs_cmdline, "board=750Gr3") || -+ strstr(arcs_cmdline, "board=2011L")) -+ ath79_prom_append_cmdline("console", "ttyS0,115200"); - } - - void __init prom_free_prom_memory(void) diff --git a/target/linux/ar71xx/patches-3.3/611-MIPS-ath79-CAP4200AG-support.patch b/target/linux/ar71xx/patches-3.3/611-MIPS-ath79-CAP4200AG-support.patch deleted file mode 100644 index 39cef42a5d..0000000000 --- a/target/linux/ar71xx/patches-3.3/611-MIPS-ath79-CAP4200AG-support.patch +++ /dev/null @@ -1,39 +0,0 @@ ---- a/arch/mips/ath79/Kconfig -+++ b/arch/mips/ath79/Kconfig -@@ -403,6 +403,16 @@ config ATH79_MACH_RW2458N - select ATH79_DEV_M25P80 - select ATH79_DEV_USB - -+config ATH79_MACH_CAP4200AG -+ bool "Senao CAP4200AG support" -+ select SOC_AR934X -+ select ATH79_DEV_AP9X_PCI if PCI -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_WMAC -+ - config ATH79_MACH_EAP7660D - bool "Senao EAP7660D support" - select SOC_AR71XX ---- a/arch/mips/ath79/machtypes.h -+++ b/arch/mips/ath79/machtypes.h -@@ -29,6 +29,7 @@ enum ath79_mach_type { - ATH79_MACH_AP83, /* Atheros AP83 */ - ATH79_MACH_AP96, /* Atheros AP96 */ - ATH79_MACH_AW_NR580, /* AzureWave AW-NR580 */ -+ ATH79_MACH_CAP4200AG, /* Senao CAP4200AG */ - ATH79_MACH_DB120, /* Atheros DB120 reference board */ - ATH79_MACH_PB44, /* Atheros PB44 reference board */ - ATH79_MACH_DIR_600_A1, /* D-Link DIR-600 rev. A1 */ ---- a/arch/mips/ath79/Makefile -+++ b/arch/mips/ath79/Makefile -@@ -49,6 +49,7 @@ obj-$(CONFIG_ATH79_MACH_AP81) += mach-a - obj-$(CONFIG_ATH79_MACH_AP83) += mach-ap83.o - obj-$(CONFIG_ATH79_MACH_AP96) += mach-ap96.o - obj-$(CONFIG_ATH79_MACH_AW_NR580) += mach-aw-nr580.o -+obj-$(CONFIG_ATH79_MACH_CAP4200AG) += mach-cap4200ag.o - obj-$(CONFIG_ATH79_MACH_DB120) += mach-db120.o - obj-$(CONFIG_ATH79_MACH_DIR_600_A1) += mach-dir-600-a1.o - obj-$(CONFIG_ATH79_MACH_DIR_615_C1) += mach-dir-615-c1.o diff --git a/target/linux/ar71xx/patches-3.3/612-MIPS-ath79-TL-WA7510N-v1-support.patch b/target/linux/ar71xx/patches-3.3/612-MIPS-ath79-TL-WA7510N-v1-support.patch deleted file mode 100644 index 6bd58b0ecb..0000000000 --- a/target/linux/ar71xx/patches-3.3/612-MIPS-ath79-TL-WA7510N-v1-support.patch +++ /dev/null @@ -1,21 +0,0 @@ ---- a/arch/mips/ath79/machtypes.h -+++ b/arch/mips/ath79/machtypes.h -@@ -74,6 +74,7 @@ enum ath79_mach_type { - ATH79_MACH_TL_MR3040, /* TP-LINK TL-MR3040 */ - ATH79_MACH_TL_MR3220, /* TP-LINK TL-MR3220 */ - ATH79_MACH_TL_MR3420, /* TP-LINK TL-MR3420 */ -+ ATH79_MACH_TL_WA7510N_V1, /* TP-LINK TL-WA7510N v1*/ - ATH79_MACH_TL_WA901ND, /* TP-LINK TL-WA901ND */ - ATH79_MACH_TL_WA901ND_V2, /* TP-LINK TL-WA901ND v2 */ - ATH79_MACH_TL_WDR4300, /* TP-LINK TL-WDR4300 */ ---- a/arch/mips/ath79/Kconfig -+++ b/arch/mips/ath79/Kconfig -@@ -452,7 +452,7 @@ config ATH79_MACH_TL_MR3X20 - select ATH79_DEV_USB - - config ATH79_MACH_TL_WA901ND -- bool "TP-LINK TL-WA901ND support" -+ bool "TP-LINK TL-WA901ND/TL-WA7510N support" - select SOC_AR724X - select ATH79_DEV_AP9X_PCI if PCI - select ATH79_DEV_ETH diff --git a/target/linux/ar71xx/patches-3.3/614-MIPS-ath79-MR600-support.patch b/target/linux/ar71xx/patches-3.3/614-MIPS-ath79-MR600-support.patch deleted file mode 100644 index f56fd7496d..0000000000 --- a/target/linux/ar71xx/patches-3.3/614-MIPS-ath79-MR600-support.patch +++ /dev/null @@ -1,39 +0,0 @@ ---- a/arch/mips/ath79/Kconfig -+++ b/arch/mips/ath79/Kconfig -@@ -374,6 +374,16 @@ config ATH79_MACH_OM2P - select ATH79_DEV_M25P80 - select ATH79_DEV_WMAC - -+config ATH79_MACH_MR600 -+ bool "OpenMesh MR600 board support" -+ select SOC_AR934X -+ select ATH79_DEV_AP9X_PCI if PCI -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_WMAC -+ - config ATH79_MACH_MZK_W04NU - bool "Planex MZK-W04NU board support" - select SOC_AR913X ---- a/arch/mips/ath79/machtypes.h -+++ b/arch/mips/ath79/machtypes.h -@@ -43,6 +43,7 @@ enum ath79_mach_type { - ATH79_MACH_JA76PF2, /* jjPlus JA76PF2 */ - ATH79_MACH_JWAP003, /* jjPlus JWAP003 */ - ATH79_MACH_HORNET_UB, /* ALFA Networks Hornet-UB */ -+ ATH79_MACH_MR600, /* OpenMesh MR600 */ - ATH79_MACH_MZK_W04NU, /* Planex MZK-W04NU */ - ATH79_MACH_MZK_W300NH, /* Planex MZK-W300NH */ - ATH79_MACH_NBG460N, /* Zyxel NBG460N/550N/550NH */ ---- a/arch/mips/ath79/Makefile -+++ b/arch/mips/ath79/Makefile -@@ -59,6 +59,7 @@ obj-$(CONFIG_ATH79_MACH_EAP7660D) += mac - obj-$(CONFIG_ATH79_MACH_JA76PF) += mach-ja76pf.o - obj-$(CONFIG_ATH79_MACH_JWAP003) += mach-jwap003.o - obj-$(CONFIG_ATH79_MACH_HORNET_UB) += mach-hornet-ub.o -+obj-$(CONFIG_ATH79_MACH_MR600) += mach-mr600.o - obj-$(CONFIG_ATH79_MACH_MZK_W04NU) += mach-mzk-w04nu.o - obj-$(CONFIG_ATH79_MACH_MZK_W300NH) += mach-mzk-w300nh.o - obj-$(CONFIG_ATH79_MACH_NBG460N) += mach-nbg460n.o diff --git a/target/linux/ar71xx/patches-3.3/615-MIPS-ath79-RB435G-support.patch b/target/linux/ar71xx/patches-3.3/615-MIPS-ath79-RB435G-support.patch deleted file mode 100644 index 5921417698..0000000000 --- a/target/linux/ar71xx/patches-3.3/615-MIPS-ath79-RB435G-support.patch +++ /dev/null @@ -1,10 +0,0 @@ ---- a/arch/mips/ath79/machtypes.h -+++ b/arch/mips/ath79/machtypes.h -@@ -56,6 +56,7 @@ enum ath79_mach_type { - ATH79_MACH_RB_411U, /* MikroTik RouterBOARD 411U */ - ATH79_MACH_RB_433, /* MikroTik RouterBOARD 433/433AH */ - ATH79_MACH_RB_433U, /* MikroTik RouterBOARD 433UAH */ -+ ATH79_MACH_RB_435G, /* MikroTik RouterBOARD 435G */ - ATH79_MACH_RB_450G, /* MikroTik RouterBOARD 450G */ - ATH79_MACH_RB_450, /* MikroTik RouterBOARD 450 */ - ATH79_MACH_RB_493, /* Mikrotik RouterBOARD 493/493AH */ diff --git a/target/linux/ar71xx/patches-3.3/616-MIPS-ath79-WNDR4300-support.patch b/target/linux/ar71xx/patches-3.3/616-MIPS-ath79-WNDR4300-support.patch deleted file mode 100644 index 055708b31f..0000000000 --- a/target/linux/ar71xx/patches-3.3/616-MIPS-ath79-WNDR4300-support.patch +++ /dev/null @@ -1,40 +0,0 @@ ---- a/arch/mips/ath79/Kconfig -+++ b/arch/mips/ath79/Kconfig -@@ -354,6 +354,17 @@ config ATH79_MACH_WNDR3700 - select ATH79_DEV_M25P80 - select ATH79_DEV_USB - -+config ATH79_MACH_WNDR4300 -+ bool "NETGEAR WNDR4300 board support" -+ select SOC_AR934X -+ select ATH79_DEV_AP9X_PCI if PCI -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_NFC -+ select ATH79_DEV_USB -+ select ATH79_DEV_WMAC -+ - config ATH79_MACH_WNR2000 - bool "NETGEAR WNR2000 board support" - select SOC_AR913X ---- a/arch/mips/ath79/machtypes.h -+++ b/arch/mips/ath79/machtypes.h -@@ -107,6 +107,7 @@ enum ath79_mach_type { - ATH79_MACH_WHR_HP_GN, /* Buffalo WHR-HP-GN */ - ATH79_MACH_WLAE_AG300N, /* Buffalo WLAE-AG300N */ - ATH79_MACH_WNDR3700, /* NETGEAR WNDR3700/WNDR3800/WNDRMAC */ -+ ATH79_MACH_WNDR4300, /* NETGEAR WNDR4300 */ - ATH79_MACH_WNR2000, /* NETGEAR WNR2000 */ - ATH79_MACH_WP543, /* Compex WP543 */ - ATH79_MACH_WPE72, /* Compex WPE72 */ ---- a/arch/mips/ath79/Makefile -+++ b/arch/mips/ath79/Makefile -@@ -94,6 +94,7 @@ obj-$(CONFIG_ATH79_MACH_UBNT_XM) += mach - obj-$(CONFIG_ATH79_MACH_WHR_HP_G300N) += mach-whr-hp-g300n.o - obj-$(CONFIG_ATH79_MACH_WLAE_AG300N) += mach-wlae-ag300n.o - obj-$(CONFIG_ATH79_MACH_WNDR3700) += mach-wndr3700.o -+obj-$(CONFIG_ATH79_MACH_WNDR4300) += mach-wndr4300.o - obj-$(CONFIG_ATH79_MACH_WNR2000) += mach-wnr2000.o - obj-$(CONFIG_ATH79_MACH_WP543) += mach-wp543.o - obj-$(CONFIG_ATH79_MACH_WPE72) += mach-wpe72.o diff --git a/target/linux/ar71xx/patches-3.3/630-MIPS-ath79-enable-dsp.patch b/target/linux/ar71xx/patches-3.3/630-MIPS-ath79-enable-dsp.patch deleted file mode 100644 index 3071ab88f5..0000000000 --- a/target/linux/ar71xx/patches-3.3/630-MIPS-ath79-enable-dsp.patch +++ /dev/null @@ -1,10 +0,0 @@ ---- a/arch/mips/include/asm/mach-ath79/cpu-feature-overrides.h -+++ b/arch/mips/include/asm/mach-ath79/cpu-feature-overrides.h -@@ -42,7 +42,6 @@ - #define cpu_has_mips64r1 0 - #define cpu_has_mips64r2 0 - --#define cpu_has_dsp 0 - #define cpu_has_mipsmt 0 - - #define cpu_has_64bits 0 diff --git a/target/linux/ar71xx/patches-3.3/650-MIPS-ath79-fix-ar933x-reset.patch b/target/linux/ar71xx/patches-3.3/650-MIPS-ath79-fix-ar933x-reset.patch deleted file mode 100644 index a81d6ea6e0..0000000000 --- a/target/linux/ar71xx/patches-3.3/650-MIPS-ath79-fix-ar933x-reset.patch +++ /dev/null @@ -1,31 +0,0 @@ ---- a/arch/mips/ath79/dev-wmac.c -+++ b/arch/mips/ath79/dev-wmac.c -@@ -67,10 +67,27 @@ static void __init ar913x_wmac_setup(voi - - static int ar933x_wmac_reset(void) - { -+ int retries = 20; -+ - ath79_device_reset_set(AR933X_RESET_WMAC); - ath79_device_reset_clear(AR933X_RESET_WMAC); - -- return 0; -+ while (1) { -+ u32 bootstrap; -+ -+ bootstrap = ath79_reset_rr(AR933X_RESET_REG_BOOTSTRAP); -+ if ((bootstrap & AR933X_BOOTSTRAP_EEPBUSY) == 0) -+ return 0; -+ -+ if (retries-- == 0) -+ break; -+ -+ udelay(10000); -+ retries++; -+ } -+ -+ pr_err("ar933x: WMAC reset timed out"); -+ return -ETIMEDOUT; - } - - static int ar933x_r1_get_wmac_revision(void) diff --git a/target/linux/ar71xx/patches-3.3/901-mdio_bitbang_ignore_ta_value.patch b/target/linux/ar71xx/patches-3.3/901-mdio_bitbang_ignore_ta_value.patch deleted file mode 100644 index 39584aabfa..0000000000 --- a/target/linux/ar71xx/patches-3.3/901-mdio_bitbang_ignore_ta_value.patch +++ /dev/null @@ -1,20 +0,0 @@ ---- a/drivers/net/phy/mdio-bitbang.c -+++ b/drivers/net/phy/mdio-bitbang.c -@@ -165,16 +165,7 @@ static int mdiobb_read(struct mii_bus *b - - ctrl->ops->set_mdio_dir(ctrl, 0); - -- /* check the turnaround bit: the PHY should be driving it to zero */ -- if (mdiobb_get_bit(ctrl) != 0) { -- /* PHY didn't drive TA low -- flush any bits it -- * may be trying to send. -- */ -- for (i = 0; i < 32; i++) -- mdiobb_get_bit(ctrl); -- -- return 0xffff; -- } -+ mdiobb_get_bit(ctrl); - - ret = mdiobb_get_num(ctrl, 16); - mdiobb_get_bit(ctrl); diff --git a/target/linux/ar71xx/patches-3.3/902-unaligned_access_hacks.patch b/target/linux/ar71xx/patches-3.3/902-unaligned_access_hacks.patch deleted file mode 100644 index 921cf194d6..0000000000 --- a/target/linux/ar71xx/patches-3.3/902-unaligned_access_hacks.patch +++ /dev/null @@ -1,117 +0,0 @@ ---- a/arch/mips/include/asm/checksum.h -+++ b/arch/mips/include/asm/checksum.h -@@ -12,6 +12,7 @@ - #define _ASM_CHECKSUM_H - - #include <linux/in6.h> -+#include <linux/unaligned/packed_struct.h> - - #include <asm/uaccess.h> - -@@ -104,26 +105,30 @@ static inline __sum16 ip_fast_csum(const - const unsigned int *stop = word + ihl; - unsigned int csum; - int carry; -+ unsigned int w; - -- csum = word[0]; -- csum += word[1]; -- carry = (csum < word[1]); -+ csum = __get_unaligned_cpu32(word++); -+ -+ w = __get_unaligned_cpu32(word++); -+ csum += w; -+ carry = (csum < w); - csum += carry; - -- csum += word[2]; -- carry = (csum < word[2]); -+ w = __get_unaligned_cpu32(word++); -+ csum += w; -+ carry = (csum < w); - csum += carry; - -- csum += word[3]; -- carry = (csum < word[3]); -+ w = __get_unaligned_cpu32(word++); -+ csum += w; -+ carry = (csum < w); - csum += carry; - -- word += 4; - do { -- csum += *word; -- carry = (csum < *word); -+ w = __get_unaligned_cpu32(word++); -+ csum += w; -+ carry = (csum < w); - csum += carry; -- word++; - } while (word != stop); - - return csum_fold(csum); ---- a/include/linux/ip.h -+++ b/include/linux/ip.h -@@ -102,7 +102,7 @@ struct iphdr { - __be32 saddr; - __be32 daddr; - /*The options start here. */ --}; -+} __packed; - - #ifdef __KERNEL__ - #include <linux/skbuff.h> ---- a/include/linux/ipv6.h -+++ b/include/linux/ipv6.h -@@ -126,7 +126,7 @@ struct ipv6hdr { - - struct in6_addr saddr; - struct in6_addr daddr; --}; -+} __packed; - - #ifdef __KERNEL__ - /* ---- a/include/linux/tcp.h -+++ b/include/linux/tcp.h -@@ -54,7 +54,7 @@ struct tcphdr { - __be16 window; - __sum16 check; - __be16 urg_ptr; --}; -+} __packed; - - /* - * The union cast uses a gcc extension to avoid aliasing problems ---- a/include/linux/udp.h -+++ b/include/linux/udp.h -@@ -24,7 +24,7 @@ struct udphdr { - __be16 dest; - __be16 len; - __sum16 check; --}; -+} __packed; - - /* UDP socket options */ - #define UDP_CORK 1 /* Never send partially complete segments */ ---- a/net/ipv4/netfilter/nf_conntrack_l3proto_ipv4.c -+++ b/net/ipv4/netfilter/nf_conntrack_l3proto_ipv4.c -@@ -14,6 +14,7 @@ - #include <linux/skbuff.h> - #include <linux/icmp.h> - #include <linux/sysctl.h> -+#include <linux/unaligned/packed_struct.h> - #include <net/route.h> - #include <net/ip.h> - -@@ -44,8 +45,8 @@ static bool ipv4_pkt_to_tuple(const stru - if (ap == NULL) - return false; - -- tuple->src.u3.ip = ap[0]; -- tuple->dst.u3.ip = ap[1]; -+ tuple->src.u3.ip = __get_unaligned_cpu32(ap++); -+ tuple->dst.u3.ip = __get_unaligned_cpu32(ap); - - return true; - } diff --git a/target/linux/ar71xx/patches-3.3/a01-ag71xx-build_skb-compat.patch b/target/linux/ar71xx/patches-3.3/a01-ag71xx-build_skb-compat.patch deleted file mode 100644 index a75f8ef4c2..0000000000 --- a/target/linux/ar71xx/patches-3.3/a01-ag71xx-build_skb-compat.patch +++ /dev/null @@ -1,12 +0,0 @@ -reverted: ---- a/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c -+++ b/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c -@@ -891,7 +891,7 @@ static int ag71xx_rx_packets(struct ag71 - dev->stats.rx_packets++; - dev->stats.rx_bytes += pktlen; - -- skb = build_skb(ring->buf[i].rx_buf, 0); -+ skb = build_skb(ring->buf[i].rx_buf); - if (!skb) { - kfree(ring->buf[i].rx_buf); - goto next; diff --git a/target/linux/ar71xx/patches-3.3/a02-ar934x_nfc-add-NO_AUTOINCR-flag.patch b/target/linux/ar71xx/patches-3.3/a02-ar934x_nfc-add-NO_AUTOINCR-flag.patch deleted file mode 100644 index 0a7a221efd..0000000000 --- a/target/linux/ar71xx/patches-3.3/a02-ar934x_nfc-add-NO_AUTOINCR-flag.patch +++ /dev/null @@ -1,11 +0,0 @@ -reverted: ---- a/drivers/mtd/nand/ar934x_nfc.c -+++ b/drivers/mtd/nand/ar934x_nfc.c -@@ -1064,6 +1064,7 @@ ar934x_nfc_probe(struct platform_device - else - mtd->name = dev_name(&pdev->dev); - -+ nand->options = NAND_NO_AUTOINCR; - nand->chip_delay = 25; - nand->ecc.mode = NAND_ECC_SOFT; - diff --git a/target/linux/ar71xx/patches-3.3/a03-rb4xx_nand-add-NO_AUTOINCR-flag.patch b/target/linux/ar71xx/patches-3.3/a03-rb4xx_nand-add-NO_AUTOINCR-flag.patch deleted file mode 100644 index 864340ecfd..0000000000 --- a/target/linux/ar71xx/patches-3.3/a03-rb4xx_nand-add-NO_AUTOINCR-flag.patch +++ /dev/null @@ -1,11 +0,0 @@ -reverted: ---- a/drivers/mtd/nand/rb4xx_nand.c -+++ b/drivers/mtd/nand/rb4xx_nand.c -@@ -218,6 +218,7 @@ static int __devinit rb4xx_nand_probe(st - - info->chip.chip_delay = 25; - info->chip.ecc.mode = NAND_ECC_SOFT; -+ info->chip.options |= NAND_NO_AUTOINCR; - - platform_set_drvdata(pdev, info); - diff --git a/target/linux/ar71xx/patches-3.3/a04-rb750_nand-add-NO_AUTOINCR-flag.patch b/target/linux/ar71xx/patches-3.3/a04-rb750_nand-add-NO_AUTOINCR-flag.patch deleted file mode 100644 index 4082df2ead..0000000000 --- a/target/linux/ar71xx/patches-3.3/a04-rb750_nand-add-NO_AUTOINCR-flag.patch +++ /dev/null @@ -1,11 +0,0 @@ -reverted: ---- a/drivers/mtd/nand/rb750_nand.c -+++ b/drivers/mtd/nand/rb750_nand.c -@@ -277,6 +277,7 @@ static int __devinit rb750_nand_probe(st - - info->chip.chip_delay = 25; - info->chip.ecc.mode = NAND_ECC_SOFT; -+ info->chip.options |= NAND_NO_AUTOINCR; - - info->pdata = pdata; - diff --git a/target/linux/ar71xx/patches-3.3/a05-ar934x_nfc-add-buffer-verification.patch b/target/linux/ar71xx/patches-3.3/a05-ar934x_nfc-add-buffer-verification.patch deleted file mode 100644 index 69027ade9a..0000000000 --- a/target/linux/ar71xx/patches-3.3/a05-ar934x_nfc-add-buffer-verification.patch +++ /dev/null @@ -1,29 +0,0 @@ ---- a/drivers/mtd/nand/ar934x_nfc.c -+++ b/drivers/mtd/nand/ar934x_nfc.c -@@ -786,6 +786,18 @@ ar934x_nfc_read_buf(struct mtd_info *mtd - nfc->buf_index = buf_index; - } - -+static int -+ar934x_nfc_verify_buf(struct mtd_info *mtd, const u_char *buf, int len) -+{ -+ int i; -+ -+ for (i = 0; i < len; i++) -+ if (buf[i] != ar934x_nfc_read_byte(mtd)) -+ return -EFAULT; -+ -+ return 0; -+} -+ - static void - ar934x_nfc_hw_init(struct ar934x_nfc *nfc) - { -@@ -1073,6 +1085,7 @@ ar934x_nfc_probe(struct platform_device - nand->read_byte = ar934x_nfc_read_byte; - nand->write_buf = ar934x_nfc_write_buf; - nand->read_buf = ar934x_nfc_read_buf; -+ nand->verify_buf = ar934x_nfc_verify_buf; - nand->select_chip = ar934x_nfc_select_chip; - - ret = ar934x_nfc_alloc_buf(nfc, AR934X_NFC_ID_BUF_SIZE); diff --git a/target/linux/ar71xx/patches-3.3/a06-rb750_nand-add-buffer-verification.patch b/target/linux/ar71xx/patches-3.3/a06-rb750_nand-add-buffer-verification.patch deleted file mode 100644 index fb27194d86..0000000000 --- a/target/linux/ar71xx/patches-3.3/a06-rb750_nand-add-buffer-verification.patch +++ /dev/null @@ -1,63 +0,0 @@ ---- a/drivers/mtd/nand/rb750_nand.c -+++ b/drivers/mtd/nand/rb750_nand.c -@@ -110,7 +110,8 @@ static void rb750_nand_write(const u8 *b - __raw_readl(base + AR71XX_GPIO_REG_OE); - } - --static void rb750_nand_read(u8 *read_buf, unsigned len) -+static int rb750_nand_read_verify(u8 *read_buf, unsigned len, -+ const u8 *verify_buf) - { - void __iomem *base = ath79_gpio_base; - unsigned i; -@@ -130,8 +131,13 @@ static void rb750_nand_read(u8 *read_buf - /* deactivate RE line */ - __raw_writel(RB750_NAND_NRE, base + AR71XX_GPIO_REG_SET); - -- read_buf[i] = data; -+ if (read_buf) -+ read_buf[i] = data; -+ else if (verify_buf && verify_buf[i] != data) -+ return -EFAULT; - } -+ -+ return 0; - } - - static void rb750_nand_select_chip(struct mtd_info *mtd, int chip) -@@ -206,13 +212,13 @@ static void rb750_nand_cmd_ctrl(struct m - static u8 rb750_nand_read_byte(struct mtd_info *mtd) - { - u8 data = 0; -- rb750_nand_read(&data, 1); -+ rb750_nand_read_verify(&data, 1, NULL); - return data; - } - - static void rb750_nand_read_buf(struct mtd_info *mtd, u8 *buf, int len) - { -- rb750_nand_read(buf, len); -+ rb750_nand_read_verify(buf, len, NULL); - } - - static void rb750_nand_write_buf(struct mtd_info *mtd, const u8 *buf, int len) -@@ -220,6 +226,11 @@ static void rb750_nand_write_buf(struct - rb750_nand_write(buf, len); - } - -+static int rb750_nand_verify_buf(struct mtd_info *mtd, const u8 *buf, int len) -+{ -+ return rb750_nand_read_verify(NULL, len, buf); -+} -+ - static void __init rb750_nand_gpio_init(struct rb750_nand_info *info) - { - void __iomem *base = ath79_gpio_base; -@@ -274,6 +285,7 @@ static int __devinit rb750_nand_probe(st - info->chip.read_byte = rb750_nand_read_byte; - info->chip.write_buf = rb750_nand_write_buf; - info->chip.read_buf = rb750_nand_read_buf; -+ info->chip.verify_buf = rb750_nand_verify_buf; - - info->chip.chip_delay = 25; - info->chip.ecc.mode = NAND_ECC_SOFT; |