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| author | John Crispin <john@openwrt.org> | 2015-05-23 15:25:51 +0000 |
|---|---|---|
| committer | John Crispin <john@openwrt.org> | 2015-05-23 15:25:51 +0000 |
| commit | 390924e662b1f95cd568d184f41257f69aba08b9 (patch) | |
| tree | ac21766f232d28b6011f6ea601ed7da874cb6171 | |
| parent | 47eca7a1ca266c9b0746f659cd3f95808ec07ed6 (diff) | |
| download | master-31e0f0ae-390924e662b1f95cd568d184f41257f69aba08b9.tar.gz master-31e0f0ae-390924e662b1f95cd568d184f41257f69aba08b9.tar.bz2 master-31e0f0ae-390924e662b1f95cd568d184f41257f69aba08b9.zip | |
lantiq: Fix PCIe bus when PCI is also enabled.
The PCIe bus seems to require a hack/workaround when PCI is enabled as
well. Unfortunately this is guarded by an CONFIG_IFX_PCI ifdef, which is
only defined in lantiq's BSP code. The config symbol for the upstream
lantiq PCI driver is CONFIG_PCI_LANTIQ.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
SVN-Revision: 45717
| -rw-r--r-- | target/linux/lantiq/patches-3.18/0001-MIPS-lantiq-add-pcie-driver.patch | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/target/linux/lantiq/patches-3.18/0001-MIPS-lantiq-add-pcie-driver.patch b/target/linux/lantiq/patches-3.18/0001-MIPS-lantiq-add-pcie-driver.patch index 2cc0814194..26f262c3e4 100644 --- a/target/linux/lantiq/patches-3.18/0001-MIPS-lantiq-add-pcie-driver.patch +++ b/target/linux/lantiq/patches-3.18/0001-MIPS-lantiq-add-pcie-driver.patch @@ -4115,11 +4115,11 @@ Signed-off-by: John Crispin <blogic@openwrt.org> +{ + u32 tbus_number = bus_number; + -+#ifdef CONFIG_IFX_PCI ++#ifdef CONFIG_PCI_LANTIQ + if (pcibios_host_nr() > 1) { + tbus_number -= pcibios_1st_host_bus_nr(); + } -+#endif /* CONFIG_IFX_PCI */ ++#endif /* CONFIG_PCI_LANTIQ */ + return tbus_number; +} + @@ -4141,14 +4141,14 @@ Signed-off-by: John Crispin <blogic@openwrt.org> + } + + if (read) { /* Read hack */ -+ #ifdef CONFIG_IFX_PCI ++ #ifdef CONFIG_PCI_LANTIQ + if (pcibios_host_nr() > 1) { + tvalue = ifx_pcie_bus_enum_read_hack(where, tvalue); + } -+ #endif /* CONFIG_IFX_PCI */ ++ #endif /* CONFIG_PCI_LANTIQ */ + } + else { /* Write hack */ -+ #ifdef CONFIG_IFX_PCI ++ #ifdef CONFIG_PCI_LANTIQ + if (pcibios_host_nr() > 1) { + tvalue = ifx_pcie_bus_enum_write_hack(where, tvalue); + } @@ -5457,11 +5457,11 @@ Signed-off-by: John Crispin <blogic@openwrt.org> +{ + u32 tbus_number = bus_number; + -+#ifdef CONFIG_IFX_PCI ++#ifdef CONFIG_PCI_LANTIQ + if (pcibios_host_nr() > 1) { + tbus_number -= pcibios_1st_host_bus_nr(); + } -+#endif /* CONFIG_IFX_PCI */ ++#endif /* CONFIG_PCI_LANTIQ */ + return tbus_number; +} + @@ -5483,14 +5483,14 @@ Signed-off-by: John Crispin <blogic@openwrt.org> + } + + if (read) { /* Read hack */ -+ #ifdef CONFIG_IFX_PCI ++ #ifdef CONFIG_PCI_LANTIQ + if (pcibios_host_nr() > 1) { + tvalue = ifx_pcie_bus_enum_read_hack(where, tvalue); + } -+ #endif /* CONFIG_IFX_PCI */ ++ #endif /* CONFIG_PCI_LANTIQ */ + } + else { /* Write hack */ -+ #ifdef CONFIG_IFX_PCI ++ #ifdef CONFIG_PCI_LANTIQ + if (pcibios_host_nr() > 1) { + tvalue = ifx_pcie_bus_enum_write_hack(where, tvalue); + } |