From ad9c7fb058f1fdacad4d49309ed4057d460dfdd8 Mon Sep 17 00:00:00 2001
From: root <root@no.no.james.local>
Date: Mon, 8 Dec 2014 19:11:47 +0000
Subject: fish

---
 delay.h       |   2 +-
 delay_basic.h | 113 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 114 insertions(+), 1 deletion(-)
 create mode 100644 delay_basic.h

diff --git a/delay.h b/delay.h
index 6f351db..d0d5970 100644
--- a/delay.h
+++ b/delay.h
@@ -40,7 +40,7 @@
 #endif
 
 #include <inttypes.h>
-#include <util/delay_basic.h>
+#include "delay_basic.h"
 #include <math.h>
 
 /** \file */
diff --git a/delay_basic.h b/delay_basic.h
new file mode 100644
index 0000000..ddf7ecd
--- /dev/null
+++ b/delay_basic.h
@@ -0,0 +1,113 @@
+/* Copyright (c) 2002, Marek Michalkiewicz
+   Copyright (c) 2007 Joerg Wunsch
+   All rights reserved.
+
+   Redistribution and use in source and binary forms, with or without
+   modification, are permitted provided that the following conditions are met:
+
+   * Redistributions of source code must retain the above copyright
+     notice, this list of conditions and the following disclaimer.
+
+   * Redistributions in binary form must reproduce the above copyright
+     notice, this list of conditions and the following disclaimer in
+     the documentation and/or other materials provided with the
+     distribution.
+
+   * Neither the name of the copyright holders nor the names of
+     contributors may be used to endorse or promote products derived
+     from this software without specific prior written permission.
+
+  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+  ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+  LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+  SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+  INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+  POSSIBILITY OF SUCH DAMAGE. */
+
+/* $Id: delay_basic.h 2143 2010-06-08 21:19:51Z joerg_wunsch $ */
+
+#ifndef _UTIL_DELAY_BASIC_H_
+#define _UTIL_DELAY_BASIC_H_ 1
+
+#include <inttypes.h>
+
+#if !defined(__DOXYGEN__)
+static inline void _delay_loop_1(uint8_t __count) __attribute__((always_inline));
+static inline void _delay_loop_2(uint16_t __count) __attribute__((always_inline));
+#endif
+
+/** \file */
+/** \defgroup util_delay_basic <util/delay_basic.h>: Basic busy-wait delay loops
+    \code
+    #include <util/delay_basic.h>
+    \endcode
+
+    The functions in this header file implement simple delay loops
+    that perform a busy-waiting.  They are typically used to
+    facilitate short delays in the program execution.  They are
+    implemented as count-down loops with a well-known CPU cycle
+    count per loop iteration.  As such, no other processing can
+    occur simultaneously.  It should be kept in mind that the
+    functions described here do not disable interrupts.
+
+    In general, for long delays, the use of hardware timers is
+    much preferrable, as they free the CPU, and allow for
+    concurrent processing of other events while the timer is
+    running.  However, in particular for very short delays, the
+    overhead of setting up a hardware timer is too much compared
+    to the overall delay time.
+
+    Two inline functions are provided for the actual delay algorithms.
+
+*/
+
+/** \ingroup util_delay_basic
+
+    Delay loop using an 8-bit counter \c __count, so up to 256
+    iterations are possible.  (The value 256 would have to be passed
+    as 0.)  The loop executes three CPU cycles per iteration, not
+    including the overhead the compiler needs to setup the counter
+    register.
+
+    Thus, at a CPU speed of 1 MHz, delays of up to 768 microseconds
+    can be achieved.
+*/
+static inline void
+_delay_loop_1(uint8_t __count)
+{
+	__asm__ volatile (
+		"1: dec %0" "\n\t"
+		"brne 1b"
+		: "=r" (__count)
+		: "0" (__count)
+	);
+}
+
+/** \ingroup util_delay_basic
+
+    Delay loop using a 16-bit counter \c __count, so up to 65536
+    iterations are possible.  (The value 65536 would have to be
+    passed as 0.)  The loop executes four CPU cycles per iteration,
+    not including the overhead the compiler requires to setup the
+    counter register pair.
+
+    Thus, at a CPU speed of 1 MHz, delays of up to about 262.1
+    milliseconds can be achieved.
+ */
+static inline void
+_delay_loop_2(uint16_t __count)
+{
+	__asm__ volatile (
+		"1: sbiw %0,1" "\n\t"
+		"brne 1b"
+		: "=w" (__count)
+		: "0" (__count)
+	);
+}
+
+#endif /* _UTIL_DELAY_BASIC_H_ */
-- 
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