From 7ab8f32168e55169c605c1a66446091f533ccdad Mon Sep 17 00:00:00 2001 From: Rob Langley Date: Tue, 29 May 2018 14:47:31 +0100 Subject: Just one freq supported --- spdif.sdc | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'spdif.sdc') diff --git a/spdif.sdc b/spdif.sdc index e0eb00c..f7c36c5 100644 --- a/spdif.sdc +++ b/spdif.sdc @@ -7,9 +7,9 @@ set_time_format -unit ns -decimal_places 3 ############################################################################## # Create Input reference clocks create_clock -name {xtal_50mhz} -period 20.000 -waveform { 0.000 10.000 } [get_ports { xtal_50mhz }] -create_clock -name {det1_clk} -period 10.000 -waveform { 0.000 5.000 } [get_nets { det1|divider:div1|q }] +# create_clock -name {det1_clk} -period 10.000 -waveform { 0.000 5.000 } [get_nets { det1|divider:div1|q }] create_clock -name {det2_clk} -period 25.000 -waveform { 0.000 12.500 } [get_nets { det2|divider:div1|q }] -create_clock -name {det3_clk} -period 40.000 -waveform { 0.000 20.000 } [get_nets { det3|divider:div1|q }] +# create_clock -name {det3_clk} -period 40.000 -waveform { 0.000 20.000 } [get_nets { det3|divider:div1|q }] ############################################################################## # Now that we have created the custom clocks which will be base clocks, -- cgit v1.2.3