From 85b8cf5877ed7082564a47d94917ca7151977625 Mon Sep 17 00:00:00 2001 From: root Date: Thu, 17 May 2018 18:12:57 +0100 Subject: minor fixes, make clock simulator happy and fix AS programming --- silence_detector.vhd | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'silence_detector.vhd') diff --git a/silence_detector.vhd b/silence_detector.vhd index 14cc72e..820beed 100644 --- a/silence_detector.vhd +++ b/silence_detector.vhd @@ -53,7 +53,7 @@ begin pulse_out => interval ); - process (last_d, d, clk, sos, silent_thresh, silence) + process (last_d, d, clk, sos, silent_thresh, silence, n_reset) begin if n_reset = '0' then silence <= (others => '0'); @@ -74,7 +74,7 @@ begin end if; end process; - process (clk, sos, interval, valid_thresh, validity) + process (clk, sos, interval, valid_thresh, validity, n_reset) begin if n_reset = '0' then validity <= (others => '0'); -- cgit v1.2.3