/** @defgroup ethernet_mac_stm32fxx7_defines MAC STM32Fxx7 Defines
*
* @brief Defined Constants and Types for the Ethernet MAC for STM32Fxx7
* chips
*
* @ingroup ETH
*
* @version 1.0.0
*
* @author @htmlonly © @endhtmlonly 2013 Frantisek Burian
*
* @date 1 September 2013
*
* LGPL License Terms @ref lgpl_license
*/
/*
* This file is part of the libopencm3 project.
*
* Copyright (C) 2013 Frantisek Burian
*
* This library is free software: you can redistribute it and/or modify
* it under the terms of the GNU Lesser General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public License
* along with this library. If not, see .
*/
#ifndef LIBOPENCM3_ETHERNET_H
#define LIBOPENCM3_ETHERNET_H
#include
#include
/**@{*/
/* Ethernet MAC registers */
#define ETH_MACCR MMIO32(ETHERNET_BASE + 0x00)
#define ETH_MACFFR MMIO32(ETHERNET_BASE + 0x04)
#define ETH_MACHTHR MMIO32(ETHERNET_BASE + 0x08)
#define ETH_MACHTLR MMIO32(ETHERNET_BASE + 0x0C)
#define ETH_MACMIIAR MMIO32(ETHERNET_BASE + 0x10)
#define ETH_MACMIIDR MMIO32(ETHERNET_BASE + 0x14)
#define ETH_MACFCR MMIO32(ETHERNET_BASE + 0x18)
#define ETH_MACVLANTR MMIO32(ETHERNET_BASE + 0x1C)
#define ETH_MACRWUFFR MMIO32(ETHERNET_BASE + 0x28)
#define ETH_MACPMTCSR MMIO32(ETHERNET_BASE + 0x2C)
/* not available on F1 ?*/
#define ETH_MACDBGR MMIO32(ETHERNET_BASE + 0x34)
#define ETH_MACSR MMIO32(ETHERNET_BASE + 0x38)
#define ETH_MACIMR MMIO32(ETHERNET_BASE + 0x3C)
/* i=[0..3] */
#define ETH_MACAHR(i) MMIO32(ETHERNET_BASE + 0x40+i*8)
/* i=[0..3] */
#define ETH_MACALR(i) MMIO32(ETHERNET_BASE + 0x44+i*8)
/* Ethernet MMC registers */
#define ETH_MMCCR MMIO32(ETHERNET_BASE + 0x100)
#define ETH_MMCRIR MMIO32(ETHERNET_BASE + 0x104)
#define ETH_MMCTIR MMIO32(ETHERNET_BASE + 0x108)
#define ETH_MMCRIMR MMIO32(ETHERNET_BASE + 0x10C)
#define ETH_MMCTIMR MMIO32(ETHERNET_BASE + 0x110)
#define ETH_MMCTGFSCCR MMIO32(ETHERNET_BASE + 0x14C)
#define ETH_MMCTGFMSCCR MMIO32(ETHERNET_BASE + 0x150)
#define ETH_MMCTGFCR MMIO32(ETHERNET_BASE + 0x168)
#define ETH_MMCRFCECR MMIO32(ETHERNET_BASE + 0x194)
#define ETH_MMCRFAECR MMIO32(ETHERNET_BASE + 0x198)
#define ETH_MMCRGUFCR MMIO32(ETHERNET_BASE + 0x1C4)
/* Ethrenet IEEE 1588 time stamp registers */
#define ETH_PTPTSCR MMIO32(ETHERNET_BASE + 0x700)
#define ETH_PTPSSIR MMIO32(ETHERNET_BASE + 0x704)
#define ETH_PTPTSHR MMIO32(ETHERNET_BASE + 0x708)
#define ETH_PTPTSLR MMIO32(ETHERNET_BASE + 0x70C)
#define ETH_PTPTSHUR MMIO32(ETHERNET_BASE + 0x710)
#define ETH_PTPTSLUR MMIO32(ETHERNET_BASE + 0x714)
#define ETH_PTPTSAR MMIO32(ETHERNET_BASE + 0x718)
#define ETH_PTPTTHR MMIO32(ETHERNET_BASE + 0x71C)
#define ETH_PTPTTLR MMIO32(ETHERNET_BASE + 0x720)
/* not available on F1 ?*/
#define ETH_PTPTSSR MMIO32(ETHERNET_BASE + 0x728)
/* Ethernet DMA registers */
#define ETH_DMABMR MMIO32(ETHERNET_BASE + 0x1000)
#define ETH_DMATPDR MMIO32(ETHERNET_BASE + 0x1004)
#define ETH_DMARPDR MMIO32(ETHERNET_BASE + 0x1008)
#define ETH_DMARDLAR MMIO32(ETHERNET_BASE + 0x100C)
#define ETH_DMATDLAR MMIO32(ETHERNET_BASE + 0x1010)
#define ETH_DMASR MMIO32(ETHERNET_BASE + 0x1014)
#define ETH_DMAOMR MMIO32(ETHERNET_BASE + 0x1018)
#define ETH_DMAIER MMIO32(ETHERNET_BASE + 0x101C)
#define ETH_DMAMFBOCR MMIO32(ETHERNET_BASE + 0x1020)
#define ETH_DMACHTDR MMIO32(ETHERNET_BASE + 0x1048)
#define ETH_DMACHRDR MMIO32(ETHERNET_BASE + 0x104C)
#define ETH_DMACHTBAR MMIO32(ETHERNET_BASE + 0x1050)
#define ETH_DMACHRBAR MMIO32(ETHERNET_BASE + 0x1054)
/* Ethernet Buffer Descriptors */
#define ETH_DES(n, base) MMIO32((base) + (n)*4)
#define ETH_DES0(base) ETH_DES(0, base)
#define ETH_DES1(base) ETH_DES(1, base)
#define ETH_DES2(base) ETH_DES(2, base)
#define ETH_DES3(base) ETH_DES(3, base)
/* Ethernet Extended buffer Descriptors */
#define ETH_DES4(base) ETH_DES(4, base)
#define ETH_DES5(base) ETH_DES(5, base)
#define ETH_DES6(base) ETH_DES(6, base)
#define ETH_DES7(base) ETH_DES(7, base)
/*---------------------------------------------------------------------------*/
/* MACCR --------------------------------------------------------------------*/
#define ETH_MACCR_RE (1<<2)
#define ETH_MACCR_TE (1<<3)
#define ETH_MACCR_DC (1<<4)
#define ETH_MACCR_BL_SHIFT 5
#define ETH_MACCR_BL (3 << ETH_MACCR_BL_SHIFT)
#define ETH_MACCR_BL_MIN10 (0 << ETH_MACCR_BL_SHIFT)
#define ETH_MACCR_BL_MIN8 (1 << ETH_MACCR_BL_SHIFT)
#define ETH_MACCR_BL_MIN4 (2 << ETH_MACCR_BL_SHIFT)
#define ETH_MACCR_BL_MIN1 (3 << ETH_MACCR_BL_SHIFT)
#define ETH_MACCR_APCS (1<<7)
#define ETH_MACCR_RD (1<<9)
#define ETH_MACCR_IPCO (1<<10)
#define ETH_MACCR_DM (1<<11)
#define ETH_MACCR_LM (1<<12)
#define ETH_MACCR_ROD (1<<13)
#define ETH_MACCR_FES (1<<14)
#define ETH_MACCR_CSD (1<<16)
#define ETH_MACCR_IFG_SHIFT 17
#define ETH_MACCR_IFG (7<