From 849369d6c66d3054688672f97d31fceb8e8230fb Mon Sep 17 00:00:00 2001
From: root <root@artemis.panaceas.org>
Date: Fri, 25 Dec 2015 04:40:36 +0000
Subject: initial_commit

---
 arch/arm/mach-orion5x/irq.c | 41 +++++++++++++++++++++++++++++++++++++++++
 1 file changed, 41 insertions(+)
 create mode 100644 arch/arm/mach-orion5x/irq.c

(limited to 'arch/arm/mach-orion5x/irq.c')

diff --git a/arch/arm/mach-orion5x/irq.c b/arch/arm/mach-orion5x/irq.c
new file mode 100644
index 00000000..43cf8bc9
--- /dev/null
+++ b/arch/arm/mach-orion5x/irq.c
@@ -0,0 +1,41 @@
+/*
+ * arch/arm/mach-orion5x/irq.c
+ *
+ * Core IRQ functions for Marvell Orion System On Chip
+ *
+ * Maintainer: Tzachi Perelstein <tzachi@marvell.com>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/irq.h>
+#include <linux/io.h>
+#include <asm/gpio.h>
+#include <mach/bridge-regs.h>
+#include <plat/irq.h>
+#include "common.h"
+
+static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
+{
+	BUG_ON(irq < IRQ_ORION5X_GPIO_0_7 || irq > IRQ_ORION5X_GPIO_24_31);
+
+	orion_gpio_irq_handler((irq - IRQ_ORION5X_GPIO_0_7) << 3);
+}
+
+void __init orion5x_init_irq(void)
+{
+	orion_irq_init(0, (void __iomem *)MAIN_IRQ_MASK);
+
+	/*
+	 * Initialize gpiolib for GPIOs 0-31.
+	 */
+	orion_gpio_init(0, 32, GPIO_VIRT_BASE, 0, IRQ_ORION5X_GPIO_START);
+	irq_set_chained_handler(IRQ_ORION5X_GPIO_0_7, gpio_irq_handler);
+	irq_set_chained_handler(IRQ_ORION5X_GPIO_8_15, gpio_irq_handler);
+	irq_set_chained_handler(IRQ_ORION5X_GPIO_16_23, gpio_irq_handler);
+	irq_set_chained_handler(IRQ_ORION5X_GPIO_24_31, gpio_irq_handler);
+}
-- 
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