From 849369d6c66d3054688672f97d31fceb8e8230fb Mon Sep 17 00:00:00 2001 From: root Date: Fri, 25 Dec 2015 04:40:36 +0000 Subject: initial_commit --- arch/arm/mach-omap2/wd_timer.c | 56 ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 56 insertions(+) create mode 100644 arch/arm/mach-omap2/wd_timer.c (limited to 'arch/arm/mach-omap2/wd_timer.c') diff --git a/arch/arm/mach-omap2/wd_timer.c b/arch/arm/mach-omap2/wd_timer.c new file mode 100644 index 00000000..4067669d --- /dev/null +++ b/arch/arm/mach-omap2/wd_timer.c @@ -0,0 +1,56 @@ +/* + * OMAP2+ MPU WD_TIMER-specific code + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include +#include +#include + +#include + +#include "wd_timer.h" + +/* + * In order to avoid any assumptions from bootloader regarding WDT + * settings, WDT module is reset during init. This enables the watchdog + * timer. Hence it is required to disable the watchdog after the WDT reset + * during init. Otherwise the system would reboot as per the default + * watchdog timer registers settings. + */ +#define OMAP_WDT_WPS 0x34 +#define OMAP_WDT_SPR 0x48 + + +int omap2_wd_timer_disable(struct omap_hwmod *oh) +{ + void __iomem *base; + + if (!oh) { + pr_err("%s: Could not look up wdtimer_hwmod\n", __func__); + return -EINVAL; + } + + base = omap_hwmod_get_mpu_rt_va(oh); + if (!base) { + pr_err("%s: Could not get the base address for %s\n", + oh->name, __func__); + return -EINVAL; + } + + /* sequence required to disable watchdog */ + __raw_writel(0xAAAA, base + OMAP_WDT_SPR); + while (__raw_readl(base + OMAP_WDT_WPS) & 0x10) + cpu_relax(); + + __raw_writel(0x5555, base + OMAP_WDT_SPR); + while (__raw_readl(base + OMAP_WDT_WPS) & 0x10) + cpu_relax(); + + return 0; +} + -- cgit v1.2.3