#!/usr/bin/env python3 import argparse import json import sys from os import path tiletype_names = dict() parser = argparse.ArgumentParser(description="import MachXO2 routing and bels from Project Trellis") parser.add_argument("device", type=str, help="target device") parser.add_argument("-p", "--constids", type=str, help="path to constids.inc") parser.add_argument("-g", "--gfxh", type=str, help="path to gfx.h (unused)") parser.add_argument("-L", "--libdir", type=str, action="append", help="extra Python library path") args = parser.parse_args() sys.path += args.libdir import pytrellis import database # Get the index for a tiletype def get_tiletype_index(name): if name in tiletype_names: return tiletype_names[name] idx = len(tiletype_names) tiletype_names[name] = idx return idx constids = dict() class BinaryBlobAssembler: def l(self, name, ltype = None, export = False): if ltype is None: print("label %s" % (name,)) else: print("label %s %s" % (name, ltype)) def r(self, name, comment): if comment is None: print("ref %s" % (name,)) else: print("ref %s %s" % (name, comment)) def s(self, s, comment): assert "|" not in s print("str |%s| %s" % (s, comment)) def u8(self, v, comment): if comment is None: print("u8 %d" % (v,)) else: print("u8 %d %s" % (v, comment)) def u16(self, v, comment): if comment is None: print("u16 %d" % (v,)) else: print("u16 %d %s" % (v, comment)) def u32(self, v, comment): if comment is None: print("u32 %d" % (v,)) else: print("u32 %d %s" % (v, comment)) def pre(self, s): print("pre %s" % s) def post(self, s): print("post %s" % s) def push(self, name): print("push %s" % name) def pop(self): print("pop") def get_bel_index(rg, loc, name): tile = rg.tiles[loc] idx = 0 for bel in tile.bels: if rg.to_str(bel.name) == name: return idx idx += 1 # FIXME: I/O pins can be missing in various rows. Is there a nice way to # assert on each device size? return None packages = {} pindata = [] def process_pio_db(rg, device): piofile = path.join(database.get_db_root(), "MachXO2", dev_names[device], "iodb.json") with open(piofile, 'r') as f: piodb = json.load(f) for pkgname, pkgdata in sorted(piodb["packages"].items()): pins = [] for name, pinloc in sorted(pkgdata.items()): x = pinloc["col"] y = pinloc["row"] if x == 0 or x == max_col: # FIXME: Oversight in read_pinout.py. We use 0-based # columns for 0 and max row, but we otherwise extract # the names from the CSV, and... loc = pytrellis.Location(x, y) else: # Lattice uses 1-based columns! loc = pytrellis.Location(x - 1, y) pio = "PIO" + pinloc["pio"] bel_idx = get_bel_index(rg, loc, pio) if bel_idx is not None: pins.append((name, loc, bel_idx)) packages[pkgname] = pins for metaitem in piodb["pio_metadata"]: x = metaitem["col"] y = metaitem["row"] if x == 0 or x == max_col: loc = pytrellis.Location(x, y) else: loc = pytrellis.Location(x - 1, y) pio = "PIO" + metaitem["pio"] bank = metaitem["bank"] if "function" in metaitem: pinfunc = metaitem["function"] else: pinfunc = None dqs = -1 if "dqs" in metaitem: pass # tdqs = metaite
module \$add (A, B, Y);
parameter A_SIGNED = 0;
parameter B_SIGNED = 0;
parameter A_WIDTH = 1;
parameter B_WIDTH = 1;
parameter Y_WIDTH = 1;
input [A_WIDTH-1:0] A;
input [B_WIDTH-1:0] B;
output [Y_WIDTH-1:0] Y;
parameter _TECHMAP_BITS_CONNMAP_ = 0;
parameter _TECHMAP_CONNMAP_A_ = 0;
parameter _TECHMAP_CONNMAP_B_ = 0;
wire _TECHMAP_FAIL_ = A_WIDTH != B_WIDTH || B_WIDTH < Y_WIDTH ||
_TECHMAP_CONNMAP_A_ != _TECHMAP_CONNMAP_B_;
assign Y = A << 1;
endmodule