iCE40/yosys - clone of https://github.com/YosysHQ/yosys

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path: root/passes/techmap/Makefile.inc

<

OBJS += frontends/ast/ast.o
OBJS += frontends/ast/simplify.o
OBJS += frontends/ast/genrtlil.o
OBJS += frontends/ast/dpicall.o

	Commit message (Expand)	Author	Age	Files	Lines
*	Improvements in ABCEXTERNAL handling	Clifford Wolf

skeletonClifford Wolf2014-09-141-0/+1 * Added "maccmap" commandClifford Wolf2014-09-071-0/+1 * Renamed "stdcells.v" to "techmap.v"Clifford Wolf2014-07-311-3/+3 * Added "make SMALL=1"Clifford Wolf2014-07-241-1/+4 * Added "make PRETTY=1"Clifford Wolf2014-07-241-6/+6 * OSX compatible creation of stdcells.inc, using code from github.com/Siesh1oo/...Clifford Wolf2014-03-111-2/+3 * Moved some passes to other source directoriesClifford Wolf2014-02-081-0/+1 * Added hilomap commandClifford Wolf2014-01-191-0/+1 * Added simplemap passClifford Wolf2013-11-241-0/+1 * Added iopadmap passClifford Wolf2013-10-161-0/+1 * Moved dfflibmap from passes/dfflibmap to passes/techmapClifford Wolf2013-10-161-1/+10 * Moved common techlib files to techlibs/commonClifford Wolf2013-09-151-1/+1 * Removed date from auto-generated passes/techmap/stdcells.incClifford Wolf2013-03-181-2/+1 * add header to autogenerated file on its originJohann Glaser2013-03-181-1/+3 * initial importClifford Wolf2013-01-051-0/+11