module switch_fabric( clk, reset, data_in0, data_in1, data_in2, data_in3, data_in4, data_in5, data_in_valid0, data_in_valid1, data_in_valid2, data_in_valid3, data_in_valid4, data_in_valid5, data_out0, data_out1, data_out2, data_out3, data_out4, data_out5, data_out_ack0, data_out_ack1, data_out_ack2, data_out_ack3, data_out_ack4, data_out_ack5 ); input clk, reset; input [7:0] data_in0, data_in1, data_in2, data_in3; input [7:0] data_in4, data_in5; input data_in_valid0, data_in_valid1, data_in_valid2; input [7:0] data_in_valid3, data_in_valid4, data_in_valid5; output [7:0] data_out0, data_out1, data_out2, data_out3; output [7:0] data_out4, data_out5; output data_out_ack0, data_out_ack1, data_out_ack2; output [7:0] data_out_ack3, data_out_ack4, data_out_ack5; (* gentb_clock *) wire clk; switch port_0 ( .clk(clk), .reset(reset), .data_in(data_in0), .data_in_valid(data_in_valid0), .data_out(data_out0), .data_out_ack(data_out_ack0)); switch port_1 ( .clk(clk), .reset(reset), .data_in(data_in1), .data_in_valid(data_in_valid1), .data_out(data_out1), .data_out_ack(data_out_ack1)); switch port_2 ( .clk(clk), .reset(reset), .data_in(data_in2), .data_in_valid(data_in_valid2), .data_out(data_out2), . data_out_ack(data_out_ack2)); switch port_3 ( .clk(clk), .reset(reset), .data_in(data_in3), .data_in_valid(data_in_valid3), .data_out(data_out3), .data_out_ack(data_out_ack3)); switch port_4 ( .clk(clk), .reset(reset), .data_in(data_in4), .data_in_valid(data_in_valid4), .data_out(data_out4), .data_out_ack(data_out_ack4)); switch port_5 ( .clk(clk), .reset(reset), .data_in(data_in5), .data_in_valid(data_in_valid5), .data_out(data_out5), .data_out_ack(data_out_ack5)); endmodule module switch ( clk, reset, data_in, data_in_valid, data_out, data_out_ack ); input clk; input reset; input [7:0] data_in; input data_in_valid; output [7:0] data_out; output data_out_ack; reg [7:0] data_out; reg data_out_ack; always @ (posedge clk) if (reset) begin data_out <= 0; data_out_ack <= 0; end else if (data_in_valid) begin data_out <= data_in; data_out_ack <= 1; end else begin data_out <= 0; data_out_ack <= 0; end endmodule wrt/upstream/commit/target/linux/adm5120/files/arch/mips/adm5120/osbridge/5gxi.c?id=0c5feac5731052fea718ebf350b13d9eaaefc432'>commitdiffstats
path: root/target/linux/adm5120/files/arch/mips/adm5120/osbridge/5gxi.c
blob: a5c2c3653ecbd76ad7242cea5cf5d8767a832748 (plain) 
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/*
 *  OSBRiDGE 5GXi/5XLi board support
 *
 *  Copyright (C) 2009 Gabor Juhos <juhosg@openwrt.org>
 *
 *  This program is free software; you can redistribute it and/or modify it
 *  under the terms of the GNU General Public License version 2 as published
 *  by the Free Software Foundation.
 *
 */
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/gpio.h>
#include <linux/irq.h>
#include <linux/etherdevice.h>

#include <asm/mips_machine.h>

#include <asm/mach-adm5120/adm5120_defs.h>
#include <asm/mach-adm5120/adm5120_platform.h>
#include <asm/mach-adm5120/adm5120_info.h>

static struct mtd_partition osbridge_5gxi_partitions[] = {
	{
		.name	= "bootloader",
		.offset	= 0,
		.size	= 64*1024,
		.mask_flags = MTD_WRITEABLE,
	} , {
		.name	= "boardcfg",
		.offset	= 64*1024,
		.size	= 64*1024,
	} , {
		.name	= "firmware",
		.offset	= MTDPART_OFS_APPEND,
		.size	= MTDPART_SIZ_FULL,
	}
};

static struct gpio_led osbridge_5gxi_gpio_leds[] __initdata = {
	GPIO_LED_INV(ADM5120_GPIO_PIN6, "5gxi:green:user",	NULL),
	GPIO_LED_INV(ADM5120_GPIO_P0L0, "5gxi:yellow:lan",	NULL),
};

static struct adm5120_pci_irq osbridge_5gxi_pci_irqs[] __initdata = {
	PCIIRQ(2, 0, 1, ADM5120_IRQ_PCI0),
};

static u8 osbridge_5gxi_vlans[6] __initdata = {
	0x41, 0x00, 0x00, 0x00, 0x00, 0x00
};

static void __init osbridge_5gxi_setup(void)
{
	adm5120_flash0_data.nr_parts = ARRAY_SIZE(osbridge_5gxi_partitions);
	adm5120_flash0_data.parts = osbridge_5gxi_partitions;

	adm5120_add_device_uart(0);
	adm5120_add_device_uart(1);

	adm5120_add_device_flash(0);

	adm5120_add_device_switch(1, osbridge_5gxi_vlans);
	adm5120_add_device_gpio_leds(ARRAY_SIZE(osbridge_5gxi_gpio_leds),
					osbridge_5gxi_gpio_leds);
	adm5120_pci_set_irq_map(ARRAY_SIZE(osbridge_5gxi_pci_irqs),
				osbridge_5gxi_pci_irqs);
}

MIPS_MACHINE(MACH_ADM5120_5GXI, "5GXi", "OSBRiDGE 5GXi/5XLi board",
	     osbridge_5gxi_setup);