/techlibs/xilinx/
../
.gitignore
Makefile.inc
abc9_map.v
abc9_model.v
abc9_unmap.v
abc9_xc7.box
abc9_xc7.lut
abc9_xc7_nowide.lut
arith_map.v
brams_init.py
cells_map.v
cells_sim.v
cells_xtra.py
cells_xtra.v
lut4_lutrams.txt
lut6_lutrams.txt
lut_map.v
lutrams_map.v
mux_map.v
synth_xilinx.cc
tests
xc2v_brams.txt
xc2v_brams_map.v
xc3s_mult_map.v
xc3sa_brams.txt
xc3sda_brams.txt
xc3sda_dsp_map.v
xc4v_dsp_map.v
xc5v_dsp_map.v
xc6s_brams.txt
xc6s_brams_map.v
xc6s_dsp_map.v
xc6s_ff_map.v
xc7_brams_map.v
xc7_dsp_map.v
xc7_ff_map.v
xc7_xcu_brams.txt
xcu_brams_map.v
xcu_dsp_map.v
xcup_urams.txt
xcup_urams_map.v
xilinx_dffopt.cc