Source of the files: http://www.asic-world.com/examples/verilog/lfsr.html Run first: runme_presynth Generate output netlist with run_max10 or run_cycloneiv Then, check with: runme_postsynth tom feed' href='http://git.panaceas.org/cgit.cgi/iCE40/abc/atom/src/base/io/ioWriteBench.c?h=yosys-experimental' type='application/atom+xml'/>
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index : iCE40/abc | |
| clone of https://github.com/YosysHQ/abc |
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