From dd6d34f461910a120ac95c485fe34cca6485b95e Mon Sep 17 00:00:00 2001
From: gatecat <gatecat@ds0.me>
Date: Wed, 17 Mar 2021 12:06:09 +0000
Subject: blackbox: Include whiteboxed modules

Signed-off-by: gatecat <gatecat@ds0.me>
---
 tests/various/blackbox_wb.ys | 14 ++++++++++++++
 1 file changed, 14 insertions(+)
 create mode 100644 tests/various/blackbox_wb.ys

(limited to 'tests')

diff --git a/tests/various/blackbox_wb.ys b/tests/various/blackbox_wb.ys
new file mode 100644
index 000000000..f9c9bec06
--- /dev/null
+++ b/tests/various/blackbox_wb.ys
@@ -0,0 +1,14 @@
+read_verilog <<EOT
+(* whitebox *)
+module box(input a, output q);
+assign q = ~a;
+endmodule
+
+module top(input a, output q);
+box box_i(.a(a), .q(q));
+endmodule
+EOT
+select -assert-count 1 =box/t:$not
+blackbox =box
+select -assert-count 0 =A:whitebox
+select -assert-count 0 =box/t:$not
-- 
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