From 589775538c23975d79aa21050557a37b76acb1dd Mon Sep 17 00:00:00 2001 From: Eddie Hung Date: Mon, 11 May 2020 09:33:11 -0700 Subject: tests: add #2037 testcase --- tests/verilog/bug2037.ys | 9 +++++++++ 1 file changed, 9 insertions(+) create mode 100644 tests/verilog/bug2037.ys (limited to 'tests') diff --git a/tests/verilog/bug2037.ys b/tests/verilog/bug2037.ys new file mode 100644 index 000000000..afe92022e --- /dev/null +++ b/tests/verilog/bug2037.ys @@ -0,0 +1,9 @@ +logger -expect warning "Attribute\(s\) attached to null statement\. Ignoring\." 1 +logger -expect-no-warnings +read_verilog < Date: Mon, 11 May 2020 10:26:08 -0700 Subject: tests: add an generate-else test too --- tests/verilog/bug2037.ys | 34 ++++++++++++++++++++++++++++++++++ 1 file changed, 34 insertions(+) (limited to 'tests') diff --git a/tests/verilog/bug2037.ys b/tests/verilog/bug2037.ys index afe92022e..42c4b8f5d 100644 --- a/tests/verilog/bug2037.ys +++ b/tests/verilog/bug2037.ys @@ -7,3 +7,37 @@ module test (); if (y) (* foo *) ; endmodule EOT + + +design -reset +logger -expect warning "Attribute\(s\) attached to null statement\. Ignoring\." 3 # cumulative +logger -expect-no-warnings +read_verilog < Date: Thu, 14 May 2020 10:46:40 -0700 Subject: verilog: do not warn for attributes on null statements --- tests/verilog/bug2037.ys | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'tests') diff --git a/tests/verilog/bug2037.ys b/tests/verilog/bug2037.ys index 42c4b8f5d..eb4f0fac4 100644 --- a/tests/verilog/bug2037.ys +++ b/tests/verilog/bug2037.ys @@ -1,4 +1,3 @@ -logger -expect warning "Attribute\(s\) attached to null statement\. Ignoring\." 1 logger -expect-no-warnings read_verilog < Date: Thu, 14 May 2020 16:32:14 -0700 Subject: test: add attribute-before-stmt test from @nakengelhardt --- tests/verilog/bug2037.ys | 15 +++++++++++++++ 1 file changed, 15 insertions(+) (limited to 'tests') diff --git a/tests/verilog/bug2037.ys b/tests/verilog/bug2037.ys index eb4f0fac4..4b629ba92 100644 --- a/tests/verilog/bug2037.ys +++ b/tests/verilog/bug2037.ys @@ -41,3 +41,18 @@ module test (); endmodule EOT select -assert-none a:* + + +design -reset +read_verilog <