From 9c5ceb5b4f7aea169c8d9ffd2411c6f4eb3e49d5 Mon Sep 17 00:00:00 2001 From: Eddie Hung Date: Tue, 7 Jan 2020 11:44:03 -0800 Subject: tests/aiger: write Yosys output --- tests/aiger/run-test.sh | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'tests') diff --git a/tests/aiger/run-test.sh b/tests/aiger/run-test.sh index deaf48a3d..8e932b091 100755 --- a/tests/aiger/run-test.sh +++ b/tests/aiger/run-test.sh @@ -33,7 +33,7 @@ design -import gold -as gold design -import gate -as gate miter -equiv -flatten -make_assert -make_outputs gold gate miter sat -verify -prove-asserts -show-ports -seq 16 miter -" +" -l ${aag}.log done for aig in *.aig; do @@ -50,5 +50,5 @@ design -import gold -as gold design -import gate -as gate miter -equiv -flatten -make_assert -make_outputs gold gate miter sat -verify -prove-asserts -show-ports -seq 16 miter -" +" -l ${aig}.log done -- cgit v1.2.3 From 9ec948f3965eef214bee3af778b67fdd6ee86929 Mon Sep 17 00:00:00 2001 From: Eddie Hung Date: Mon, 13 Jan 2020 19:07:55 -0800 Subject: write_xaiger: add support and test for (* keep *) on wires --- tests/techmap/abc9.ys | 13 +++++++++++++ 1 file changed, 13 insertions(+) (limited to 'tests') diff --git a/tests/techmap/abc9.ys b/tests/techmap/abc9.ys index 20f263da8..46b6f08d2 100644 --- a/tests/techmap/abc9.ys +++ b/tests/techmap/abc9.ys @@ -38,3 +38,16 @@ abc9 -lut 4 design -load gold scratchpad -copy abc9.script.flow3 abc9.script abc9 -lut 4 + +design -reset +read_verilog < Date: Mon, 13 Jan 2020 19:21:11 -0800 Subject: abc9: respect (* keep *) on cells --- tests/techmap/abc9.ys | 15 +++++++++++++++ 1 file changed, 15 insertions(+) (limited to 'tests') diff --git a/tests/techmap/abc9.ys b/tests/techmap/abc9.ys index 46b6f08d2..d5a63e1cb 100644 --- a/tests/techmap/abc9.ys +++ b/tests/techmap/abc9.ys @@ -51,3 +51,18 @@ simplemap equiv_opt -assert abc9 -lut 4 design -load postopt select -assert-count 2 t:$lut + +design -reset +read_verilog -icells < Date: Tue, 21 Jan 2020 09:43:04 -0800 Subject: write_xaiger: fix for (* keep *) on flop output --- tests/various/abc9.ys | 15 +++++++++++++++ 1 file changed, 15 insertions(+) (limited to 'tests') diff --git a/tests/various/abc9.ys b/tests/various/abc9.ys index 81d0afd1b..0c7695089 100644 --- a/tests/various/abc9.ys +++ b/tests/various/abc9.ys @@ -14,6 +14,7 @@ design -import gate -as gate miter -equiv -flatten -make_assert -make_outputs gold gate miter sat -verify -prove-asserts -show-ports miter + design -load read hierarchy -top abc9_test028 proc @@ -23,6 +24,7 @@ select -assert-count 1 t:$lut r:LUT=2'b01 r:WIDTH=1 %i %i select -assert-count 1 t:unknown select -assert-none t:$lut t:unknown %% t: %D + design -load read hierarchy -top abc9_test032 proc @@ -38,3 +40,16 @@ design -import gate -as gate miter -equiv -flatten -make_assert -make_outputs gold gate miter sat -seq 10 -verify -prove-asserts -show-ports miter + + +design -reset +read_verilog -icells < Date: Thu, 23 Jan 2020 18:53:14 -0800 Subject: abc_box_id -> abc9_box_id in test --- tests/simple_abc9/abc9.v | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'tests') diff --git a/tests/simple_abc9/abc9.v b/tests/simple_abc9/abc9.v index 8afd0ce96..ee01ab5dc 100644 --- a/tests/simple_abc9/abc9.v +++ b/tests/simple_abc9/abc9.v @@ -213,7 +213,7 @@ module arbiter (clk, rst, request, acknowledge, grant, grant_valid, grant_encode input rst; endmodule -(* abc_box_id=1 *) +(* abc9_box_id=1 *) module MUXF8(input I0, I1, S, output O); endmodule -- cgit v1.2.3 From 11e50c0e9ecec6439d44064a0e1a016dc2b3188b Mon Sep 17 00:00:00 2001 From: Eddie Hung Date: Thu, 23 Jan 2020 18:56:25 -0800 Subject: Test for (* keep *)-ed abc9_box_id --- tests/simple_abc9/abc9.v | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) (limited to 'tests') diff --git a/tests/simple_abc9/abc9.v b/tests/simple_abc9/abc9.v index ee01ab5dc..52ccb3e1d 100644 --- a/tests/simple_abc9/abc9.v +++ b/tests/simple_abc9/abc9.v @@ -291,3 +291,19 @@ module abc9_test035(input clk, d, output reg [1:0] q); always @(posedge clk) q[0] <= d; always @(negedge clk) q[1] <= q[0]; endmodule + +module abc9_test036(input A, B, S, output [1:0] O); + (* keep *) + MUXF8 m ( + .I0(I0), + .I1(I1), + .O(O[0]), + .S(S) + ); + MUXF8 m2 ( + .I0(I0), + .I1(I1), + .O(O[1]), + .S(S) + ); +endmodule -- cgit v1.2.3 From dca1c806eca0219fb609acfd111fbf9073c6908f Mon Sep 17 00:00:00 2001 From: Eddie Hung Date: Thu, 23 Jan 2020 19:55:11 -0800 Subject: simple_abc9 tests to discard whitebox before write for sim --- tests/simple_abc9/abc9.v | 2 +- tests/simple_abc9/run-test.sh | 3 ++- 2 files changed, 3 insertions(+), 2 deletions(-) (limited to 'tests') diff --git a/tests/simple_abc9/abc9.v b/tests/simple_abc9/abc9.v index 52ccb3e1d..e5837d480 100644 --- a/tests/simple_abc9/abc9.v +++ b/tests/simple_abc9/abc9.v @@ -213,7 +213,7 @@ module arbiter (clk, rst, request, acknowledge, grant, grant_valid, grant_encode input rst; endmodule -(* abc9_box_id=1 *) +(* abc9_box_id=1, whitebox *) module MUXF8(input I0, I1, S, output O); endmodule diff --git a/tests/simple_abc9/run-test.sh b/tests/simple_abc9/run-test.sh index bc921daa9..32d7a80ca 100755 --- a/tests/simple_abc9/run-test.sh +++ b/tests/simple_abc9/run-test.sh @@ -28,4 +28,5 @@ exec ${MAKE:-make} -f ../tools/autotest.mk $seed *.v *.sv EXTRA_FLAGS="-n 300 -p abc9 -lut 4 -box ../abc.box; \ clean; \ check -assert; \ - select -assert-none t:${DOLLAR}_NOT_ t:${DOLLAR}_AND_ %%'" + select -assert-none t:${DOLLAR}_NOT_ t:${DOLLAR}_AND_ %%; \ + setattr -mod -unset whitebox'" -- cgit v1.2.3