From b2e9717419e9a852f4e64f12891b8e9742900917 Mon Sep 17 00:00:00 2001
From: Zachary Snow <zach@zachjs.com>
Date: Tue, 31 Aug 2021 11:45:02 -0600
Subject: sv: support declaration in generate for initialization

This is accomplished by generating a unique name for the genvar,
renaming references to the genvar only in the loop's initialization,
guard, and incrementation, and finally adding a localparam inside the
loop body with the original name so that the genvar can be shadowed as
expected.
---
 tests/verilog/genvar_loop_decl_3.ys | 5 +++++
 1 file changed, 5 insertions(+)
 create mode 100644 tests/verilog/genvar_loop_decl_3.ys

(limited to 'tests/verilog/genvar_loop_decl_3.ys')

diff --git a/tests/verilog/genvar_loop_decl_3.ys b/tests/verilog/genvar_loop_decl_3.ys
new file mode 100644
index 000000000..19f754124
--- /dev/null
+++ b/tests/verilog/genvar_loop_decl_3.ys
@@ -0,0 +1,5 @@
+read_verilog -sv genvar_loop_decl_3.sv
+proc
+equiv_make gold gate equiv
+equiv_simple
+equiv_status -assert
-- 
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