From 7a36728b2fd640e166188b05c901b1992ec2af6b Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Marcelina=20Ko=C5=9Bcielnicka?= <mwk@0x04.net>
Date: Tue, 14 Apr 2020 16:33:09 +0200
Subject: dffinit: Avoid setting init parameter to zero-length value.

Fixes #1704.
---
 tests/techmap/dffinit.ys | 25 +++++++++++++++++++++++++
 1 file changed, 25 insertions(+)
 create mode 100644 tests/techmap/dffinit.ys

(limited to 'tests/techmap')

diff --git a/tests/techmap/dffinit.ys b/tests/techmap/dffinit.ys
new file mode 100644
index 000000000..218d411f8
--- /dev/null
+++ b/tests/techmap/dffinit.ys
@@ -0,0 +1,25 @@
+read_verilog <<EOT
+
+module ff(...);
+input d;
+output q;
+
+endmodule
+
+module top(...);
+input d;
+output q1;
+(* init = 1'b1 *)
+output q2;
+
+ff my_ff1(.d(d), .q(q1));
+ff my_ff2(.d(d), .q(q2));
+
+endmodule
+
+EOT
+
+dffinit -ff ff q init
+select -assert-count 2 t:ff
+select -assert-count 1 t:ff r:init %i
+select -assert-count 1 t:ff r:init=1'b1 %i
-- 
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