From 4a942ba7b9bb76f207adf23369f46d31f7607b75 Mon Sep 17 00:00:00 2001
From: whitequark <whitequark@whitequark.org>
Date: Mon, 19 Aug 2019 16:44:23 +0000
Subject: proc_clean: fix order of switch insertion.

Fixes #1268.
---
 tests/proc/.gitignore  |  1 +
 tests/proc/bug_1268.v  | 23 +++++++++++++++++++++++
 tests/proc/bug_1268.ys |  5 +++++
 tests/proc/run-test.sh |  6 ++++++
 4 files changed, 35 insertions(+)
 create mode 100644 tests/proc/.gitignore
 create mode 100644 tests/proc/bug_1268.v
 create mode 100644 tests/proc/bug_1268.ys
 create mode 100755 tests/proc/run-test.sh

(limited to 'tests/proc')

diff --git a/tests/proc/.gitignore b/tests/proc/.gitignore
new file mode 100644
index 000000000..397b4a762
--- /dev/null
+++ b/tests/proc/.gitignore
@@ -0,0 +1 @@
+*.log
diff --git a/tests/proc/bug_1268.v b/tests/proc/bug_1268.v
new file mode 100644
index 000000000..698ac937a
--- /dev/null
+++ b/tests/proc/bug_1268.v
@@ -0,0 +1,23 @@
+module gold (input clock, ctrl, din, output reg dout);
+	always @(posedge clock) begin
+		if (1'b1) begin
+			if (1'b0) begin end else begin
+				dout <= 0;
+			end
+			if (ctrl)
+				dout <= din;
+		end
+	end
+endmodule
+
+module gate (input clock, ctrl, din, output reg dout);
+	always @(posedge clock) begin
+		if (1'b1) begin
+			if (1'b0) begin end else begin
+				dout <= 0;
+			end
+		end
+		if (ctrl)
+			dout <= din;
+	end
+endmodule
diff --git a/tests/proc/bug_1268.ys b/tests/proc/bug_1268.ys
new file mode 100644
index 000000000..b73e94449
--- /dev/null
+++ b/tests/proc/bug_1268.ys
@@ -0,0 +1,5 @@
+read_verilog bug_1268.v
+proc
+equiv_make gold gate equiv
+equiv_induct
+equiv_status -assert
diff --git a/tests/proc/run-test.sh b/tests/proc/run-test.sh
new file mode 100755
index 000000000..44ce7e674
--- /dev/null
+++ b/tests/proc/run-test.sh
@@ -0,0 +1,6 @@
+#!/bin/bash
+set -e
+for x in *.ys; do
+  echo "Running $x.."
+  ../../yosys -ql ${x%.ys}.log $x
+done
-- 
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