From fd7921776387a05edadcc90d1300670d49a73d68 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marcelina=20Ko=C5=9Bcielnicka?= Date: Thu, 27 May 2021 20:54:29 +0200 Subject: Add v2 memory cells. --- tests/opt/bug2765.ys | 2 +- tests/opt/opt_mem_feedback.ys | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) (limited to 'tests/opt') diff --git a/tests/opt/bug2765.ys b/tests/opt/bug2765.ys index de670c2d1..fef9abb02 100644 --- a/tests/opt/bug2765.ys +++ b/tests/opt/bug2765.ys @@ -31,4 +31,4 @@ proc opt select -assert-count 2 t:$memwr opt_mem -select -assert-count 1 t:$memwr +select -assert-count 1 t:$memwr_v2 diff --git a/tests/opt/opt_mem_feedback.ys b/tests/opt/opt_mem_feedback.ys index 56078ec27..06d6e7e77 100644 --- a/tests/opt/opt_mem_feedback.ys +++ b/tests/opt/opt_mem_feedback.ys @@ -37,7 +37,7 @@ design -save preopt design -load start opt_mem_feedback -select -assert-count 1 t:$memrd +select -assert-count 1 t:$memrd_v2 memory_map design -save postopt @@ -182,7 +182,7 @@ design -save preopt design -load start opt_mem_feedback -select -assert-count 1 t:$memrd +select -assert-count 1 t:$memrd_v2 memory_map design -save postopt -- cgit v1.2.3