From 982a11c709b4b363f85ae52a127f8a98bda30a3f Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Marcelina=20Ko=C5=9Bcielnicka?= <mwk@0x04.net>
Date: Fri, 6 May 2022 16:30:56 +0200
Subject: Add memory_libmap tests.

---
 tests/memlib/memlib_wide_sp.txt | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)
 create mode 100644 tests/memlib/memlib_wide_sp.txt

(limited to 'tests/memlib/memlib_wide_sp.txt')

diff --git a/tests/memlib/memlib_wide_sp.txt b/tests/memlib/memlib_wide_sp.txt
new file mode 100644
index 000000000..7780e4f9d
--- /dev/null
+++ b/tests/memlib/memlib_wide_sp.txt
@@ -0,0 +1,22 @@
+ram block \RAM_WIDE_SP {
+	cost 2;
+	abits 6;
+	widths 1 2 5 10 20 per_port;
+	byte 5;
+	init any;
+	port srsw "A" {
+		ifdef WIDTH_MIX {
+			option "WIDTH_MIX" 1 {
+				width mix;
+			}
+		} else {
+			option "WIDTH_MIX" 0 {
+				width tied;
+			}
+		}
+		clock posedge;
+		rden;
+		rdwr old;
+		rdsrst any ungated;
+	}
+}
-- 
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