From 7764d0ba1dcf064ae487ee985c43083a0909e7f4 Mon Sep 17 00:00:00 2001 From: Clifford Wolf Date: Sat, 5 Jan 2013 11:13:26 +0100 Subject: initial import --- tests/asicworld/code_hdl_models_lfsr.v | 35 ++++++++++++++++++++++++++++++++++ 1 file changed, 35 insertions(+) create mode 100644 tests/asicworld/code_hdl_models_lfsr.v (limited to 'tests/asicworld/code_hdl_models_lfsr.v') diff --git a/tests/asicworld/code_hdl_models_lfsr.v b/tests/asicworld/code_hdl_models_lfsr.v new file mode 100644 index 000000000..639780832 --- /dev/null +++ b/tests/asicworld/code_hdl_models_lfsr.v @@ -0,0 +1,35 @@ +//----------------------------------------------------- +// Design Name : lfsr +// File Name : lfsr.v +// Function : Linear feedback shift register +// Coder : Deepak Kumar Tala +//----------------------------------------------------- +module lfsr ( +out , // Output of the counter +enable , // Enable for counter +clk , // clock input +reset // reset input +); + +//----------Output Ports-------------- +output [7:0] out; +//------------Input Ports-------------- +input enable, clk, reset; +//------------Internal Variables-------- +reg [7:0] out; +wire linear_feedback; + +//-------------Code Starts Here------- +assign linear_feedback = !(out[7] ^ out[3]); + +always @(posedge clk) +if (reset) begin // active high reset + out <= 8'b0 ; +end else if (enable) begin + out <= {out[6],out[5], + out[4],out[3], + out[2],out[1], + out[0], linear_feedback}; +end + +endmodule // End Of Module counter -- cgit v1.2.3