From 84937e9689c6fddfc613356f9a629d7628939668 Mon Sep 17 00:00:00 2001 From: "William D. Jones" Date: Tue, 17 Nov 2020 14:35:17 -0500 Subject: machxo2: Add dff.ys test, fix another cells_map.v typo. --- tests/arch/machxo2/dffs.ys | 10 ++++++++++ 1 file changed, 10 insertions(+) create mode 100644 tests/arch/machxo2/dffs.ys (limited to 'tests/arch') diff --git a/tests/arch/machxo2/dffs.ys b/tests/arch/machxo2/dffs.ys new file mode 100644 index 000000000..3e9f87fec --- /dev/null +++ b/tests/arch/machxo2/dffs.ys @@ -0,0 +1,10 @@ +read_verilog ../common/dffs.v +design -save read + +hierarchy -top dff +proc +equiv_opt -assert -map +/machxo2/cells_sim.v synth_machxo2 # equivalency check +design -load postopt # load the post-opt design (otherwise equiv_opt loads the pre-opt design) +cd dff # Constrain all select calls below inside the top module +select -assert-count 1 t:FACADE_FF +select -assert-none t:FACADE_FF %% t:* %D -- cgit v1.2.3