From b4c1d3084ffb2b0a5ec2207cb46004fd89cdae80 Mon Sep 17 00:00:00 2001 From: Clifford Wolf Date: Mon, 30 Apr 2018 13:02:56 +0200 Subject: Add "synth_intel --noiopads" Signed-off-by: Clifford Wolf --- techlibs/intel/synth_intel.cc | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-) (limited to 'techlibs') diff --git a/techlibs/intel/synth_intel.cc b/techlibs/intel/synth_intel.cc index dfed7a285..c51949bd4 100644 --- a/techlibs/intel/synth_intel.cc +++ b/techlibs/intel/synth_intel.cc @@ -59,6 +59,9 @@ struct SynthIntelPass : public ScriptPass { log(" from label is synonymous to 'begin', and empty to label is\n"); log(" synonymous to the end of the command list.\n"); log("\n"); + log(" -noiopads\n"); + log(" do not use altsyncram cells in output netlist\n"); + log("\n"); log(" -nobram\n"); log(" do not use altsyncram cells in output netlist\n"); log("\n"); @@ -74,7 +77,7 @@ struct SynthIntelPass : public ScriptPass { } string top_opt, family_opt, vout_file, blif_file; - bool retime, flatten, nobram; + bool retime, flatten, nobram, noiopads; virtual void clear_flags() YS_OVERRIDE { @@ -85,6 +88,7 @@ struct SynthIntelPass : public ScriptPass { retime = false; flatten = true; nobram = false; + noiopads = false; } virtual void execute(std::vector args, RTLIL::Design *design) YS_OVERRIDE @@ -119,6 +123,10 @@ struct SynthIntelPass : public ScriptPass { run_to = args[argidx].substr(pos+1); continue; } + if (args[argidx] == "-noiopads") { + noiopads = true; + continue; + } if (args[argidx] == "-nobram") { nobram = true; continue; @@ -216,7 +224,8 @@ struct SynthIntelPass : public ScriptPass { if (check_label("map_cells")) { - run("iopadmap -bits -outpad $__outpad I:O -inpad $__inpad O:I"); + if (!noiopads) + run("iopadmap -bits -outpad $__outpad I:O -inpad $__inpad O:I", "(unless -noiopads)"); if(family_opt=="max10") run("techmap -map +/intel/max10/cells_map.v"); else if(family_opt=="a10gx") -- cgit v1.2.3