From 4cec21b93e62e9c43a0ab9618c0111ee65e520c1 Mon Sep 17 00:00:00 2001 From: Eddie Hung Date: Wed, 15 Apr 2020 16:29:11 -0700 Subject: abc9_ops: -prep_dff_map to error if async flop found --- techlibs/xilinx/cells_sim.v | 4 ---- 1 file changed, 4 deletions(-) (limited to 'techlibs') diff --git a/techlibs/xilinx/cells_sim.v b/techlibs/xilinx/cells_sim.v index 5143f87da..25df3a865 100644 --- a/techlibs/xilinx/cells_sim.v +++ b/techlibs/xilinx/cells_sim.v @@ -656,7 +656,6 @@ module FDRSE ( Q <= d; endmodule -(* lib_whitebox *) module FDCE ( output reg Q, (* clkbuf_sink *) @@ -699,7 +698,6 @@ module FDCE ( endspecify endmodule -(* lib_whitebox *) module FDCE_1 ( output reg Q, (* clkbuf_sink *) @@ -724,7 +722,6 @@ module FDCE_1 ( endspecify endmodule -(* lib_whitebox *) module FDPE ( output reg Q, (* clkbuf_sink *) @@ -766,7 +763,6 @@ module FDPE ( endspecify endmodule -(* lib_whitebox *) module FDPE_1 ( output reg Q, (* clkbuf_sink *) -- cgit v1.2.3