From 3cbfa3815ee0c40fcafe80d56afec97c36368f06 Mon Sep 17 00:00:00 2001 From: Clifford Wolf Date: Sun, 1 Feb 2015 17:10:46 +0100 Subject: Removed old XST-based xilinx examples --- techlibs/xilinx/example_zed_counter/README | 10 ---------- 1 file changed, 10 deletions(-) delete mode 100644 techlibs/xilinx/example_zed_counter/README (limited to 'techlibs/xilinx/example_zed_counter/README') diff --git a/techlibs/xilinx/example_zed_counter/README b/techlibs/xilinx/example_zed_counter/README deleted file mode 100644 index 539f24e73..000000000 --- a/techlibs/xilinx/example_zed_counter/README +++ /dev/null @@ -1,10 +0,0 @@ - -This is a simple example for Yosys synthesis targeting the ZED FPGA -development board [1, 2]. Simple script for xst-based synthesis (incl. -generation of reference edif files) and uploading to the board can be -found here [3]. - -[1] http://www.zedboard.org/ -[2] https://www.xilinx.com/zynq/ -[3] http://verilog.james.walms.co.uk/ - -- cgit v1.2.3