From 266c1ae1226656d90ee6416c214ef64fe8b5906f Mon Sep 17 00:00:00 2001 From: Eddie Hung Date: Thu, 18 Jul 2019 15:38:09 -0700 Subject: synth_ice40 to decompose into 16x16 --- techlibs/ice40/synth_ice40.cc | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'techlibs/ice40') diff --git a/techlibs/ice40/synth_ice40.cc b/techlibs/ice40/synth_ice40.cc index 0474e76e9..66446deb7 100644 --- a/techlibs/ice40/synth_ice40.cc +++ b/techlibs/ice40/synth_ice40.cc @@ -265,8 +265,10 @@ struct SynthIce40Pass : public ScriptPass run("techmap -map +/cmp2lut.v -D LUT_WIDTH=4"); run("opt_expr"); run("opt_clean"); - if (help_mode || dsp) + if (help_mode || dsp) { + run("techmap -map +/mul2dsp.v -D DSP_A_MAXWIDTH=16 -D DSP_B_MAXWIDTH=16 -D DSP_NAME=$__MUL16X16"); run("ice40_dsp", "(if -dsp)"); + } run("alumacc"); run("opt"); run("fsm"); -- cgit v1.2.3 From bddd641290d3c01d86144362cd0e16c82e0bcfd8 Mon Sep 17 00:00:00 2001 From: Eddie Hung Date: Thu, 18 Jul 2019 21:03:54 -0700 Subject: Fix SB_MAC sim model -- do not sign extend internal products? --- techlibs/ice40/cells_sim.v | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'techlibs/ice40') diff --git a/techlibs/ice40/cells_sim.v b/techlibs/ice40/cells_sim.v index 609facc93..4402f8d36 100644 --- a/techlibs/ice40/cells_sim.v +++ b/techlibs/ice40/cells_sim.v @@ -1363,9 +1363,9 @@ module SB_MAC16 ( wire [15:0] p_Ah_Bh, p_Al_Bh, p_Ah_Bl, p_Al_Bl; wire [15:0] Ah, Al, Bh, Bl; assign Ah = {A_SIGNED ? {8{iA[15]}} : 8'b0, iA[15: 8]}; - assign Al = {A_SIGNED ? {8{iA[ 7]}} : 8'b0, iA[ 7: 0]}; + assign Al = {A_SIGNED && MODE_8x8 ? {8{iA[ 7]}} : 8'b0, iA[ 7: 0]}; assign Bh = {B_SIGNED ? {8{iB[15]}} : 8'b0, iB[15: 8]}; - assign Bl = {B_SIGNED ? {8{iB[ 7]}} : 8'b0, iB[ 7: 0]}; + assign Bl = {B_SIGNED && MODE_8x8 ? {8{iB[ 7]}} : 8'b0, iB[ 7: 0]}; assign p_Ah_Bh = Ah * Bh; assign p_Al_Bh = Al * Bh; assign p_Ah_Bl = Ah * Bl; -- cgit v1.2.3 From 3dc3c749d5c7c10e1aa504f48794ef0a87513a82 Mon Sep 17 00:00:00 2001 From: Eddie Hung Date: Fri, 19 Jul 2019 11:41:00 -0700 Subject: Add DSP_MINWIDTH=11 for ice40 since ice40_dsp uses this threshold --- techlibs/ice40/synth_ice40.cc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'techlibs/ice40') diff --git a/techlibs/ice40/synth_ice40.cc b/techlibs/ice40/synth_ice40.cc index 5053e445d..77bd0ac81 100644 --- a/techlibs/ice40/synth_ice40.cc +++ b/techlibs/ice40/synth_ice40.cc @@ -266,7 +266,7 @@ struct SynthIce40Pass : public ScriptPass run("opt_expr"); run("opt_clean"); if (help_mode || dsp) { - run("techmap -map +/mul2dsp.v -D DSP_A_MAXWIDTH=16 -D DSP_B_MAXWIDTH=16 -D DSP_NAME=$__MUL16X16"); + run("techmap -map +/mul2dsp.v -D DSP_A_MAXWIDTH=16 -D DSP_B_MAXWIDTH=16 -D DSP_MINWIDTH=11 -D DSP_NAME=$__MUL16X16", "(if -dsp)"); run("ice40_dsp", "(if -dsp)"); } run("alumacc"); -- cgit v1.2.3 From 47fd042b9f8a92df1e1d59042068e7846c4ce808 Mon Sep 17 00:00:00 2001 From: Eddie Hung Date: Fri, 19 Jul 2019 20:20:33 -0700 Subject: Indirection via $__soft_mul --- techlibs/ice40/synth_ice40.cc | 1 + 1 file changed, 1 insertion(+) (limited to 'techlibs/ice40') diff --git a/techlibs/ice40/synth_ice40.cc b/techlibs/ice40/synth_ice40.cc index 77bd0ac81..fcb177491 100644 --- a/techlibs/ice40/synth_ice40.cc +++ b/techlibs/ice40/synth_ice40.cc @@ -268,6 +268,7 @@ struct SynthIce40Pass : public ScriptPass if (help_mode || dsp) { run("techmap -map +/mul2dsp.v -D DSP_A_MAXWIDTH=16 -D DSP_B_MAXWIDTH=16 -D DSP_MINWIDTH=11 -D DSP_NAME=$__MUL16X16", "(if -dsp)"); run("ice40_dsp", "(if -dsp)"); + run("chtype -set $mul t:$__soft_mul"); } run("alumacc"); run("opt"); -- cgit v1.2.3 From 5e70b8a22bf38e622943b0546255befd539fa884 Mon Sep 17 00:00:00 2001 From: Eddie Hung Date: Mon, 22 Jul 2019 13:48:33 -0700 Subject: opt and wreduce necessary for -dsp --- techlibs/ice40/synth_ice40.cc | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) (limited to 'techlibs/ice40') diff --git a/techlibs/ice40/synth_ice40.cc b/techlibs/ice40/synth_ice40.cc index fcb177491..ce88a0542 100644 --- a/techlibs/ice40/synth_ice40.cc +++ b/techlibs/ice40/synth_ice40.cc @@ -267,8 +267,10 @@ struct SynthIce40Pass : public ScriptPass run("opt_clean"); if (help_mode || dsp) { run("techmap -map +/mul2dsp.v -D DSP_A_MAXWIDTH=16 -D DSP_B_MAXWIDTH=16 -D DSP_MINWIDTH=11 -D DSP_NAME=$__MUL16X16", "(if -dsp)"); - run("ice40_dsp", "(if -dsp)"); - run("chtype -set $mul t:$__soft_mul"); + run("opt_expr", " (if -dsp)"); + run("wreduce", " (if -dsp)"); + run("ice40_dsp", " (if -dsp)"); + run("chtype -set $mul t:$__soft_mul","(if -dsp)"); } run("alumacc"); run("opt"); -- cgit v1.2.3 From 4d71ab384d640f53435d2e4773b2277f385cda27 Mon Sep 17 00:00:00 2001 From: Eddie Hung Date: Mon, 22 Jul 2019 15:08:26 -0700 Subject: Rename according to vendor doc TN1295 --- techlibs/ice40/synth_ice40.cc | 1 + 1 file changed, 1 insertion(+) (limited to 'techlibs/ice40') diff --git a/techlibs/ice40/synth_ice40.cc b/techlibs/ice40/synth_ice40.cc index ce88a0542..50e071a1a 100644 --- a/techlibs/ice40/synth_ice40.cc +++ b/techlibs/ice40/synth_ice40.cc @@ -271,6 +271,7 @@ struct SynthIce40Pass : public ScriptPass run("wreduce", " (if -dsp)"); run("ice40_dsp", " (if -dsp)"); run("chtype -set $mul t:$__soft_mul","(if -dsp)"); + run("dump A:top"); } run("alumacc"); run("opt"); -- cgit v1.2.3 From cb505c50d3572a0622110b31b950b43cffc995db Mon Sep 17 00:00:00 2001 From: Eddie Hung Date: Mon, 22 Jul 2019 16:14:15 -0700 Subject: Remove debug --- techlibs/ice40/synth_ice40.cc | 1 - 1 file changed, 1 deletion(-) (limited to 'techlibs/ice40') diff --git a/techlibs/ice40/synth_ice40.cc b/techlibs/ice40/synth_ice40.cc index 50e071a1a..ce88a0542 100644 --- a/techlibs/ice40/synth_ice40.cc +++ b/techlibs/ice40/synth_ice40.cc @@ -271,7 +271,6 @@ struct SynthIce40Pass : public ScriptPass run("wreduce", " (if -dsp)"); run("ice40_dsp", " (if -dsp)"); run("chtype -set $mul t:$__soft_mul","(if -dsp)"); - run("dump A:top"); } run("alumacc"); run("opt"); -- cgit v1.2.3 From 915f4e34bfdf1fd2b9f97d1c15a55e2c4c49f428 Mon Sep 17 00:00:00 2001 From: Eddie Hung Date: Thu, 1 Aug 2019 13:20:34 -0700 Subject: DSP_MINWIDTH -> DSP_{A,B,Y}_MINWIDTH --- techlibs/ice40/synth_ice40.cc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'techlibs/ice40') diff --git a/techlibs/ice40/synth_ice40.cc b/techlibs/ice40/synth_ice40.cc index ce88a0542..2cc5fd5fd 100644 --- a/techlibs/ice40/synth_ice40.cc +++ b/techlibs/ice40/synth_ice40.cc @@ -266,7 +266,7 @@ struct SynthIce40Pass : public ScriptPass run("opt_expr"); run("opt_clean"); if (help_mode || dsp) { - run("techmap -map +/mul2dsp.v -D DSP_A_MAXWIDTH=16 -D DSP_B_MAXWIDTH=16 -D DSP_MINWIDTH=11 -D DSP_NAME=$__MUL16X16", "(if -dsp)"); + run("techmap -map +/mul2dsp.v -D DSP_A_MAXWIDTH=16 -D DSP_B_MAXWIDTH=16 -D DSP_A_MINWIDTH=2 -D DSP_B_MINWIDTH=2 -D DSP_Y_MINWIDTH=11 -D DSP_NAME=$__MUL16X16", "(if -dsp)"); run("opt_expr", " (if -dsp)"); run("wreduce", " (if -dsp)"); run("ice40_dsp", " (if -dsp)"); -- cgit v1.2.3 From a206aed977e92a63aa52137690e20897f27df458 Mon Sep 17 00:00:00 2001 From: Eddie Hung Date: Wed, 7 Aug 2019 13:59:07 -0700 Subject: Run "opt_expr -fine" instead of "wreduce" due to #1213 --- techlibs/ice40/synth_ice40.cc | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'techlibs/ice40') diff --git a/techlibs/ice40/synth_ice40.cc b/techlibs/ice40/synth_ice40.cc index 2cc5fd5fd..09759f359 100644 --- a/techlibs/ice40/synth_ice40.cc +++ b/techlibs/ice40/synth_ice40.cc @@ -267,8 +267,7 @@ struct SynthIce40Pass : public ScriptPass run("opt_clean"); if (help_mode || dsp) { run("techmap -map +/mul2dsp.v -D DSP_A_MAXWIDTH=16 -D DSP_B_MAXWIDTH=16 -D DSP_A_MINWIDTH=2 -D DSP_B_MINWIDTH=2 -D DSP_Y_MINWIDTH=11 -D DSP_NAME=$__MUL16X16", "(if -dsp)"); - run("opt_expr", " (if -dsp)"); - run("wreduce", " (if -dsp)"); + run("opt_expr -fine", " (if -dsp)"); run("ice40_dsp", " (if -dsp)"); run("chtype -set $mul t:$__soft_mul","(if -dsp)"); } -- cgit v1.2.3 From 2c0be7aa5d7dcdf18678fb7b09ba1b3b5dd00998 Mon Sep 17 00:00:00 2001 From: Eddie Hung Date: Thu, 8 Aug 2019 12:56:05 -0700 Subject: Rework ice40_dsp to map to SB_MAC16 earlier, and check before packing --- techlibs/ice40/Makefile.inc | 1 + techlibs/ice40/dsp_map.v | 34 ++++++++++++++++++++++++++++++++++ techlibs/ice40/synth_ice40.cc | 2 +- 3 files changed, 36 insertions(+), 1 deletion(-) create mode 100644 techlibs/ice40/dsp_map.v (limited to 'techlibs/ice40') diff --git a/techlibs/ice40/Makefile.inc b/techlibs/ice40/Makefile.inc index d258d5a5d..b0eadab44 100644 --- a/techlibs/ice40/Makefile.inc +++ b/techlibs/ice40/Makefile.inc @@ -28,6 +28,7 @@ $(eval $(call add_share_file,share/ice40,techlibs/ice40/cells_sim.v)) $(eval $(call add_share_file,share/ice40,techlibs/ice40/latches_map.v)) $(eval $(call add_share_file,share/ice40,techlibs/ice40/brams.txt)) $(eval $(call add_share_file,share/ice40,techlibs/ice40/brams_map.v)) +$(eval $(call add_share_file,share/ice40,techlibs/ice40/dsp_map.v)) $(eval $(call add_share_file,share/ice40,techlibs/ice40/abc_hx.box)) $(eval $(call add_share_file,share/ice40,techlibs/ice40/abc_hx.lut)) $(eval $(call add_share_file,share/ice40,techlibs/ice40/abc_lp.box)) diff --git a/techlibs/ice40/dsp_map.v b/techlibs/ice40/dsp_map.v new file mode 100644 index 000000000..06fa73956 --- /dev/null +++ b/techlibs/ice40/dsp_map.v @@ -0,0 +1,34 @@ +module \$__MUL16X16 (input [15:0] A, input [15:0] B, output [31:0] Y); + parameter A_SIGNED = 0; + parameter B_SIGNED = 0; + parameter A_WIDTH = 0; + parameter B_WIDTH = 0; + parameter Y_WIDTH = 0; + + SB_MAC16 #( + .NEG_TRIGGER(1'b0), + .C_REG(1'b0), + .A_REG(1'b0), + .B_REG(1'b0), + .D_REG(1'b0), + .TOP_8x8_MULT_REG(1'b0), + .BOT_8x8_MULT_REG(1'b0), + .PIPELINE_16x16_MULT_REG1(1'b0), + .PIPELINE_16x16_MULT_REG2(1'b0), + .TOPOUTPUT_SELECT(2'b11), + .TOPADDSUB_LOWERINPUT(2'b0), + .TOPADDSUB_UPPERINPUT(1'b0), + .TOPADDSUB_CARRYSELECT(2'b0), + .BOTOUTPUT_SELECT(2'b11), + .BOTADDSUB_LOWERINPUT(2'b0), + .BOTADDSUB_UPPERINPUT(1'b0), + .BOTADDSUB_CARRYSELECT(2'b0), + .MODE_8x8(1'b0), + .A_SIGNED(A_SIGNED), + .B_SIGNED(B_SIGNED) + ) _TECHMAP_REPLACE_ ( + .A(A), + .B(B), + .O(Y), + ); +endmodule diff --git a/techlibs/ice40/synth_ice40.cc b/techlibs/ice40/synth_ice40.cc index 09759f359..9c3670c7c 100644 --- a/techlibs/ice40/synth_ice40.cc +++ b/techlibs/ice40/synth_ice40.cc @@ -266,7 +266,7 @@ struct SynthIce40Pass : public ScriptPass run("opt_expr"); run("opt_clean"); if (help_mode || dsp) { - run("techmap -map +/mul2dsp.v -D DSP_A_MAXWIDTH=16 -D DSP_B_MAXWIDTH=16 -D DSP_A_MINWIDTH=2 -D DSP_B_MINWIDTH=2 -D DSP_Y_MINWIDTH=11 -D DSP_NAME=$__MUL16X16", "(if -dsp)"); + run("techmap -map +/mul2dsp.v -map +/ice40/dsp_map.v -D DSP_A_MAXWIDTH=16 -D DSP_B_MAXWIDTH=16 -D DSP_A_MINWIDTH=2 -D DSP_B_MINWIDTH=2 -D DSP_Y_MINWIDTH=11 -D DSP_NAME=$__MUL16X16", "(if -dsp)"); run("opt_expr -fine", " (if -dsp)"); run("ice40_dsp", " (if -dsp)"); run("chtype -set $mul t:$__soft_mul","(if -dsp)"); -- cgit v1.2.3 From 6d254f2de802ccd71b6514b0f5e4c0b44c415ae4 Mon Sep 17 00:00:00 2001 From: Eddie Hung Date: Fri, 9 Aug 2019 17:05:56 -0700 Subject: Add wreduce to synth_ice40 -dsp as well --- techlibs/ice40/synth_ice40.cc | 1 + 1 file changed, 1 insertion(+) (limited to 'techlibs/ice40') diff --git a/techlibs/ice40/synth_ice40.cc b/techlibs/ice40/synth_ice40.cc index 9c3670c7c..02598401c 100644 --- a/techlibs/ice40/synth_ice40.cc +++ b/techlibs/ice40/synth_ice40.cc @@ -268,6 +268,7 @@ struct SynthIce40Pass : public ScriptPass if (help_mode || dsp) { run("techmap -map +/mul2dsp.v -map +/ice40/dsp_map.v -D DSP_A_MAXWIDTH=16 -D DSP_B_MAXWIDTH=16 -D DSP_A_MINWIDTH=2 -D DSP_B_MINWIDTH=2 -D DSP_Y_MINWIDTH=11 -D DSP_NAME=$__MUL16X16", "(if -dsp)"); run("opt_expr -fine", " (if -dsp)"); + run("wreduce", " (if -dsp)"); run("ice40_dsp", " (if -dsp)"); run("chtype -set $mul t:$__soft_mul","(if -dsp)"); } -- cgit v1.2.3 From 3b9b0fcd0630133092b23a18453eb420534b2369 Mon Sep 17 00:00:00 2001 From: Eddie Hung Date: Thu, 19 Sep 2019 14:57:38 -0700 Subject: Tidy up synth_ice40, only restrict DSP_B_MINWIDTH=2 --- techlibs/ice40/synth_ice40.cc | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'techlibs/ice40') diff --git a/techlibs/ice40/synth_ice40.cc b/techlibs/ice40/synth_ice40.cc index 55aa72aa7..284bc90d0 100644 --- a/techlibs/ice40/synth_ice40.cc +++ b/techlibs/ice40/synth_ice40.cc @@ -273,7 +273,9 @@ struct SynthIce40Pass : public ScriptPass run("opt_expr"); run("opt_clean"); if (help_mode || dsp) { - run("techmap -map +/mul2dsp.v -map +/ice40/dsp_map.v -D DSP_A_MAXWIDTH=16 -D DSP_B_MAXWIDTH=16 -D DSP_A_MINWIDTH=2 -D DSP_B_MINWIDTH=2 -D DSP_Y_MINWIDTH=11 -D DSP_NAME=$__MUL16X16", "(if -dsp)"); + run("techmap -map +/mul2dsp.v -map +/ice40/dsp_map.v -D DSP_A_MAXWIDTH=16 -D DSP_B_MAXWIDTH=16 " + "-D DSP_A_MINWIDTH=2 -D DSP_Y_MINWIDTH=11 " + "-D DSP_NAME=$__MUL16X16", "(if -dsp)"); run("opt_expr -fine", " (if -dsp)"); run("wreduce", " (if -dsp)"); run("ice40_dsp", " (if -dsp)"); -- cgit v1.2.3 From e4f4f6a9d5cf8bb23870fc483f16f66c80ceebab Mon Sep 17 00:00:00 2001 From: Eddie Hung Date: Fri, 20 Sep 2019 08:41:40 -0700 Subject: Move mul2dsp before wreduce --- techlibs/ice40/synth_ice40.cc | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) (limited to 'techlibs/ice40') diff --git a/techlibs/ice40/synth_ice40.cc b/techlibs/ice40/synth_ice40.cc index 284bc90d0..225603475 100644 --- a/techlibs/ice40/synth_ice40.cc +++ b/techlibs/ice40/synth_ice40.cc @@ -265,6 +265,10 @@ struct SynthIce40Pass : public ScriptPass run("opt_clean"); run("check"); run("opt"); + if (help_mode || dsp) + run("techmap -map +/mul2dsp.v -map +/ice40/dsp_map.v -D DSP_A_MAXWIDTH=16 -D DSP_B_MAXWIDTH=16 " + "-D DSP_A_MINWIDTH=2 -D DSP_Y_MINWIDTH=11 " + "-D DSP_NAME=$__MUL16X16", "(if -dsp)"); run("wreduce"); run("peepopt"); run("opt_clean"); @@ -273,11 +277,6 @@ struct SynthIce40Pass : public ScriptPass run("opt_expr"); run("opt_clean"); if (help_mode || dsp) { - run("techmap -map +/mul2dsp.v -map +/ice40/dsp_map.v -D DSP_A_MAXWIDTH=16 -D DSP_B_MAXWIDTH=16 " - "-D DSP_A_MINWIDTH=2 -D DSP_Y_MINWIDTH=11 " - "-D DSP_NAME=$__MUL16X16", "(if -dsp)"); - run("opt_expr -fine", " (if -dsp)"); - run("wreduce", " (if -dsp)"); run("ice40_dsp", " (if -dsp)"); run("chtype -set $mul t:$__soft_mul","(if -dsp)"); } -- cgit v1.2.3 From 829e4f5d2c8a521b5e4f80e85b9d58191d64f0d5 Mon Sep 17 00:00:00 2001 From: Eddie Hung Date: Fri, 20 Sep 2019 08:56:16 -0700 Subject: Revert "Move mul2dsp before wreduce" This reverts commit e4f4f6a9d5cf8bb23870fc483f16f66c80ceebab. --- techlibs/ice40/synth_ice40.cc | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) (limited to 'techlibs/ice40') diff --git a/techlibs/ice40/synth_ice40.cc b/techlibs/ice40/synth_ice40.cc index 225603475..284bc90d0 100644 --- a/techlibs/ice40/synth_ice40.cc +++ b/techlibs/ice40/synth_ice40.cc @@ -265,10 +265,6 @@ struct SynthIce40Pass : public ScriptPass run("opt_clean"); run("check"); run("opt"); - if (help_mode || dsp) - run("techmap -map +/mul2dsp.v -map +/ice40/dsp_map.v -D DSP_A_MAXWIDTH=16 -D DSP_B_MAXWIDTH=16 " - "-D DSP_A_MINWIDTH=2 -D DSP_Y_MINWIDTH=11 " - "-D DSP_NAME=$__MUL16X16", "(if -dsp)"); run("wreduce"); run("peepopt"); run("opt_clean"); @@ -277,6 +273,11 @@ struct SynthIce40Pass : public ScriptPass run("opt_expr"); run("opt_clean"); if (help_mode || dsp) { + run("techmap -map +/mul2dsp.v -map +/ice40/dsp_map.v -D DSP_A_MAXWIDTH=16 -D DSP_B_MAXWIDTH=16 " + "-D DSP_A_MINWIDTH=2 -D DSP_Y_MINWIDTH=11 " + "-D DSP_NAME=$__MUL16X16", "(if -dsp)"); + run("opt_expr -fine", " (if -dsp)"); + run("wreduce", " (if -dsp)"); run("ice40_dsp", " (if -dsp)"); run("chtype -set $mul t:$__soft_mul","(if -dsp)"); } -- cgit v1.2.3 From 289cf688b76328d62c7416d1327d2d6777b0ffd9 Mon Sep 17 00:00:00 2001 From: Eddie Hung Date: Fri, 20 Sep 2019 09:02:29 -0700 Subject: Re-add DSP_A_MINWIDTH, remove unnec. opt_expr -fine from synth_ice40 --- techlibs/ice40/synth_ice40.cc | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'techlibs/ice40') diff --git a/techlibs/ice40/synth_ice40.cc b/techlibs/ice40/synth_ice40.cc index 284bc90d0..7a8f3d70c 100644 --- a/techlibs/ice40/synth_ice40.cc +++ b/techlibs/ice40/synth_ice40.cc @@ -274,9 +274,8 @@ struct SynthIce40Pass : public ScriptPass run("opt_clean"); if (help_mode || dsp) { run("techmap -map +/mul2dsp.v -map +/ice40/dsp_map.v -D DSP_A_MAXWIDTH=16 -D DSP_B_MAXWIDTH=16 " - "-D DSP_A_MINWIDTH=2 -D DSP_Y_MINWIDTH=11 " + "-D DSP_A_MINWIDTH=2 -D DSP_B_MINWIDTH=2 -D DSP_Y_MINWIDTH=11 " "-D DSP_NAME=$__MUL16X16", "(if -dsp)"); - run("opt_expr -fine", " (if -dsp)"); run("wreduce", " (if -dsp)"); run("ice40_dsp", " (if -dsp)"); run("chtype -set $mul t:$__soft_mul","(if -dsp)"); -- cgit v1.2.3 From 63940913d21fcfb18cd844d7e5b9c8b41a82295b Mon Sep 17 00:00:00 2001 From: Eddie Hung Date: Wed, 25 Sep 2019 17:22:04 -0700 Subject: Only wreduce on t:$add --- techlibs/ice40/synth_ice40.cc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'techlibs/ice40') diff --git a/techlibs/ice40/synth_ice40.cc b/techlibs/ice40/synth_ice40.cc index 7a8f3d70c..98d3e44e3 100644 --- a/techlibs/ice40/synth_ice40.cc +++ b/techlibs/ice40/synth_ice40.cc @@ -276,7 +276,7 @@ struct SynthIce40Pass : public ScriptPass run("techmap -map +/mul2dsp.v -map +/ice40/dsp_map.v -D DSP_A_MAXWIDTH=16 -D DSP_B_MAXWIDTH=16 " "-D DSP_A_MINWIDTH=2 -D DSP_B_MINWIDTH=2 -D DSP_Y_MINWIDTH=11 " "-D DSP_NAME=$__MUL16X16", "(if -dsp)"); - run("wreduce", " (if -dsp)"); + run("wreduce t:$add", " (if -dsp)"); run("ice40_dsp", " (if -dsp)"); run("chtype -set $mul t:$__soft_mul","(if -dsp)"); } -- cgit v1.2.3 From 27e5bf5aad229ef330bfea932f6b194ec5c09b68 Mon Sep 17 00:00:00 2001 From: Eddie Hung Date: Thu, 26 Sep 2019 09:57:11 -0700 Subject: Stop trying to be too smart by prematurely optimising --- techlibs/ice40/synth_ice40.cc | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) (limited to 'techlibs/ice40') diff --git a/techlibs/ice40/synth_ice40.cc b/techlibs/ice40/synth_ice40.cc index 98d3e44e3..694782e5b 100644 --- a/techlibs/ice40/synth_ice40.cc +++ b/techlibs/ice40/synth_ice40.cc @@ -276,9 +276,11 @@ struct SynthIce40Pass : public ScriptPass run("techmap -map +/mul2dsp.v -map +/ice40/dsp_map.v -D DSP_A_MAXWIDTH=16 -D DSP_B_MAXWIDTH=16 " "-D DSP_A_MINWIDTH=2 -D DSP_B_MINWIDTH=2 -D DSP_Y_MINWIDTH=11 " "-D DSP_NAME=$__MUL16X16", "(if -dsp)"); - run("wreduce t:$add", " (if -dsp)"); - run("ice40_dsp", " (if -dsp)"); - run("chtype -set $mul t:$__soft_mul","(if -dsp)"); + run("opt_expr -fine a:mul2dsp", " (if -dsp)"); + run("wreduce a:mul2dsp", " (if -dsp)"); + run("ice40_dsp", " (if -dsp)"); + run("setattr -unset mul2dsp a:mul2dsp", "(if -dsp)"); + run("chtype -set $mul t:$__soft_mul", " (if -dsp)"); } run("alumacc"); run("opt"); -- cgit v1.2.3 From 781dda6175c86fcb2b08d055565d3d99a687e636 Mon Sep 17 00:00:00 2001 From: Eddie Hung Date: Thu, 26 Sep 2019 10:15:05 -0700 Subject: select once --- techlibs/ice40/synth_ice40.cc | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) (limited to 'techlibs/ice40') diff --git a/techlibs/ice40/synth_ice40.cc b/techlibs/ice40/synth_ice40.cc index 694782e5b..52e13bdc2 100644 --- a/techlibs/ice40/synth_ice40.cc +++ b/techlibs/ice40/synth_ice40.cc @@ -276,11 +276,13 @@ struct SynthIce40Pass : public ScriptPass run("techmap -map +/mul2dsp.v -map +/ice40/dsp_map.v -D DSP_A_MAXWIDTH=16 -D DSP_B_MAXWIDTH=16 " "-D DSP_A_MINWIDTH=2 -D DSP_B_MINWIDTH=2 -D DSP_Y_MINWIDTH=11 " "-D DSP_NAME=$__MUL16X16", "(if -dsp)"); - run("opt_expr -fine a:mul2dsp", " (if -dsp)"); - run("wreduce a:mul2dsp", " (if -dsp)"); - run("ice40_dsp", " (if -dsp)"); - run("setattr -unset mul2dsp a:mul2dsp", "(if -dsp)"); - run("chtype -set $mul t:$__soft_mul", " (if -dsp)"); + run("select a:mul2dsp", " (if -dsp)"); + run("opt_expr -fine", " (if -dsp)"); + run("wreduce", " (if -dsp)"); + run("setattr -unset mul2dsp", " (if -dsp)"); + run("select -clear", " (if -dsp)"); + run("ice40_dsp", " (if -dsp)"); + run("chtype -set $mul t:$__soft_mul", "(if -dsp)"); } run("alumacc"); run("opt"); -- cgit v1.2.3 From b3d8a60cbd94176076f23c4ea6c94ec24e6773e0 Mon Sep 17 00:00:00 2001 From: Eddie Hung Date: Fri, 27 Sep 2019 14:32:07 -0700 Subject: Re-order --- techlibs/ice40/synth_ice40.cc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'techlibs/ice40') diff --git a/techlibs/ice40/synth_ice40.cc b/techlibs/ice40/synth_ice40.cc index 52e13bdc2..841f10244 100644 --- a/techlibs/ice40/synth_ice40.cc +++ b/techlibs/ice40/synth_ice40.cc @@ -277,9 +277,9 @@ struct SynthIce40Pass : public ScriptPass "-D DSP_A_MINWIDTH=2 -D DSP_B_MINWIDTH=2 -D DSP_Y_MINWIDTH=11 " "-D DSP_NAME=$__MUL16X16", "(if -dsp)"); run("select a:mul2dsp", " (if -dsp)"); + run("setattr -unset mul2dsp", " (if -dsp)"); run("opt_expr -fine", " (if -dsp)"); run("wreduce", " (if -dsp)"); - run("setattr -unset mul2dsp", " (if -dsp)"); run("select -clear", " (if -dsp)"); run("ice40_dsp", " (if -dsp)"); run("chtype -set $mul t:$__soft_mul", "(if -dsp)"); -- cgit v1.2.3