From e62362225c8a53de1007f6ecc69b58b9bf1fdad9 Mon Sep 17 00:00:00 2001 From: Andrew Zonenberg Date: Mon, 14 Aug 2017 15:32:07 -0700 Subject: Fixed bug causing GP_SPI model to not synthesize --- techlibs/greenpak4/cells_sim.v | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'techlibs/greenpak4') diff --git a/techlibs/greenpak4/cells_sim.v b/techlibs/greenpak4/cells_sim.v index 2d7bed5cd..15bbba723 100644 --- a/techlibs/greenpak4/cells_sim.v +++ b/techlibs/greenpak4/cells_sim.v @@ -113,8 +113,8 @@ module GP_SPI( output reg[7:0] RXD_LOW, output reg INT); - initial DOUT_HIGH = 0; - initial DOUT_LOW = 0; + initial RXD_HIGH = 0; + initial RXD_LOW = 0; initial INT = 0; parameter DATA_WIDTH = 8; //byte or word width -- cgit v1.2.3