From 903f9973913371452005eb173ac50fec1d5d1447 Mon Sep 17 00:00:00 2001 From: Pepijn de Vos Date: Mon, 28 Oct 2019 15:18:01 +0100 Subject: add tristate buffer and test --- techlibs/gowin/cells_sim.v | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'techlibs/gowin/cells_sim.v') diff --git a/techlibs/gowin/cells_sim.v b/techlibs/gowin/cells_sim.v index 0fe2c8c52..cc1ac48e6 100644 --- a/techlibs/gowin/cells_sim.v +++ b/techlibs/gowin/cells_sim.v @@ -302,6 +302,12 @@ module OBUF(output O, input I); assign O = I; endmodule +module TBUF (O, I, OEN); + input I, OEN; + output O; + assign O = OEN ? I : 1'bz; +endmodule + module GSR (input GSRI); wire GSRO = GSRI; endmodule -- cgit v1.2.3