From db9cf544b8cf4c303610acc59c21a3dec346af62 Mon Sep 17 00:00:00 2001 From: Clifford Wolf Date: Fri, 17 Jan 2014 20:06:15 +0100 Subject: Added techlibs/common/pmux2mux.v --- techlibs/common/Makefile.inc | 6 +++++- techlibs/common/pmux2mux.v | 21 +++++++++++++++++++++ 2 files changed, 26 insertions(+), 1 deletion(-) create mode 100644 techlibs/common/pmux2mux.v (limited to 'techlibs/common') diff --git a/techlibs/common/Makefile.inc b/techlibs/common/Makefile.inc index e2e1ba25a..6d94d5c9b 100644 --- a/techlibs/common/Makefile.inc +++ b/techlibs/common/Makefile.inc @@ -5,7 +5,7 @@ techlibs/common/blackbox.v: techlibs/common/blackbox.sed techlibs/common/simlib. cat techlibs/common/simlib.v techlibs/common/simcells.v | sed -rf techlibs/common/blackbox.sed > techlibs/common/blackbox.v.new mv techlibs/common/blackbox.v.new techlibs/common/blackbox.v -EXTRA_TARGETS += share/simlib.v share/simcells.v share/blackbox.v +EXTRA_TARGETS += share/simlib.v share/simcells.v share/blackbox.v share/pmux2mux.v share/simlib.v: techlibs/common/simlib.v mkdir -p share @@ -19,3 +19,7 @@ share/blackbox.v: techlibs/common/blackbox.v mkdir -p share cp techlibs/common/blackbox.v share/blackbox.v +share/pmux2mux.v: techlibs/common/pmux2mux.v + mkdir -p share + cp techlibs/common/pmux2mux.v share/pmux2mux.v + diff --git a/techlibs/common/pmux2mux.v b/techlibs/common/pmux2mux.v new file mode 100644 index 000000000..9c97245a1 --- /dev/null +++ b/techlibs/common/pmux2mux.v @@ -0,0 +1,21 @@ +module \$pmux (A, B, S, Y); + +wire [1023:0] _TECHMAP_DO_ = "proc; clean"; + +parameter WIDTH = 1; +parameter S_WIDTH = 1; + +input [WIDTH-1:0] A; +input [WIDTH*S_WIDTH-1:0] B; +input [S_WIDTH-1:0] S; +output reg [WIDTH-1:0] Y; + +integer i; + +always @* begin + Y <= A; + for (i = 0; i < S_WIDTH; i=i+1) + if (S[i]) Y <= B[WIDTH*i +: WIDTH]; +end + +endmodule -- cgit v1.2.3 From 5b96675696bb3001232b16a047cb2a9bbf8e3121 Mon Sep 17 00:00:00 2001 From: Clifford Wolf Date: Sat, 18 Jan 2014 15:35:15 +0100 Subject: Added $bu0 cell to simlib.v --- techlibs/common/simlib.v | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) (limited to 'techlibs/common') diff --git a/techlibs/common/simlib.v b/techlibs/common/simlib.v index 034244ca6..f3d652f0e 100644 --- a/techlibs/common/simlib.v +++ b/techlibs/common/simlib.v @@ -53,6 +53,28 @@ assign Y = ~A_BUF.val; endmodule +// -------------------------------------------------------- + +module \$bu0 (A, Y); + +parameter A_SIGNED = 0; +parameter A_WIDTH = 0; +parameter Y_WIDTH = 0; + +`INPUT_A +output [Y_WIDTH-1:0] Y; + +generate + if (!A_SIGNED && 0 < A_WIDTH && A_WIDTH < Y_WIDTH) begin:A + assign Y[A_WIDTH-1:0] = A_BUF.val; + assign Y[Y_WIDTH-1:A_WIDTH] = 0; + end else begin:B + assign Y = +A_BUF.val; + end +endgenerate + +endmodule + // -------------------------------------------------------- module \$pos (A, Y); -- cgit v1.2.3 From bef17eeb109dd2dc4eaba6eb808a0172c0c53265 Mon Sep 17 00:00:00 2001 From: Clifford Wolf Date: Sat, 18 Jan 2014 15:36:17 +0100 Subject: Removed cases of trailing comma in stdcells.v --- techlibs/common/stdcells.v | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'techlibs/common') diff --git a/techlibs/common/stdcells.v b/techlibs/common/stdcells.v index 4e764078e..e33e651ca 100644 --- a/techlibs/common/stdcells.v +++ b/techlibs/common/stdcells.v @@ -456,7 +456,7 @@ wire [WIDTH-1:0] A_buf, B_buf, Y_buf; .Cin(1'b1), .Y(Y_buf), .Cout(carry), - .Csign(carry_sign), + .Csign(carry_sign) ); // ALU flags @@ -505,7 +505,7 @@ wire [WIDTH-1:0] A_buf, B_buf, Y_buf; .Cin(1'b1), .Y(Y_buf), .Cout(carry), - .Csign(carry_sign), + .Csign(carry_sign) ); // ALU flags @@ -849,7 +849,7 @@ assign B_buf_u = B_SIGNED && B_buf[WIDTH-1] ? -B_buf : B_buf; .A(A_buf_u), .B(B_buf_u), .Y(Y_u), - .R(R_u), + .R(R_u) ); assign Y = A_SIGNED && B_SIGNED && (A_buf[WIDTH-1] != B_buf[WIDTH-1]) ? -Y_u : Y_u; -- cgit v1.2.3