From a4238637acc4e6670ccefb1894b00c602a827408 Mon Sep 17 00:00:00 2001 From: Eddie Hung Date: Wed, 25 Sep 2019 17:25:44 -0700 Subject: Revert "Remove _TECHMAP_CELLTYPE_ check since all $mul" This reverts commit 234738b103d4f2b3d937ed928fd89bc4e31627f1. --- techlibs/common/mul2dsp.v | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) (limited to 'techlibs/common') diff --git a/techlibs/common/mul2dsp.v b/techlibs/common/mul2dsp.v index 953fc28d1..3ca69b7b1 100644 --- a/techlibs/common/mul2dsp.v +++ b/techlibs/common/mul2dsp.v @@ -61,6 +61,8 @@ module _80_mul (A, B, Y); input [B_WIDTH-1:0] B; output [Y_WIDTH-1:0] Y; + parameter _TECHMAP_CELLTYPE_ = ""; + generate if (0) begin end `ifdef DSP_A_MINWIDTH @@ -75,8 +77,10 @@ module _80_mul (A, B, Y); else if (Y_WIDTH < `DSP_Y_MINWIDTH) wire _TECHMAP_FAIL_ = 1; `endif + else if (_TECHMAP_CELLTYPE_ == "$mul" && A_SIGNED != B_SIGNED) + wire _TECHMAP_FAIL_ = 1; `ifdef DSP_SIGNEDONLY - else if (!A_SIGNED) + else if (_TECHMAP_CELLTYPE_ == "$mul" && !A_SIGNED) \$mul #( .A_SIGNED(1), .B_SIGNED(1), @@ -89,7 +93,7 @@ module _80_mul (A, B, Y); .Y(Y) ); `endif - else if (A_WIDTH < B_WIDTH) + else if (_TECHMAP_CELLTYPE_ == "$mul" && A_WIDTH < B_WIDTH) \$mul #( .A_SIGNED(B_SIGNED), .B_SIGNED(A_SIGNED), -- cgit v1.2.3