From 40563129872f5a2287f54cb0dbd79534b493a5d6 Mon Sep 17 00:00:00 2001 From: Clifford Wolf Date: Wed, 27 Jul 2016 15:41:22 +0200 Subject: Added $anyconst and $aconst --- techlibs/common/simlib.v | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) (limited to 'techlibs/common/simlib.v') diff --git a/techlibs/common/simlib.v b/techlibs/common/simlib.v index 8ab124034..ac4269c90 100644 --- a/techlibs/common/simlib.v +++ b/techlibs/common/simlib.v @@ -1330,6 +1330,30 @@ endmodule // -------------------------------------------------------- +module \$aconst (Y); + +parameter WIDTH = 0; + +output [WIDTH-1:0] Y; + +assign Y = 'bx; + +endmodule + +// -------------------------------------------------------- + +module \$anyconst (Y); + +parameter WIDTH = 0; + +output [WIDTH-1:0] Y; + +assign Y = 'bx; + +endmodule + +// -------------------------------------------------------- + module \$equiv (A, B, Y); input A, B; -- cgit v1.2.3