From cbf6b719fe85ce8544f9bb0796711f3f45638862 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marcelina=20Ko=C5=9Bcielnicka?= Date: Thu, 27 May 2021 23:43:25 +0200 Subject: Make a few passes auto-call Mem::narrow instead of rejecting wide ports. This essentially adds wide port support for free in passes that don't have a usefully better way of handling wide ports than just breaking them up to narrow ports, avoiding "please run memory_narrow" annoyance. --- passes/memory/memory_bram.cc | 15 +-------------- 1 file changed, 1 insertion(+), 14 deletions(-) (limited to 'passes') diff --git a/passes/memory/memory_bram.cc b/passes/memory/memory_bram.cc index b70864766..c1476669d 100644 --- a/passes/memory/memory_bram.cc +++ b/passes/memory/memory_bram.cc @@ -1052,6 +1052,7 @@ grow_read_ports:; void handle_memory(Mem &mem, const rules_t &rules, FfInitVals *initvals) { log("Processing %s.%s:\n", log_id(mem.module), log_id(mem.memid)); + mem.narrow(); bool cell_init = !mem.inits.empty(); @@ -1069,20 +1070,6 @@ void handle_memory(Mem &mem, const rules_t &rules, FfInitVals *initvals) log(" %s=%d", it.first.c_str(), it.second); log("\n"); - for (auto &port : mem.rd_ports) { - if (port.wide_log2) { - log("Wide read ports are not supported, skipping.\n"); - return; - } - } - - for (auto &port : mem.wr_ports) { - if (port.wide_log2) { - log("Wide write ports are not supported, skipping.\n"); - return; - } - } - // This pass cannot deal with write port priority — we need to emulate it, // if present. Since priority emulation will change the enable signals, // which in turn may change enable grouping and mapping eligibility in -- cgit v1.2.3