From 5fb4b12cb50b870b546d76f9c702678d8f0aa60a Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marcin=20Ko=C5=9Bcielnicki?= Date: Tue, 27 Aug 2019 17:26:47 +0200 Subject: improve clkbuf_inhibit propagation upwards through hierarchy --- passes/techmap/clkbufmap.cc | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-) (limited to 'passes') diff --git a/passes/techmap/clkbufmap.cc b/passes/techmap/clkbufmap.cc index 82b3dcdf7..246932d81 100644 --- a/passes/techmap/clkbufmap.cc +++ b/passes/techmap/clkbufmap.cc @@ -166,13 +166,24 @@ struct ClkbufmapPass : public Pass { // Insert buffers. std::vector> input_queue; - for (auto wire : module->selected_wires()) + // Copy current wire list, as we will be adding new ones during iteration. + std::vector wires(module->wires()); + for (auto wire : wires) { // Should not happen. if (wire->port_input && wire->port_output) continue; + bool process_wire = module->selected(wire); if (!select && wire->get_bool_attribute("\\clkbuf_inhibit")) + process_wire = false; + if (!process_wire) { + // This wire is supposed to be bypassed, so make sure we don't buffer it in + // some buffer higher up in the hierarchy. + if (wire->port_output) + for (int i = 0; i < GetSize(wire); i++) + buf_ports.insert(make_pair(module->name, make_pair(wire->name, i))); continue; + } pool input_bits; -- cgit v1.2.3