From 54f3237720709f7c59f4e440ebfdbc61a63c926a Mon Sep 17 00:00:00 2001
From: Eddie Hung <eddie@fpgeh.com>
Date: Thu, 20 Jun 2019 21:53:27 -0700
Subject: Fix gcc warning of potentially uninitialised
---
passes/techmap/abc9.cc | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
(limited to 'passes')
diff --git a/passes/techmap/abc9.cc b/passes/techmap/abc9.cc
index d48877779..e9f35be91 100644
--- a/passes/techmap/abc9.cc
+++ b/passes/techmap/abc9.cc
@@ -523,7 +523,7 @@ void abc9_module(RTLIL::Design *design, RTLIL::Module *current_module, std::stri
for (auto c : mapped_mod->cells())
{
if (c->type == "$_NOT_") {
- RTLIL::Cell *cell;
+ RTLIL::Cell *cell = nullptr;
RTLIL::SigBit a_bit = c->getPort("\\A").as_bit();
RTLIL::SigBit y_bit = c->getPort("\\Y").as_bit();
if (!a_bit.wire) {
@@ -577,7 +577,7 @@ void abc9_module(RTLIL::Design *design, RTLIL::Module *current_module, std::stri
cell->setPort("\\Y", RTLIL::SigBit(module->wires_[remap_name(y_bit.wire->name)], y_bit.offset));
cell_stats[RTLIL::unescape_id(c->type)]++;
}
- if (markgroups) cell->attributes["\\abcgroup"] = map_autoidx;
+ if (cell && markgroups) cell->attributes["\\abcgroup"] = map_autoidx;
continue;
}
cell_stats[RTLIL::unescape_id(c->type)]++;
--
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