From a6c96b986be313368b4fa03eba5cf6987448100c Mon Sep 17 00:00:00 2001
From: Clifford Wolf <clifford@clifford.at>
Date: Fri, 26 Dec 2014 10:53:21 +0100
Subject: Added Yosys::{dict,nodict,vector} container types

---
 passes/techmap/extract.cc | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

(limited to 'passes/techmap/extract.cc')

diff --git a/passes/techmap/extract.cc b/passes/techmap/extract.cc
index 994ef8f2a..ff99040e1 100644
--- a/passes/techmap/extract.cc
+++ b/passes/techmap/extract.cc
@@ -42,7 +42,7 @@ public:
 	{
 	}
 
-	bool compareAttributes(const std::set<RTLIL::IdString> &attr, const std::map<RTLIL::IdString, RTLIL::Const> &needleAttr, const std::map<RTLIL::IdString, RTLIL::Const> &haystackAttr)
+	bool compareAttributes(const std::set<RTLIL::IdString> &attr, const dict<RTLIL::IdString, RTLIL::Const> &needleAttr, const dict<RTLIL::IdString, RTLIL::Const> &haystackAttr)
 	{
 		for (auto &it : attr) {
 			size_t nc = needleAttr.count(it), hc = haystackAttr.count(it);
@@ -123,7 +123,7 @@ public:
 		{
 			RTLIL::Wire *lastNeedleWire = NULL;
 			RTLIL::Wire *lastHaystackWire = NULL;
-			std::map<RTLIL::IdString, RTLIL::Const> emptyAttr;
+			dict<RTLIL::IdString, RTLIL::Const> emptyAttr;
 
 			for (auto &conn : needleCell->connections())
 			{
-- 
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