From d152fe961ffb3d7ed0493cde5c21f88fe78644e1 Mon Sep 17 00:00:00 2001 From: Eddie Hung Date: Mon, 6 Jan 2020 11:50:55 -0800 Subject: Fixes --- passes/techmap/abc9.cc | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) (limited to 'passes/techmap/abc9.cc') diff --git a/passes/techmap/abc9.cc b/passes/techmap/abc9.cc index 1806b2d53..3c781ca44 100644 --- a/passes/techmap/abc9.cc +++ b/passes/techmap/abc9.cc @@ -413,11 +413,13 @@ void abc9_module(RTLIL::Design *design, RTLIL::Module *module, std::string scrip dict abc9_box; vector boxes; - for (auto cell : module->cells()) { + for (auto it = module->cells_.begin(); it != module->cells_.end(); ) { + auto cell = it->second; if (cell->type.in(ID($_AND_), ID($_NOT_), ID($__ABC9_FF_))) { - module->remove(cell); + it = module->cells_.erase(it); continue; } + ++it; RTLIL::Module* box_module = design->module(cell->type); auto jt = abc9_box.find(cell->type); if (jt == abc9_box.end()) @@ -996,7 +998,7 @@ struct Abc9Pass : public Pass { log_assert(!module->attributes.count(ID(abc9_box_id))); if (!design->selected_whole_module(module)) - log_cmd_error("Can't handle partially selected module %s!\n", log_id(module)); + log_error("Can't handle partially selected module %s!\n", log_id(module)); assign_map.set(module); -- cgit v1.2.3