From 0bc95f1e049afc35bb5ea30663b0a5725dfbf584 Mon Sep 17 00:00:00 2001 From: Clifford Wolf Date: Thu, 21 Apr 2016 23:28:37 +0200 Subject: Added "yosys -D" feature --- passes/sat/eval.cc | 2 +- passes/sat/expose.cc | 2 +- passes/sat/freduce.cc | 2 +- passes/sat/miter.cc | 4 ++-- passes/sat/sat.cc | 2 +- 5 files changed, 6 insertions(+), 6 deletions(-) (limited to 'passes/sat') diff --git a/passes/sat/eval.cc b/passes/sat/eval.cc index 614a1bd31..09f69cc5c 100644 --- a/passes/sat/eval.cc +++ b/passes/sat/eval.cc @@ -389,7 +389,7 @@ struct EvalPass : public Pass { std::vector shows, tables; bool set_undef = false; - log_header("Executing EVAL pass (evaluate the circuit given an input).\n"); + log_header(design, "Executing EVAL pass (evaluate the circuit given an input).\n"); size_t argidx; for (argidx = 1; argidx < args.size(); argidx++) { diff --git a/passes/sat/expose.cc b/passes/sat/expose.cc index ebdf2ed5d..9427547f3 100644 --- a/passes/sat/expose.cc +++ b/passes/sat/expose.cc @@ -262,7 +262,7 @@ struct ExposePass : public Pass { bool flag_evert_dff = false; std::string sep = "."; - log_header("Executing EXPOSE pass (exposing internal signals as outputs).\n"); + log_header(design, "Executing EXPOSE pass (exposing internal signals as outputs).\n"); size_t argidx; for (argidx = 1; argidx < args.size(); argidx++) diff --git a/passes/sat/freduce.cc b/passes/sat/freduce.cc index 373b80488..77263f6a2 100644 --- a/passes/sat/freduce.cc +++ b/passes/sat/freduce.cc @@ -798,7 +798,7 @@ struct FreducePass : public Pass { inv_mode = false; dump_prefix = std::string(); - log_header("Executing FREDUCE pass (perform functional reduction).\n"); + log_header(design, "Executing FREDUCE pass (perform functional reduction).\n"); size_t argidx; for (argidx = 1; argidx < args.size(); argidx++) { diff --git a/passes/sat/miter.cc b/passes/sat/miter.cc index e809425c8..4854e19bf 100644 --- a/passes/sat/miter.cc +++ b/passes/sat/miter.cc @@ -32,7 +32,7 @@ void create_miter_equiv(struct Pass *that, std::vector args, RTLIL: bool flag_make_assert = false; bool flag_flatten = false; - log_header("Executing MITER pass (creating miter circuit).\n"); + log_header(design, "Executing MITER pass (creating miter circuit).\n"); size_t argidx; for (argidx = 2; argidx < args.size(); argidx++) @@ -264,7 +264,7 @@ void create_miter_assert(struct Pass *that, std::vector args, RTLIL bool flag_make_outputs = false; bool flag_flatten = false; - log_header("Executing MITER pass (creating miter circuit).\n"); + log_header(design, "Executing MITER pass (creating miter circuit).\n"); size_t argidx; for (argidx = 2; argidx < args.size(); argidx++) diff --git a/passes/sat/sat.cc b/passes/sat/sat.cc index a91f657bc..c3cb435d1 100644 --- a/passes/sat/sat.cc +++ b/passes/sat/sat.cc @@ -1073,7 +1073,7 @@ struct SatPass : public Pass { int tempinduct_skip = 0, stepsize = 1; std::string vcd_file_name, json_file_name, cnf_file_name; - log_header("Executing SAT pass (solving SAT problems in the circuit).\n"); + log_header(design, "Executing SAT pass (solving SAT problems in the circuit).\n"); size_t argidx; for (argidx = 1; argidx < args.size(); argidx++) { -- cgit v1.2.3